forked from Minki/linux
intel-iommu: Introduce domain_sg_mapping() to speed up intel_map_sg()
Instead of calling domain_pfn_mapping() repeatedly with single or small numbers of pages, just pass the sglist in. It can optimise the number of cache flushes like domain_pfn_mapping() does, and gives a huge speedup for large scatterlists. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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@ -1635,6 +1635,56 @@ static int domain_context_mapped(struct pci_dev *pdev)
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tmp->devfn);
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}
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static int domain_sg_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
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struct scatterlist *sg, unsigned long nr_pages,
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int prot)
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{
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struct dma_pte *first_pte = NULL, *pte = NULL;
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uint64_t pteval;
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int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;
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unsigned long sg_res = 0;
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BUG_ON(addr_width < BITS_PER_LONG && (iov_pfn + nr_pages - 1) >> addr_width);
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if ((prot & (DMA_PTE_READ|DMA_PTE_WRITE)) == 0)
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return -EINVAL;
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prot &= DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP;
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while (nr_pages--) {
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if (!sg_res) {
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sg_res = (sg->offset + sg->length + VTD_PAGE_SIZE - 1) >> VTD_PAGE_SHIFT;
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sg->dma_address = ((dma_addr_t)iov_pfn << VTD_PAGE_SHIFT) + sg->offset;
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sg->dma_length = sg->length;
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pteval = page_to_phys(sg_page(sg)) | prot;
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}
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if (!pte) {
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first_pte = pte = pfn_to_dma_pte(domain, iov_pfn);
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if (!pte)
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return -ENOMEM;
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}
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/* We don't need lock here, nobody else
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* touches the iova range
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*/
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BUG_ON(dma_pte_addr(pte));
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pte->val = pteval;
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pte++;
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if (!nr_pages ||
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(unsigned long)pte >> VTD_PAGE_SHIFT !=
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(unsigned long)first_pte >> VTD_PAGE_SHIFT) {
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domain_flush_cache(domain, first_pte,
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(void *)pte - (void *)first_pte);
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pte = NULL;
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}
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iov_pfn++;
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pteval += VTD_PAGE_SIZE;
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sg_res--;
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if (!sg_res)
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sg = sg_next(sg);
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}
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return 0;
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}
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static int domain_pfn_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
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unsigned long phys_pfn, unsigned long nr_pages,
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int prot)
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@ -2758,27 +2808,18 @@ static int intel_map_sg(struct device *hwdev, struct scatterlist *sglist, int ne
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prot |= DMA_PTE_WRITE;
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start_vpfn = mm_to_dma_pfn(iova->pfn_lo);
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offset_pfn = 0;
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for_each_sg(sglist, sg, nelems, i) {
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int nr_pages = aligned_nrpages(sg->offset, sg->length);
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ret = domain_pfn_mapping(domain, start_vpfn + offset_pfn,
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page_to_dma_pfn(sg_page(sg)),
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nr_pages, prot);
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if (ret) {
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/* clear the page */
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dma_pte_clear_range(domain, start_vpfn,
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start_vpfn + offset_pfn);
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/* free page tables */
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dma_pte_free_pagetable(domain, start_vpfn,
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start_vpfn + offset_pfn);
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/* free iova */
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__free_iova(&domain->iovad, iova);
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return 0;
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}
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sg->dma_address = ((dma_addr_t)(start_vpfn + offset_pfn)
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<< VTD_PAGE_SHIFT) + sg->offset;
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sg->dma_length = sg->length;
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offset_pfn += nr_pages;
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ret = domain_sg_mapping(domain, start_vpfn, sglist, mm_to_dma_pfn(size), prot);
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if (unlikely(ret)) {
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/* clear the page */
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dma_pte_clear_range(domain, start_vpfn,
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start_vpfn + size - 1);
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/* free page tables */
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dma_pte_free_pagetable(domain, start_vpfn,
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start_vpfn + size - 1);
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/* free iova */
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__free_iova(&domain->iovad, iova);
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return 0;
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}
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/* it's a non-present to present mapping. Only flush if caching mode */
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