forked from Minki/linux
pinctrl: renesas: Implement unlock register masks
The V3U SoC has several unlock registers, one per register group. They reside at offset zero in each 0x200 bytes-sized block. To avoid adding yet another table to the PFC implementation, this patch adds the option to specify an address mask instead of the fixed address in sh_pfc_soc_info::unlock_reg. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210112165912.30876-2-uli+renesas@fpond.eu Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -175,13 +175,25 @@ u32 sh_pfc_read(struct sh_pfc *pfc, u32 reg)
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return sh_pfc_read_raw_reg(sh_pfc_phys_to_virt(pfc, reg), 32);
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}
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static void sh_pfc_unlock_reg(struct sh_pfc *pfc, u32 reg, u32 data)
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{
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u32 unlock;
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if (!pfc->info->unlock_reg)
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return;
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if (pfc->info->unlock_reg >= 0x80000000UL)
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unlock = pfc->info->unlock_reg;
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else
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/* unlock_reg is a mask */
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unlock = reg & ~pfc->info->unlock_reg;
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sh_pfc_write_raw_reg(sh_pfc_phys_to_virt(pfc, unlock), 32, ~data);
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}
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void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data)
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{
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if (pfc->info->unlock_reg)
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sh_pfc_write_raw_reg(
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sh_pfc_phys_to_virt(pfc, pfc->info->unlock_reg), 32,
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~data);
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sh_pfc_unlock_reg(pfc, reg, data);
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sh_pfc_write_raw_reg(sh_pfc_phys_to_virt(pfc, reg), 32, data);
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}
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@ -227,11 +239,7 @@ static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
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data &= mask;
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data |= value;
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if (pfc->info->unlock_reg)
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sh_pfc_write_raw_reg(
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sh_pfc_phys_to_virt(pfc, pfc->info->unlock_reg), 32,
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~data);
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sh_pfc_unlock_reg(pfc, crp->reg, data);
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sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data);
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}
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@ -300,7 +300,7 @@ struct sh_pfc_soc_info {
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const u16 *pinmux_data;
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unsigned int pinmux_data_size;
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u32 unlock_reg;
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u32 unlock_reg; /* can be literal address or mask */
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};
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extern const struct sh_pfc_soc_info emev2_pinmux_info;
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