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[PATCH] x86_64: Don't claim too many vectors for TLB flushing

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It looks like the new scalable TLB flush code for x86_64 is claiming
one more IRQ vector than it actually uses.

Signed-off-by: Jason Uhlenkott <jasonuhl@sgi.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Jason Uhlenkott 2006-01-11 22:45:51 +01:00 committed by Linus Torvalds
parent 5b22a38551
commit e080e9d66f
1 changed files with 3 additions and 4 deletions
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7
include/asm-x86_64/hw_irq.h
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@ -46,8 +46,6 @@ struct hw_interrupt_type;
* some of the following vectors are 'rare', they are merged * some of the following vectors are 'rare', they are merged
* into a single vector (CALL_FUNCTION_VECTOR) to save vector space. * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
* TLB, reschedule and local APIC vectors are performance-critical. * TLB, reschedule and local APIC vectors are performance-critical.
*
* Vectors 0xf0-0xf9 are free (reserved for future Linux use).
*/ */
#define SPURIOUS_APIC_VECTOR 0xff #define SPURIOUS_APIC_VECTOR 0xff
#define ERROR_APIC_VECTOR 0xfe #define ERROR_APIC_VECTOR 0xfe
@ -56,8 +54,9 @@ struct hw_interrupt_type;
#define KDB_VECTOR 0xfb /* reserved for KDB */ #define KDB_VECTOR 0xfb /* reserved for KDB */
#define THERMAL_APIC_VECTOR 0xfa #define THERMAL_APIC_VECTOR 0xfa
#define THRESHOLD_APIC_VECTOR 0xf9 #define THRESHOLD_APIC_VECTOR 0xf9
#define INVALIDATE_TLB_VECTOR_END 0xf8 /* f8 free */
#define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f8 used for TLB flush */ #define INVALIDATE_TLB_VECTOR_END 0xf7
#define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */
#define NUM_INVALIDATE_TLB_VECTORS 8 #define NUM_INVALIDATE_TLB_VECTORS 8