iwlwifi: move agn common code to iwlagn library file
Multiple iwlagn based devices share the same common functions. Move those functions from iwl-5000.c to iwl-agn-lib.c file. Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
This commit is contained in:
parent
741a626627
commit
e04ed0a5bb
@ -11,6 +11,7 @@ CFLAGS_iwl-devtrace.o := -I$(src)
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obj-$(CONFIG_IWLAGN) += iwlagn.o
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iwlagn-objs := iwl-agn.o iwl-agn-rs.o iwl-agn-led.o iwl-agn-ict.o
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iwlagn-objs += iwl-agn-ucode.o iwl-agn-hcmd.o iwl-agn-tx.o
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iwlagn-objs += iwl-agn-lib.o
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iwlagn-$(CONFIG_IWL4965) += iwl-4965.o
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iwlagn-$(CONFIG_IWL5000) += iwl-5000.o
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@ -170,9 +170,9 @@ static struct iwl_lib_ops iwl1000_lib = {
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.txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
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.txq_free_tfd = iwl_hw_txq_free_tfd,
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.txq_init = iwl_hw_tx_queue_init,
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.rx_handler_setup = iwl5000_rx_handler_setup,
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.setup_deferred_work = iwl5000_setup_deferred_work,
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.is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr,
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.rx_handler_setup = iwlagn_rx_handler_setup,
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.setup_deferred_work = iwlagn_setup_deferred_work,
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.is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
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.load_ucode = iwlagn_load_ucode,
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.dump_nic_event_log = iwl_dump_nic_event_log,
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.dump_nic_error_log = iwl_dump_nic_error_log,
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@ -180,7 +180,7 @@ static struct iwl_lib_ops iwl1000_lib = {
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.dump_fh = iwl_dump_fh,
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.init_alive_start = iwlagn_init_alive_start,
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.alive_notify = iwlagn_alive_notify,
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.send_tx_power = iwl5000_send_tx_power,
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.send_tx_power = iwlagn_send_tx_power,
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.update_chain_flags = iwl_update_chain_flags,
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.apm_ops = {
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.init = iwl_apm_init,
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@ -190,25 +190,25 @@ static struct iwl_lib_ops iwl1000_lib = {
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},
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.eeprom_ops = {
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.regulatory_bands = {
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EEPROM_5000_REG_BAND_1_CHANNELS,
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EEPROM_5000_REG_BAND_2_CHANNELS,
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EEPROM_5000_REG_BAND_3_CHANNELS,
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EEPROM_5000_REG_BAND_4_CHANNELS,
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EEPROM_5000_REG_BAND_5_CHANNELS,
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EEPROM_5000_REG_BAND_24_HT40_CHANNELS,
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EEPROM_5000_REG_BAND_52_HT40_CHANNELS
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EEPROM_REG_BAND_1_CHANNELS,
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EEPROM_REG_BAND_2_CHANNELS,
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EEPROM_REG_BAND_3_CHANNELS,
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EEPROM_REG_BAND_4_CHANNELS,
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EEPROM_REG_BAND_5_CHANNELS,
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EEPROM_REG_BAND_24_HT40_CHANNELS,
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EEPROM_REG_BAND_52_HT40_CHANNELS
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},
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.verify_signature = iwlcore_eeprom_verify_signature,
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.acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
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.release_semaphore = iwlcore_eeprom_release_semaphore,
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.calib_version = iwl5000_eeprom_calib_version,
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.query_addr = iwl5000_eeprom_query_addr,
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.calib_version = iwlagn_eeprom_calib_version,
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.query_addr = iwlagn_eeprom_query_addr,
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},
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.post_associate = iwl_post_associate,
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.isr = iwl_isr_ict,
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.config_ap = iwl_config_ap,
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.temp_ops = {
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.temperature = iwl5000_temperature,
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.temperature = iwlagn_temperature,
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.set_ct_kill = iwl1000_set_ct_threshold,
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},
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.add_bcast_station = iwl_add_bcast_station,
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@ -47,7 +47,6 @@
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#include "iwl-agn-led.h"
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#include "iwl-agn-hw.h"
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#include "iwl-5000-hw.h"
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#include "iwl-6000-hw.h"
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/* Highest firmware API version supported */
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#define IWL5000_UCODE_API_MAX 2
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@ -99,60 +98,6 @@ void iwl5000_nic_config(struct iwl_priv *priv)
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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/*
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* EEPROM
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*/
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static u32 eeprom_indirect_address(const struct iwl_priv *priv, u32 address)
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{
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u16 offset = 0;
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if ((address & INDIRECT_ADDRESS) == 0)
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return address;
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switch (address & INDIRECT_TYPE_MSK) {
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case INDIRECT_HOST:
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offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_HOST);
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break;
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case INDIRECT_GENERAL:
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offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_GENERAL);
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break;
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case INDIRECT_REGULATORY:
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offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_REGULATORY);
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break;
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case INDIRECT_CALIBRATION:
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offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_CALIBRATION);
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break;
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case INDIRECT_PROCESS_ADJST:
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offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_PROCESS_ADJST);
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break;
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case INDIRECT_OTHERS:
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offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_OTHERS);
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break;
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default:
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IWL_ERR(priv, "illegal indirect type: 0x%X\n",
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address & INDIRECT_TYPE_MSK);
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break;
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}
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/* translate the offset from words to byte */
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return (address & ADDRESS_MSK) + (offset << 1);
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}
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u16 iwl5000_eeprom_calib_version(struct iwl_priv *priv)
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{
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struct iwl_eeprom_calib_hdr {
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u8 version;
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u8 pa_type;
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u16 voltage;
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} *hdr;
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hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
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EEPROM_5000_CALIB_ALL);
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return hdr->version;
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}
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static struct iwl_sensitivity_ranges iwl5000_sensitivity = {
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.min_nrg_cck = 95,
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.max_nrg_cck = 0, /* not used, set to 0 */
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@ -204,14 +149,6 @@ static struct iwl_sensitivity_ranges iwl5150_sensitivity = {
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.nrg_th_cca = 62,
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};
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const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv,
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size_t offset)
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{
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u32 address = eeprom_indirect_address(priv, offset);
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BUG_ON(address >= priv->cfg->eeprom_size);
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return &priv->eeprom[address];
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}
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static void iwl5150_set_ct_threshold(struct iwl_priv *priv)
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{
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const s32 volt2temp_coef = IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF;
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@ -285,283 +222,6 @@ int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
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return 0;
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}
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static inline u32 iwl5000_get_scd_ssn(struct iwl5000_tx_resp *tx_resp)
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{
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return le32_to_cpup((__le32 *)&tx_resp->status +
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tx_resp->frame_count) & MAX_SN;
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}
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static int iwl5000_tx_status_reply_tx(struct iwl_priv *priv,
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struct iwl_ht_agg *agg,
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struct iwl5000_tx_resp *tx_resp,
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int txq_id, u16 start_idx)
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{
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u16 status;
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struct agg_tx_status *frame_status = &tx_resp->status;
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struct ieee80211_tx_info *info = NULL;
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struct ieee80211_hdr *hdr = NULL;
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u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
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int i, sh, idx;
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u16 seq;
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if (agg->wait_for_ba)
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IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
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agg->frame_count = tx_resp->frame_count;
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agg->start_idx = start_idx;
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agg->rate_n_flags = rate_n_flags;
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agg->bitmap = 0;
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/* # frames attempted by Tx command */
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if (agg->frame_count == 1) {
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/* Only one frame was attempted; no block-ack will arrive */
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status = le16_to_cpu(frame_status[0].status);
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idx = start_idx;
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/* FIXME: code repetition */
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IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
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agg->frame_count, agg->start_idx, idx);
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info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
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info->status.rates[0].count = tx_resp->failure_frame + 1;
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info->flags &= ~IEEE80211_TX_CTL_AMPDU;
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info->flags |= iwl_tx_status_to_mac80211(status);
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iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
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/* FIXME: code repetition end */
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IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
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status & 0xff, tx_resp->failure_frame);
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IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
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agg->wait_for_ba = 0;
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} else {
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/* Two or more frames were attempted; expect block-ack */
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u64 bitmap = 0;
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int start = agg->start_idx;
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/* Construct bit-map of pending frames within Tx window */
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for (i = 0; i < agg->frame_count; i++) {
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u16 sc;
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status = le16_to_cpu(frame_status[i].status);
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seq = le16_to_cpu(frame_status[i].sequence);
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idx = SEQ_TO_INDEX(seq);
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txq_id = SEQ_TO_QUEUE(seq);
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if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
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AGG_TX_STATE_ABORT_MSK))
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continue;
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IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
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agg->frame_count, txq_id, idx);
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hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
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if (!hdr) {
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IWL_ERR(priv,
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"BUG_ON idx doesn't point to valid skb"
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" idx=%d, txq_id=%d\n", idx, txq_id);
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return -1;
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}
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sc = le16_to_cpu(hdr->seq_ctrl);
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if (idx != (SEQ_TO_SN(sc) & 0xff)) {
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IWL_ERR(priv,
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"BUG_ON idx doesn't match seq control"
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" idx=%d, seq_idx=%d, seq=%d\n",
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idx, SEQ_TO_SN(sc),
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hdr->seq_ctrl);
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return -1;
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}
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IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
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i, idx, SEQ_TO_SN(sc));
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sh = idx - start;
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if (sh > 64) {
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sh = (start - idx) + 0xff;
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bitmap = bitmap << sh;
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sh = 0;
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start = idx;
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} else if (sh < -64)
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sh = 0xff - (start - idx);
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else if (sh < 0) {
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sh = start - idx;
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start = idx;
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bitmap = bitmap << sh;
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sh = 0;
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}
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bitmap |= 1ULL << sh;
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IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
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start, (unsigned long long)bitmap);
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}
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agg->bitmap = bitmap;
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agg->start_idx = start;
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IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
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agg->frame_count, agg->start_idx,
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(unsigned long long)agg->bitmap);
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if (bitmap)
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agg->wait_for_ba = 1;
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}
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return 0;
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}
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static void iwl5000_rx_reply_tx(struct iwl_priv *priv,
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struct iwl_rx_mem_buffer *rxb)
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{
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struct iwl_rx_packet *pkt = rxb_addr(rxb);
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u16 sequence = le16_to_cpu(pkt->hdr.sequence);
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int txq_id = SEQ_TO_QUEUE(sequence);
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int index = SEQ_TO_INDEX(sequence);
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struct iwl_tx_queue *txq = &priv->txq[txq_id];
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struct ieee80211_tx_info *info;
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struct iwl5000_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
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u32 status = le16_to_cpu(tx_resp->status.status);
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int tid;
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int sta_id;
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int freed;
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if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
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IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
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"is out of range [0-%d] %d %d\n", txq_id,
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index, txq->q.n_bd, txq->q.write_ptr,
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txq->q.read_ptr);
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return;
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}
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info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
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memset(&info->status, 0, sizeof(info->status));
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tid = (tx_resp->ra_tid & IWL50_TX_RES_TID_MSK) >> IWL50_TX_RES_TID_POS;
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sta_id = (tx_resp->ra_tid & IWL50_TX_RES_RA_MSK) >> IWL50_TX_RES_RA_POS;
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if (txq->sched_retry) {
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const u32 scd_ssn = iwl5000_get_scd_ssn(tx_resp);
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struct iwl_ht_agg *agg = NULL;
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agg = &priv->stations[sta_id].tid[tid].agg;
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iwl5000_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
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/* check if BAR is needed */
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if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
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info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
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if (txq->q.read_ptr != (scd_ssn & 0xff)) {
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index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
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IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim "
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"scd_ssn=%d idx=%d txq=%d swq=%d\n",
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scd_ssn , index, txq_id, txq->swq_id);
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freed = iwl_tx_queue_reclaim(priv, txq_id, index);
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iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
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if (priv->mac80211_registered &&
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(iwl_queue_space(&txq->q) > txq->q.low_mark) &&
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(agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
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if (agg->state == IWL_AGG_OFF)
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iwl_wake_queue(priv, txq_id);
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else
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iwl_wake_queue(priv, txq->swq_id);
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}
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}
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} else {
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BUG_ON(txq_id != txq->swq_id);
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info->status.rates[0].count = tx_resp->failure_frame + 1;
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info->flags |= iwl_tx_status_to_mac80211(status);
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iwl_hwrate_to_tx_control(priv,
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le32_to_cpu(tx_resp->rate_n_flags),
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info);
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IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) rate_n_flags "
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"0x%x retries %d\n",
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txq_id,
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iwl_get_tx_fail_reason(status), status,
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le32_to_cpu(tx_resp->rate_n_flags),
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tx_resp->failure_frame);
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freed = iwl_tx_queue_reclaim(priv, txq_id, index);
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iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
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if (priv->mac80211_registered &&
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(iwl_queue_space(&txq->q) > txq->q.low_mark))
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iwl_wake_queue(priv, txq_id);
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}
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iwl_txq_check_empty(priv, sta_id, tid, txq_id);
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if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
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IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n");
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}
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void iwl5000_setup_deferred_work(struct iwl_priv *priv)
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{
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/* in 5000 the tx power calibration is done in uCode */
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priv->disable_tx_power_cal = 1;
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}
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void iwl5000_rx_handler_setup(struct iwl_priv *priv)
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{
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/* init calibration handlers */
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priv->rx_handlers[CALIBRATION_RES_NOTIFICATION] =
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iwlagn_rx_calib_result;
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priv->rx_handlers[CALIBRATION_COMPLETE_NOTIFICATION] =
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iwlagn_rx_calib_complete;
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priv->rx_handlers[REPLY_TX] = iwl5000_rx_reply_tx;
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}
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int iwl5000_hw_valid_rtc_data_addr(u32 addr)
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{
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return (addr >= IWLAGN_RTC_DATA_LOWER_BOUND) &&
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(addr < IWLAGN_RTC_DATA_UPPER_BOUND);
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}
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int iwl5000_send_tx_power(struct iwl_priv *priv)
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{
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struct iwl5000_tx_power_dbm_cmd tx_power_cmd;
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u8 tx_ant_cfg_cmd;
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/* half dBm need to multiply */
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tx_power_cmd.global_lmt = (s8)(2 * priv->tx_power_user_lmt);
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if (priv->tx_power_lmt_in_half_dbm &&
|
||||
priv->tx_power_lmt_in_half_dbm < tx_power_cmd.global_lmt) {
|
||||
/*
|
||||
* For the newer devices which using enhanced/extend tx power
|
||||
* table in EEPROM, the format is in half dBm. driver need to
|
||||
* convert to dBm format before report to mac80211.
|
||||
* By doing so, there is a possibility of 1/2 dBm resolution
|
||||
* lost. driver will perform "round-up" operation before
|
||||
* reporting, but it will cause 1/2 dBm tx power over the
|
||||
* regulatory limit. Perform the checking here, if the
|
||||
* "tx_power_user_lmt" is higher than EEPROM value (in
|
||||
* half-dBm format), lower the tx power based on EEPROM
|
||||
*/
|
||||
tx_power_cmd.global_lmt = priv->tx_power_lmt_in_half_dbm;
|
||||
}
|
||||
tx_power_cmd.flags = IWL50_TX_POWER_NO_CLOSED;
|
||||
tx_power_cmd.srv_chan_lmt = IWL50_TX_POWER_AUTO;
|
||||
|
||||
if (IWL_UCODE_API(priv->ucode_ver) == 1)
|
||||
tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD_V1;
|
||||
else
|
||||
tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD;
|
||||
|
||||
return iwl_send_cmd_pdu_async(priv, tx_ant_cfg_cmd,
|
||||
sizeof(tx_power_cmd), &tx_power_cmd,
|
||||
NULL);
|
||||
}
|
||||
|
||||
void iwl5000_temperature(struct iwl_priv *priv)
|
||||
{
|
||||
/* store temperature from statistics (in Celsius) */
|
||||
priv->temperature = le32_to_cpu(priv->statistics.general.temperature);
|
||||
iwl_tt_handler(priv);
|
||||
}
|
||||
|
||||
static void iwl5150_temperature(struct iwl_priv *priv)
|
||||
{
|
||||
u32 vt = 0;
|
||||
@ -616,9 +276,9 @@ struct iwl_lib_ops iwl5000_lib = {
|
||||
.txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
|
||||
.txq_free_tfd = iwl_hw_txq_free_tfd,
|
||||
.txq_init = iwl_hw_tx_queue_init,
|
||||
.rx_handler_setup = iwl5000_rx_handler_setup,
|
||||
.setup_deferred_work = iwl5000_setup_deferred_work,
|
||||
.is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr,
|
||||
.rx_handler_setup = iwlagn_rx_handler_setup,
|
||||
.setup_deferred_work = iwlagn_setup_deferred_work,
|
||||
.is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
|
||||
.dump_nic_event_log = iwl_dump_nic_event_log,
|
||||
.dump_nic_error_log = iwl_dump_nic_error_log,
|
||||
.dump_csr = iwl_dump_csr,
|
||||
@ -626,7 +286,7 @@ struct iwl_lib_ops iwl5000_lib = {
|
||||
.load_ucode = iwlagn_load_ucode,
|
||||
.init_alive_start = iwlagn_init_alive_start,
|
||||
.alive_notify = iwlagn_alive_notify,
|
||||
.send_tx_power = iwl5000_send_tx_power,
|
||||
.send_tx_power = iwlagn_send_tx_power,
|
||||
.update_chain_flags = iwl_update_chain_flags,
|
||||
.set_channel_switch = iwl5000_hw_channel_switch,
|
||||
.apm_ops = {
|
||||
@ -637,25 +297,25 @@ struct iwl_lib_ops iwl5000_lib = {
|
||||
},
|
||||
.eeprom_ops = {
|
||||
.regulatory_bands = {
|
||||
EEPROM_5000_REG_BAND_1_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_2_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_3_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_4_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_5_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_24_HT40_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_52_HT40_CHANNELS
|
||||
EEPROM_REG_BAND_1_CHANNELS,
|
||||
EEPROM_REG_BAND_2_CHANNELS,
|
||||
EEPROM_REG_BAND_3_CHANNELS,
|
||||
EEPROM_REG_BAND_4_CHANNELS,
|
||||
EEPROM_REG_BAND_5_CHANNELS,
|
||||
EEPROM_REG_BAND_24_HT40_CHANNELS,
|
||||
EEPROM_REG_BAND_52_HT40_CHANNELS
|
||||
},
|
||||
.verify_signature = iwlcore_eeprom_verify_signature,
|
||||
.acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
|
||||
.release_semaphore = iwlcore_eeprom_release_semaphore,
|
||||
.calib_version = iwl5000_eeprom_calib_version,
|
||||
.query_addr = iwl5000_eeprom_query_addr,
|
||||
.calib_version = iwlagn_eeprom_calib_version,
|
||||
.query_addr = iwlagn_eeprom_query_addr,
|
||||
},
|
||||
.post_associate = iwl_post_associate,
|
||||
.isr = iwl_isr_ict,
|
||||
.config_ap = iwl_config_ap,
|
||||
.temp_ops = {
|
||||
.temperature = iwl5000_temperature,
|
||||
.temperature = iwlagn_temperature,
|
||||
.set_ct_kill = iwl5000_set_ct_threshold,
|
||||
},
|
||||
.add_bcast_station = iwl_add_bcast_station,
|
||||
@ -674,16 +334,16 @@ static struct iwl_lib_ops iwl5150_lib = {
|
||||
.txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
|
||||
.txq_free_tfd = iwl_hw_txq_free_tfd,
|
||||
.txq_init = iwl_hw_tx_queue_init,
|
||||
.rx_handler_setup = iwl5000_rx_handler_setup,
|
||||
.setup_deferred_work = iwl5000_setup_deferred_work,
|
||||
.is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr,
|
||||
.rx_handler_setup = iwlagn_rx_handler_setup,
|
||||
.setup_deferred_work = iwlagn_setup_deferred_work,
|
||||
.is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
|
||||
.dump_nic_event_log = iwl_dump_nic_event_log,
|
||||
.dump_nic_error_log = iwl_dump_nic_error_log,
|
||||
.dump_csr = iwl_dump_csr,
|
||||
.load_ucode = iwlagn_load_ucode,
|
||||
.init_alive_start = iwlagn_init_alive_start,
|
||||
.alive_notify = iwlagn_alive_notify,
|
||||
.send_tx_power = iwl5000_send_tx_power,
|
||||
.send_tx_power = iwlagn_send_tx_power,
|
||||
.update_chain_flags = iwl_update_chain_flags,
|
||||
.set_channel_switch = iwl5000_hw_channel_switch,
|
||||
.apm_ops = {
|
||||
@ -694,19 +354,19 @@ static struct iwl_lib_ops iwl5150_lib = {
|
||||
},
|
||||
.eeprom_ops = {
|
||||
.regulatory_bands = {
|
||||
EEPROM_5000_REG_BAND_1_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_2_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_3_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_4_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_5_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_24_HT40_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_52_HT40_CHANNELS
|
||||
EEPROM_REG_BAND_1_CHANNELS,
|
||||
EEPROM_REG_BAND_2_CHANNELS,
|
||||
EEPROM_REG_BAND_3_CHANNELS,
|
||||
EEPROM_REG_BAND_4_CHANNELS,
|
||||
EEPROM_REG_BAND_5_CHANNELS,
|
||||
EEPROM_REG_BAND_24_HT40_CHANNELS,
|
||||
EEPROM_REG_BAND_52_HT40_CHANNELS
|
||||
},
|
||||
.verify_signature = iwlcore_eeprom_verify_signature,
|
||||
.acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
|
||||
.release_semaphore = iwlcore_eeprom_release_semaphore,
|
||||
.calib_version = iwl5000_eeprom_calib_version,
|
||||
.query_addr = iwl5000_eeprom_query_addr,
|
||||
.calib_version = iwlagn_eeprom_calib_version,
|
||||
.query_addr = iwlagn_eeprom_query_addr,
|
||||
},
|
||||
.post_associate = iwl_post_associate,
|
||||
.isr = iwl_isr_ict,
|
||||
|
@ -234,9 +234,9 @@ static struct iwl_lib_ops iwl6000_lib = {
|
||||
.txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
|
||||
.txq_free_tfd = iwl_hw_txq_free_tfd,
|
||||
.txq_init = iwl_hw_tx_queue_init,
|
||||
.rx_handler_setup = iwl5000_rx_handler_setup,
|
||||
.setup_deferred_work = iwl5000_setup_deferred_work,
|
||||
.is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr,
|
||||
.rx_handler_setup = iwlagn_rx_handler_setup,
|
||||
.setup_deferred_work = iwlagn_setup_deferred_work,
|
||||
.is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
|
||||
.load_ucode = iwlagn_load_ucode,
|
||||
.dump_nic_event_log = iwl_dump_nic_event_log,
|
||||
.dump_nic_error_log = iwl_dump_nic_error_log,
|
||||
@ -244,7 +244,7 @@ static struct iwl_lib_ops iwl6000_lib = {
|
||||
.dump_fh = iwl_dump_fh,
|
||||
.init_alive_start = iwlagn_init_alive_start,
|
||||
.alive_notify = iwlagn_alive_notify,
|
||||
.send_tx_power = iwl5000_send_tx_power,
|
||||
.send_tx_power = iwlagn_send_tx_power,
|
||||
.update_chain_flags = iwl_update_chain_flags,
|
||||
.set_channel_switch = iwl6000_hw_channel_switch,
|
||||
.apm_ops = {
|
||||
@ -255,26 +255,26 @@ static struct iwl_lib_ops iwl6000_lib = {
|
||||
},
|
||||
.eeprom_ops = {
|
||||
.regulatory_bands = {
|
||||
EEPROM_5000_REG_BAND_1_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_2_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_3_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_4_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_5_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_24_HT40_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_52_HT40_CHANNELS
|
||||
EEPROM_REG_BAND_1_CHANNELS,
|
||||
EEPROM_REG_BAND_2_CHANNELS,
|
||||
EEPROM_REG_BAND_3_CHANNELS,
|
||||
EEPROM_REG_BAND_4_CHANNELS,
|
||||
EEPROM_REG_BAND_5_CHANNELS,
|
||||
EEPROM_REG_BAND_24_HT40_CHANNELS,
|
||||
EEPROM_REG_BAND_52_HT40_CHANNELS
|
||||
},
|
||||
.verify_signature = iwlcore_eeprom_verify_signature,
|
||||
.acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
|
||||
.release_semaphore = iwlcore_eeprom_release_semaphore,
|
||||
.calib_version = iwl5000_eeprom_calib_version,
|
||||
.query_addr = iwl5000_eeprom_query_addr,
|
||||
.calib_version = iwlagn_eeprom_calib_version,
|
||||
.query_addr = iwlagn_eeprom_query_addr,
|
||||
.update_enhanced_txpower = iwlcore_eeprom_enhanced_txpower,
|
||||
},
|
||||
.post_associate = iwl_post_associate,
|
||||
.isr = iwl_isr_ict,
|
||||
.config_ap = iwl_config_ap,
|
||||
.temp_ops = {
|
||||
.temperature = iwl5000_temperature,
|
||||
.temperature = iwlagn_temperature,
|
||||
.set_ct_kill = iwl6000_set_ct_threshold,
|
||||
},
|
||||
.add_bcast_station = iwl_add_bcast_station,
|
||||
@ -301,9 +301,9 @@ static struct iwl_lib_ops iwl6050_lib = {
|
||||
.txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
|
||||
.txq_free_tfd = iwl_hw_txq_free_tfd,
|
||||
.txq_init = iwl_hw_tx_queue_init,
|
||||
.rx_handler_setup = iwl5000_rx_handler_setup,
|
||||
.setup_deferred_work = iwl5000_setup_deferred_work,
|
||||
.is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr,
|
||||
.rx_handler_setup = iwlagn_rx_handler_setup,
|
||||
.setup_deferred_work = iwlagn_setup_deferred_work,
|
||||
.is_valid_rtc_data_addr = iwlagn_hw_valid_rtc_data_addr,
|
||||
.load_ucode = iwlagn_load_ucode,
|
||||
.dump_nic_event_log = iwl_dump_nic_event_log,
|
||||
.dump_nic_error_log = iwl_dump_nic_error_log,
|
||||
@ -311,7 +311,7 @@ static struct iwl_lib_ops iwl6050_lib = {
|
||||
.dump_fh = iwl_dump_fh,
|
||||
.init_alive_start = iwlagn_init_alive_start,
|
||||
.alive_notify = iwlagn_alive_notify,
|
||||
.send_tx_power = iwl5000_send_tx_power,
|
||||
.send_tx_power = iwlagn_send_tx_power,
|
||||
.update_chain_flags = iwl_update_chain_flags,
|
||||
.set_channel_switch = iwl6000_hw_channel_switch,
|
||||
.apm_ops = {
|
||||
@ -322,26 +322,26 @@ static struct iwl_lib_ops iwl6050_lib = {
|
||||
},
|
||||
.eeprom_ops = {
|
||||
.regulatory_bands = {
|
||||
EEPROM_5000_REG_BAND_1_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_2_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_3_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_4_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_5_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_24_HT40_CHANNELS,
|
||||
EEPROM_5000_REG_BAND_52_HT40_CHANNELS
|
||||
EEPROM_REG_BAND_1_CHANNELS,
|
||||
EEPROM_REG_BAND_2_CHANNELS,
|
||||
EEPROM_REG_BAND_3_CHANNELS,
|
||||
EEPROM_REG_BAND_4_CHANNELS,
|
||||
EEPROM_REG_BAND_5_CHANNELS,
|
||||
EEPROM_REG_BAND_24_HT40_CHANNELS,
|
||||
EEPROM_REG_BAND_52_HT40_CHANNELS
|
||||
},
|
||||
.verify_signature = iwlcore_eeprom_verify_signature,
|
||||
.acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
|
||||
.release_semaphore = iwlcore_eeprom_release_semaphore,
|
||||
.calib_version = iwl5000_eeprom_calib_version,
|
||||
.query_addr = iwl5000_eeprom_query_addr,
|
||||
.calib_version = iwlagn_eeprom_calib_version,
|
||||
.query_addr = iwlagn_eeprom_query_addr,
|
||||
.update_enhanced_txpower = iwlcore_eeprom_enhanced_txpower,
|
||||
},
|
||||
.post_associate = iwl_post_associate,
|
||||
.isr = iwl_isr_ict,
|
||||
.config_ap = iwl_config_ap,
|
||||
.temp_ops = {
|
||||
.temperature = iwl5000_temperature,
|
||||
.temperature = iwlagn_temperature,
|
||||
.set_ct_kill = iwl6000_set_ct_threshold,
|
||||
.set_calib_version = iwl6050_set_calib_version,
|
||||
},
|
||||
|
377
drivers/net/wireless/iwlwifi/iwl-agn-lib.c
Normal file
377
drivers/net/wireless/iwlwifi/iwl-agn-lib.c
Normal file
@ -0,0 +1,377 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* GPL LICENSE SUMMARY
|
||||
*
|
||||
* Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
|
||||
* USA
|
||||
*
|
||||
* The full GNU General Public License is included in this distribution
|
||||
* in the file called LICENSE.GPL.
|
||||
*
|
||||
* Contact Information:
|
||||
* Intel Linux Wireless <ilw@linux.intel.com>
|
||||
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
#include "iwl-dev.h"
|
||||
#include "iwl-core.h"
|
||||
#include "iwl-io.h"
|
||||
#include "iwl-helpers.h"
|
||||
#include "iwl-agn-hw.h"
|
||||
#include "iwl-agn.h"
|
||||
|
||||
static inline u32 iwlagn_get_scd_ssn(struct iwl5000_tx_resp *tx_resp)
|
||||
{
|
||||
return le32_to_cpup((__le32 *)&tx_resp->status +
|
||||
tx_resp->frame_count) & MAX_SN;
|
||||
}
|
||||
|
||||
static int iwlagn_tx_status_reply_tx(struct iwl_priv *priv,
|
||||
struct iwl_ht_agg *agg,
|
||||
struct iwl5000_tx_resp *tx_resp,
|
||||
int txq_id, u16 start_idx)
|
||||
{
|
||||
u16 status;
|
||||
struct agg_tx_status *frame_status = &tx_resp->status;
|
||||
struct ieee80211_tx_info *info = NULL;
|
||||
struct ieee80211_hdr *hdr = NULL;
|
||||
u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
|
||||
int i, sh, idx;
|
||||
u16 seq;
|
||||
|
||||
if (agg->wait_for_ba)
|
||||
IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
|
||||
|
||||
agg->frame_count = tx_resp->frame_count;
|
||||
agg->start_idx = start_idx;
|
||||
agg->rate_n_flags = rate_n_flags;
|
||||
agg->bitmap = 0;
|
||||
|
||||
/* # frames attempted by Tx command */
|
||||
if (agg->frame_count == 1) {
|
||||
/* Only one frame was attempted; no block-ack will arrive */
|
||||
status = le16_to_cpu(frame_status[0].status);
|
||||
idx = start_idx;
|
||||
|
||||
/* FIXME: code repetition */
|
||||
IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
|
||||
agg->frame_count, agg->start_idx, idx);
|
||||
|
||||
info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
|
||||
info->status.rates[0].count = tx_resp->failure_frame + 1;
|
||||
info->flags &= ~IEEE80211_TX_CTL_AMPDU;
|
||||
info->flags |= iwl_tx_status_to_mac80211(status);
|
||||
iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
|
||||
|
||||
/* FIXME: code repetition end */
|
||||
|
||||
IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
|
||||
status & 0xff, tx_resp->failure_frame);
|
||||
IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
|
||||
|
||||
agg->wait_for_ba = 0;
|
||||
} else {
|
||||
/* Two or more frames were attempted; expect block-ack */
|
||||
u64 bitmap = 0;
|
||||
int start = agg->start_idx;
|
||||
|
||||
/* Construct bit-map of pending frames within Tx window */
|
||||
for (i = 0; i < agg->frame_count; i++) {
|
||||
u16 sc;
|
||||
status = le16_to_cpu(frame_status[i].status);
|
||||
seq = le16_to_cpu(frame_status[i].sequence);
|
||||
idx = SEQ_TO_INDEX(seq);
|
||||
txq_id = SEQ_TO_QUEUE(seq);
|
||||
|
||||
if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
|
||||
AGG_TX_STATE_ABORT_MSK))
|
||||
continue;
|
||||
|
||||
IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
|
||||
agg->frame_count, txq_id, idx);
|
||||
|
||||
hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
|
||||
if (!hdr) {
|
||||
IWL_ERR(priv,
|
||||
"BUG_ON idx doesn't point to valid skb"
|
||||
" idx=%d, txq_id=%d\n", idx, txq_id);
|
||||
return -1;
|
||||
}
|
||||
|
||||
sc = le16_to_cpu(hdr->seq_ctrl);
|
||||
if (idx != (SEQ_TO_SN(sc) & 0xff)) {
|
||||
IWL_ERR(priv,
|
||||
"BUG_ON idx doesn't match seq control"
|
||||
" idx=%d, seq_idx=%d, seq=%d\n",
|
||||
idx, SEQ_TO_SN(sc),
|
||||
hdr->seq_ctrl);
|
||||
return -1;
|
||||
}
|
||||
|
||||
IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
|
||||
i, idx, SEQ_TO_SN(sc));
|
||||
|
||||
sh = idx - start;
|
||||
if (sh > 64) {
|
||||
sh = (start - idx) + 0xff;
|
||||
bitmap = bitmap << sh;
|
||||
sh = 0;
|
||||
start = idx;
|
||||
} else if (sh < -64)
|
||||
sh = 0xff - (start - idx);
|
||||
else if (sh < 0) {
|
||||
sh = start - idx;
|
||||
start = idx;
|
||||
bitmap = bitmap << sh;
|
||||
sh = 0;
|
||||
}
|
||||
bitmap |= 1ULL << sh;
|
||||
IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
|
||||
start, (unsigned long long)bitmap);
|
||||
}
|
||||
|
||||
agg->bitmap = bitmap;
|
||||
agg->start_idx = start;
|
||||
IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
|
||||
agg->frame_count, agg->start_idx,
|
||||
(unsigned long long)agg->bitmap);
|
||||
|
||||
if (bitmap)
|
||||
agg->wait_for_ba = 1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void iwlagn_rx_reply_tx(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb)
|
||||
{
|
||||
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
||||
u16 sequence = le16_to_cpu(pkt->hdr.sequence);
|
||||
int txq_id = SEQ_TO_QUEUE(sequence);
|
||||
int index = SEQ_TO_INDEX(sequence);
|
||||
struct iwl_tx_queue *txq = &priv->txq[txq_id];
|
||||
struct ieee80211_tx_info *info;
|
||||
struct iwl5000_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
|
||||
u32 status = le16_to_cpu(tx_resp->status.status);
|
||||
int tid;
|
||||
int sta_id;
|
||||
int freed;
|
||||
|
||||
if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
|
||||
IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
|
||||
"is out of range [0-%d] %d %d\n", txq_id,
|
||||
index, txq->q.n_bd, txq->q.write_ptr,
|
||||
txq->q.read_ptr);
|
||||
return;
|
||||
}
|
||||
|
||||
info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
|
||||
memset(&info->status, 0, sizeof(info->status));
|
||||
|
||||
tid = (tx_resp->ra_tid & IWL50_TX_RES_TID_MSK) >> IWL50_TX_RES_TID_POS;
|
||||
sta_id = (tx_resp->ra_tid & IWL50_TX_RES_RA_MSK) >> IWL50_TX_RES_RA_POS;
|
||||
|
||||
if (txq->sched_retry) {
|
||||
const u32 scd_ssn = iwlagn_get_scd_ssn(tx_resp);
|
||||
struct iwl_ht_agg *agg = NULL;
|
||||
|
||||
agg = &priv->stations[sta_id].tid[tid].agg;
|
||||
|
||||
iwlagn_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
|
||||
|
||||
/* check if BAR is needed */
|
||||
if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
|
||||
info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
|
||||
|
||||
if (txq->q.read_ptr != (scd_ssn & 0xff)) {
|
||||
index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
|
||||
IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim "
|
||||
"scd_ssn=%d idx=%d txq=%d swq=%d\n",
|
||||
scd_ssn , index, txq_id, txq->swq_id);
|
||||
|
||||
freed = iwl_tx_queue_reclaim(priv, txq_id, index);
|
||||
iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
|
||||
|
||||
if (priv->mac80211_registered &&
|
||||
(iwl_queue_space(&txq->q) > txq->q.low_mark) &&
|
||||
(agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
|
||||
if (agg->state == IWL_AGG_OFF)
|
||||
iwl_wake_queue(priv, txq_id);
|
||||
else
|
||||
iwl_wake_queue(priv, txq->swq_id);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
BUG_ON(txq_id != txq->swq_id);
|
||||
|
||||
info->status.rates[0].count = tx_resp->failure_frame + 1;
|
||||
info->flags |= iwl_tx_status_to_mac80211(status);
|
||||
iwl_hwrate_to_tx_control(priv,
|
||||
le32_to_cpu(tx_resp->rate_n_flags),
|
||||
info);
|
||||
|
||||
IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) rate_n_flags "
|
||||
"0x%x retries %d\n",
|
||||
txq_id,
|
||||
iwl_get_tx_fail_reason(status), status,
|
||||
le32_to_cpu(tx_resp->rate_n_flags),
|
||||
tx_resp->failure_frame);
|
||||
|
||||
freed = iwl_tx_queue_reclaim(priv, txq_id, index);
|
||||
iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
|
||||
|
||||
if (priv->mac80211_registered &&
|
||||
(iwl_queue_space(&txq->q) > txq->q.low_mark))
|
||||
iwl_wake_queue(priv, txq_id);
|
||||
}
|
||||
|
||||
iwl_txq_check_empty(priv, sta_id, tid, txq_id);
|
||||
|
||||
if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
|
||||
IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n");
|
||||
}
|
||||
|
||||
void iwlagn_rx_handler_setup(struct iwl_priv *priv)
|
||||
{
|
||||
/* init calibration handlers */
|
||||
priv->rx_handlers[CALIBRATION_RES_NOTIFICATION] =
|
||||
iwlagn_rx_calib_result;
|
||||
priv->rx_handlers[CALIBRATION_COMPLETE_NOTIFICATION] =
|
||||
iwlagn_rx_calib_complete;
|
||||
priv->rx_handlers[REPLY_TX] = iwlagn_rx_reply_tx;
|
||||
}
|
||||
|
||||
void iwlagn_setup_deferred_work(struct iwl_priv *priv)
|
||||
{
|
||||
/* in agn, the tx power calibration is done in uCode */
|
||||
priv->disable_tx_power_cal = 1;
|
||||
}
|
||||
|
||||
int iwlagn_hw_valid_rtc_data_addr(u32 addr)
|
||||
{
|
||||
return (addr >= IWLAGN_RTC_DATA_LOWER_BOUND) &&
|
||||
(addr < IWLAGN_RTC_DATA_UPPER_BOUND);
|
||||
}
|
||||
|
||||
int iwlagn_send_tx_power(struct iwl_priv *priv)
|
||||
{
|
||||
struct iwl5000_tx_power_dbm_cmd tx_power_cmd;
|
||||
u8 tx_ant_cfg_cmd;
|
||||
|
||||
/* half dBm need to multiply */
|
||||
tx_power_cmd.global_lmt = (s8)(2 * priv->tx_power_user_lmt);
|
||||
|
||||
if (priv->tx_power_lmt_in_half_dbm &&
|
||||
priv->tx_power_lmt_in_half_dbm < tx_power_cmd.global_lmt) {
|
||||
/*
|
||||
* For the newer devices which using enhanced/extend tx power
|
||||
* table in EEPROM, the format is in half dBm. driver need to
|
||||
* convert to dBm format before report to mac80211.
|
||||
* By doing so, there is a possibility of 1/2 dBm resolution
|
||||
* lost. driver will perform "round-up" operation before
|
||||
* reporting, but it will cause 1/2 dBm tx power over the
|
||||
* regulatory limit. Perform the checking here, if the
|
||||
* "tx_power_user_lmt" is higher than EEPROM value (in
|
||||
* half-dBm format), lower the tx power based on EEPROM
|
||||
*/
|
||||
tx_power_cmd.global_lmt = priv->tx_power_lmt_in_half_dbm;
|
||||
}
|
||||
tx_power_cmd.flags = IWL50_TX_POWER_NO_CLOSED;
|
||||
tx_power_cmd.srv_chan_lmt = IWL50_TX_POWER_AUTO;
|
||||
|
||||
if (IWL_UCODE_API(priv->ucode_ver) == 1)
|
||||
tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD_V1;
|
||||
else
|
||||
tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD;
|
||||
|
||||
return iwl_send_cmd_pdu_async(priv, tx_ant_cfg_cmd,
|
||||
sizeof(tx_power_cmd), &tx_power_cmd,
|
||||
NULL);
|
||||
}
|
||||
|
||||
void iwlagn_temperature(struct iwl_priv *priv)
|
||||
{
|
||||
/* store temperature from statistics (in Celsius) */
|
||||
priv->temperature = le32_to_cpu(priv->statistics.general.temperature);
|
||||
iwl_tt_handler(priv);
|
||||
}
|
||||
|
||||
u16 iwlagn_eeprom_calib_version(struct iwl_priv *priv)
|
||||
{
|
||||
struct iwl_eeprom_calib_hdr {
|
||||
u8 version;
|
||||
u8 pa_type;
|
||||
u16 voltage;
|
||||
} *hdr;
|
||||
|
||||
hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
|
||||
EEPROM_5000_CALIB_ALL);
|
||||
return hdr->version;
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* EEPROM
|
||||
*/
|
||||
static u32 eeprom_indirect_address(const struct iwl_priv *priv, u32 address)
|
||||
{
|
||||
u16 offset = 0;
|
||||
|
||||
if ((address & INDIRECT_ADDRESS) == 0)
|
||||
return address;
|
||||
|
||||
switch (address & INDIRECT_TYPE_MSK) {
|
||||
case INDIRECT_HOST:
|
||||
offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_HOST);
|
||||
break;
|
||||
case INDIRECT_GENERAL:
|
||||
offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_GENERAL);
|
||||
break;
|
||||
case INDIRECT_REGULATORY:
|
||||
offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_REGULATORY);
|
||||
break;
|
||||
case INDIRECT_CALIBRATION:
|
||||
offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_CALIBRATION);
|
||||
break;
|
||||
case INDIRECT_PROCESS_ADJST:
|
||||
offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_PROCESS_ADJST);
|
||||
break;
|
||||
case INDIRECT_OTHERS:
|
||||
offset = iwl_eeprom_query16(priv, EEPROM_5000_LINK_OTHERS);
|
||||
break;
|
||||
default:
|
||||
IWL_ERR(priv, "illegal indirect type: 0x%X\n",
|
||||
address & INDIRECT_TYPE_MSK);
|
||||
break;
|
||||
}
|
||||
|
||||
/* translate the offset from words to byte */
|
||||
return (address & ADDRESS_MSK) + (offset << 1);
|
||||
}
|
||||
|
||||
const u8 *iwlagn_eeprom_query_addr(const struct iwl_priv *priv,
|
||||
size_t offset)
|
||||
{
|
||||
u32 address = eeprom_indirect_address(priv, offset);
|
||||
BUG_ON(address >= priv->cfg->eeprom_size);
|
||||
return &priv->eeprom[address];
|
||||
}
|
@ -103,4 +103,14 @@ void iwlagn_rx_calib_complete(struct iwl_priv *priv,
|
||||
void iwlagn_init_alive_start(struct iwl_priv *priv);
|
||||
int iwlagn_alive_notify(struct iwl_priv *priv);
|
||||
|
||||
/* lib */
|
||||
void iwlagn_rx_handler_setup(struct iwl_priv *priv);
|
||||
void iwlagn_setup_deferred_work(struct iwl_priv *priv);
|
||||
int iwlagn_hw_valid_rtc_data_addr(u32 addr);
|
||||
int iwlagn_send_tx_power(struct iwl_priv *priv);
|
||||
void iwlagn_temperature(struct iwl_priv *priv);
|
||||
u16 iwlagn_eeprom_calib_version(struct iwl_priv *priv);
|
||||
const u8 *iwlagn_eeprom_query_addr(const struct iwl_priv *priv,
|
||||
size_t offset);
|
||||
|
||||
#endif /* __iwl_agn_h__ */
|
||||
|
@ -188,19 +188,19 @@ struct iwl_eeprom_enhanced_txpwr {
|
||||
/* 5000 regulatory - indirect access */
|
||||
#define EEPROM_5000_REG_SKU_ID ((0x02)\
|
||||
| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 4 bytes */
|
||||
#define EEPROM_5000_REG_BAND_1_CHANNELS ((0x08)\
|
||||
#define EEPROM_REG_BAND_1_CHANNELS ((0x08)\
|
||||
| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 28 bytes */
|
||||
#define EEPROM_5000_REG_BAND_2_CHANNELS ((0x26)\
|
||||
#define EEPROM_REG_BAND_2_CHANNELS ((0x26)\
|
||||
| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 26 bytes */
|
||||
#define EEPROM_5000_REG_BAND_3_CHANNELS ((0x42)\
|
||||
#define EEPROM_REG_BAND_3_CHANNELS ((0x42)\
|
||||
| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */
|
||||
#define EEPROM_5000_REG_BAND_4_CHANNELS ((0x5C)\
|
||||
#define EEPROM_REG_BAND_4_CHANNELS ((0x5C)\
|
||||
| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 22 bytes */
|
||||
#define EEPROM_5000_REG_BAND_5_CHANNELS ((0x74)\
|
||||
#define EEPROM_REG_BAND_5_CHANNELS ((0x74)\
|
||||
| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 12 bytes */
|
||||
#define EEPROM_5000_REG_BAND_24_HT40_CHANNELS ((0x82)\
|
||||
#define EEPROM_REG_BAND_24_HT40_CHANNELS ((0x82)\
|
||||
| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 14 bytes */
|
||||
#define EEPROM_5000_REG_BAND_52_HT40_CHANNELS ((0x92)\
|
||||
#define EEPROM_REG_BAND_52_HT40_CHANNELS ((0x92)\
|
||||
| INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 22 bytes */
|
||||
|
||||
/* 6000 and up regulatory tx power - indirect access */
|
||||
|
Loading…
Reference in New Issue
Block a user