drm/amd/pm: retain the fine grain tuning parameters after resume
This patch is to retain the fine grain tuning parameters after resume for legacy APU, it will cover Raven/Raven2/Picasso. Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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				| @ -82,7 +82,8 @@ int phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr) | ||||
| 
 | ||||
| 	/* Skip for suspend/resume case */ | ||||
| 	if (!hwmgr->pp_one_vf && smum_is_dpm_running(hwmgr) | ||||
| 	    && !amdgpu_passthrough(adev) && adev->in_suspend) { | ||||
| 	    && !amdgpu_passthrough(adev) && adev->in_suspend | ||||
| 		&& adev->asic_type != CHIP_RAVEN) { | ||||
| 		pr_info("dpm has been enabled\n"); | ||||
| 		return 0; | ||||
| 	} | ||||
|  | ||||
| @ -377,6 +377,27 @@ static int smu10_enable_gfx_off(struct pp_hwmgr *hwmgr) | ||||
| 
 | ||||
| static int smu10_enable_dpm_tasks(struct pp_hwmgr *hwmgr) | ||||
| { | ||||
| 	struct amdgpu_device *adev = hwmgr->adev; | ||||
| 	struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend); | ||||
| 	int ret = -EINVAL; | ||||
| 
 | ||||
| 	if (adev->in_suspend) { | ||||
| 		pr_info("restore the fine grain parameters\n"); | ||||
| 
 | ||||
| 		ret = smum_send_msg_to_smc_with_parameter(hwmgr, | ||||
| 					PPSMC_MSG_SetHardMinGfxClk, | ||||
| 					smu10_data->gfx_actual_soft_min_freq, | ||||
| 					NULL); | ||||
| 		if (ret) | ||||
| 			return ret; | ||||
| 		ret = smum_send_msg_to_smc_with_parameter(hwmgr, | ||||
| 					PPSMC_MSG_SetSoftMaxGfxClk, | ||||
| 					smu10_data->gfx_actual_soft_max_freq, | ||||
| 					NULL); | ||||
| 		if (ret) | ||||
| 			return ret; | ||||
| 	} | ||||
| 
 | ||||
| 	return 0; | ||||
| } | ||||
| 
 | ||||
|  | ||||
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