forked from Minki/linux
Merge branch 'x86-asm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 asm updates from Ingo Molnar: - Add UMIP emulation/spoofing for 64-bit processes as well, because of Wine based gaming. - Clean up symbols/labels in low level asm code - Add an assembly optimized mul_u64_u32_div() implementation on x86-64. * 'x86-asm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/umip: Add emulation (spoofing) for UMIP covered instructions in 64-bit processes as well x86/asm: Make some functions local labels x86/asm/suspend: Get rid of bogus_64_magic x86/math64: Provide a sane mul_u64_u32_div() implementation for x86_64
This commit is contained in:
commit
df4c0b18f2
@ -140,7 +140,7 @@ ENTRY(startup_32)
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/*
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* Jump to the relocated address.
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*/
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leal relocated(%ebx), %eax
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leal .Lrelocated(%ebx), %eax
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jmp *%eax
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ENDPROC(startup_32)
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@ -209,7 +209,7 @@ ENDPROC(efi32_stub_entry)
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#endif
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.text
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relocated:
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.Lrelocated:
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/*
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* Clear BSS (stack is currently empty)
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|
@ -87,7 +87,7 @@ ENTRY(startup_32)
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call verify_cpu
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testl %eax, %eax
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jnz no_longmode
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jnz .Lno_longmode
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/*
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* Compute the delta between where we were compiled to run at
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@ -322,7 +322,7 @@ ENTRY(startup_64)
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1: popq %rdi
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subq $1b, %rdi
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call adjust_got
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call .Ladjust_got
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/*
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* At this point we are in long mode with 4-level paging enabled,
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@ -421,7 +421,7 @@ trampoline_return:
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/* The new adjustment is the relocation address */
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movq %rbx, %rdi
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call adjust_got
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call .Ladjust_got
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/*
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* Copy the compressed kernel to the end of our buffer
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@ -440,7 +440,7 @@ trampoline_return:
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/*
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* Jump to the relocated address.
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*/
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leaq relocated(%rbx), %rax
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leaq .Lrelocated(%rbx), %rax
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jmp *%rax
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#ifdef CONFIG_EFI_STUB
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@ -511,7 +511,7 @@ ENDPROC(efi64_stub_entry)
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#endif
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.text
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relocated:
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.Lrelocated:
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/*
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* Clear BSS (stack is currently empty)
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@ -548,7 +548,7 @@ relocated:
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* first time we touch GOT).
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* RDI is the new adjustment to apply.
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*/
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adjust_got:
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.Ladjust_got:
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/* Walk through the GOT adding the address to the entries */
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leaq _got(%rip), %rdx
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leaq _egot(%rip), %rcx
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@ -622,7 +622,7 @@ ENTRY(trampoline_32bit_src)
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movl %eax, %cr4
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/* Calculate address of paging_enabled() once we are executing in the trampoline */
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leal paging_enabled - trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_OFFSET(%ecx), %eax
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leal .Lpaging_enabled - trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_OFFSET(%ecx), %eax
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/* Prepare the stack for far return to Long Mode */
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pushl $__KERNEL_CS
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@ -635,7 +635,7 @@ ENTRY(trampoline_32bit_src)
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lret
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.code64
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paging_enabled:
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.Lpaging_enabled:
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/* Return from the trampoline */
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jmp *%rdi
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@ -647,7 +647,7 @@ paging_enabled:
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.org trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_SIZE
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.code32
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no_longmode:
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.Lno_longmode:
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/* This isn't an x86-64 CPU, so hang intentionally, we cannot continue */
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1:
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hlt
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|
@ -1058,10 +1058,10 @@ ENTRY(native_load_gs_index)
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ENDPROC(native_load_gs_index)
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EXPORT_SYMBOL(native_load_gs_index)
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_ASM_EXTABLE(.Lgs_change, bad_gs)
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_ASM_EXTABLE(.Lgs_change, .Lbad_gs)
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.section .fixup, "ax"
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/* running with kernelgs */
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bad_gs:
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.Lbad_gs:
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SWAPGS /* switch back to user gs */
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.macro ZAP_GS
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/* This can't be a string because the preprocessor needs to see it. */
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|
@ -73,6 +73,19 @@ static inline u64 mul_u32_u32(u32 a, u32 b)
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#else
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# include <asm-generic/div64.h>
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static inline u64 mul_u64_u32_div(u64 a, u32 mul, u32 div)
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{
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u64 q;
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asm ("mulq %2; divq %3" : "=a" (q)
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: "a" (a), "rm" ((u64)mul), "rm" ((u64)div)
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: "rdx");
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return q;
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}
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#define mul_u64_u32_div mul_u64_u32_div
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#endif /* CONFIG_X86_32 */
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#endif /* _ASM_X86_DIV64_H */
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|
@ -18,8 +18,13 @@ ENTRY(wakeup_long64)
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movq saved_magic, %rax
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movq $0x123456789abcdef0, %rdx
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cmpq %rdx, %rax
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jne bogus_64_magic
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je 2f
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/* stop here on a saved_magic mismatch */
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movq $0xbad6d61676963, %rcx
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1:
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jmp 1b
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2:
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movw $__KERNEL_DS, %ax
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movw %ax, %ss
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movw %ax, %ds
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@ -37,9 +42,6 @@ ENTRY(wakeup_long64)
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jmp *%rax
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ENDPROC(wakeup_long64)
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bogus_64_magic:
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jmp bogus_64_magic
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ENTRY(do_suspend_lowlevel)
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FRAME_BEGIN
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subq $8, %rsp
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|
@ -19,7 +19,7 @@
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/** DOC: Emulation for User-Mode Instruction Prevention (UMIP)
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*
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* The feature User-Mode Instruction Prevention present in recent Intel
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* processor prevents a group of instructions (sgdt, sidt, sldt, smsw, and str)
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* processor prevents a group of instructions (SGDT, SIDT, SLDT, SMSW and STR)
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* from being executed with CPL > 0. Otherwise, a general protection fault is
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* issued.
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*
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@ -36,8 +36,8 @@
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* DOSEMU2) rely on this subset of instructions to function.
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*
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* The instructions protected by UMIP can be split in two groups. Those which
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* return a kernel memory address (sgdt and sidt) and those which return a
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* value (sldt, str and smsw).
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* return a kernel memory address (SGDT and SIDT) and those which return a
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* value (SLDT, STR and SMSW).
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*
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* For the instructions that return a kernel memory address, applications
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* such as WineHQ rely on the result being located in the kernel memory space,
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@ -45,15 +45,13 @@
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* value that, lies close to the top of the kernel memory. The limit for the GDT
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* and the IDT are set to zero.
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*
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* Given that sldt and str are not commonly used in programs that run on WineHQ
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* Given that SLDT and STR are not commonly used in programs that run on WineHQ
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* or DOSEMU2, they are not emulated.
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*
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* The instruction smsw is emulated to return the value that the register CR0
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* has at boot time as set in the head_32.
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*
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* Also, emulation is provided only for 32-bit processes; 64-bit processes
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* that attempt to use the instructions that UMIP protects will receive the
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* SIGSEGV signal issued as a consequence of the general protection fault.
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* Emulation is provided for both 32-bit and 64-bit processes.
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*
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* Care is taken to appropriately emulate the results when segmentation is
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* used. That is, rather than relying on USER_DS and USER_CS, the function
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@ -63,17 +61,18 @@
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* application uses a local descriptor table.
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*/
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#define UMIP_DUMMY_GDT_BASE 0xfffe0000
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#define UMIP_DUMMY_IDT_BASE 0xffff0000
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#define UMIP_DUMMY_GDT_BASE 0xfffffffffffe0000ULL
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#define UMIP_DUMMY_IDT_BASE 0xffffffffffff0000ULL
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/*
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* The SGDT and SIDT instructions store the contents of the global descriptor
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* table and interrupt table registers, respectively. The destination is a
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* memory operand of X+2 bytes. X bytes are used to store the base address of
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* the table and 2 bytes are used to store the limit. In 32-bit processes, the
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* only processes for which emulation is provided, X has a value of 4.
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* the table and 2 bytes are used to store the limit. In 32-bit processes X
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* has a value of 4, in 64-bit processes X has a value of 8.
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*/
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#define UMIP_GDT_IDT_BASE_SIZE 4
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#define UMIP_GDT_IDT_BASE_SIZE_64BIT 8
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#define UMIP_GDT_IDT_BASE_SIZE_32BIT 4
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#define UMIP_GDT_IDT_LIMIT_SIZE 2
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#define UMIP_INST_SGDT 0 /* 0F 01 /0 */
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@ -189,6 +188,7 @@ static int identify_insn(struct insn *insn)
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* @umip_inst: A constant indicating the instruction to emulate
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* @data: Buffer into which the dummy result is stored
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* @data_size: Size of the emulated result
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* @x86_64: true if process is 64-bit, false otherwise
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*
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* Emulate an instruction protected by UMIP and provide a dummy result. The
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* result of the emulation is saved in @data. The size of the results depends
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@ -202,11 +202,8 @@ static int identify_insn(struct insn *insn)
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* 0 on success, -EINVAL on error while emulating.
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*/
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static int emulate_umip_insn(struct insn *insn, int umip_inst,
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unsigned char *data, int *data_size)
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unsigned char *data, int *data_size, bool x86_64)
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{
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unsigned long dummy_base_addr, dummy_value;
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unsigned short dummy_limit = 0;
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if (!data || !data_size || !insn)
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return -EINVAL;
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/*
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@ -219,6 +216,9 @@ static int emulate_umip_insn(struct insn *insn, int umip_inst,
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* is always returned irrespective of the operand size.
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*/
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if (umip_inst == UMIP_INST_SGDT || umip_inst == UMIP_INST_SIDT) {
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u64 dummy_base_addr;
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u16 dummy_limit = 0;
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/* SGDT and SIDT do not use registers operands. */
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if (X86_MODRM_MOD(insn->modrm.value) == 3)
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return -EINVAL;
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@ -228,13 +228,24 @@ static int emulate_umip_insn(struct insn *insn, int umip_inst,
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else
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dummy_base_addr = UMIP_DUMMY_IDT_BASE;
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*data_size = UMIP_GDT_IDT_LIMIT_SIZE + UMIP_GDT_IDT_BASE_SIZE;
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/*
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* 64-bit processes use the entire dummy base address.
|
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* 32-bit processes use the lower 32 bits of the base address.
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* dummy_base_addr is always 64 bits, but we memcpy the correct
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* number of bytes from it to the destination.
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*/
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if (x86_64)
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*data_size = UMIP_GDT_IDT_BASE_SIZE_64BIT;
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else
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*data_size = UMIP_GDT_IDT_BASE_SIZE_32BIT;
|
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|
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memcpy(data + 2, &dummy_base_addr, UMIP_GDT_IDT_BASE_SIZE);
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memcpy(data + 2, &dummy_base_addr, *data_size);
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*data_size += UMIP_GDT_IDT_LIMIT_SIZE;
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memcpy(data, &dummy_limit, UMIP_GDT_IDT_LIMIT_SIZE);
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|
||||
} else if (umip_inst == UMIP_INST_SMSW) {
|
||||
dummy_value = CR0_STATE;
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||||
unsigned long dummy_value = CR0_STATE;
|
||||
|
||||
/*
|
||||
* Even though the CR0 register has 4 bytes, the number
|
||||
@ -290,11 +301,10 @@ static void force_sig_info_umip_fault(void __user *addr, struct pt_regs *regs)
|
||||
* fixup_umip_exception() - Fixup a general protection fault caused by UMIP
|
||||
* @regs: Registers as saved when entering the #GP handler
|
||||
*
|
||||
* The instructions sgdt, sidt, str, smsw, sldt cause a general protection
|
||||
* fault if executed with CPL > 0 (i.e., from user space). If the offending
|
||||
* user-space process is not in long mode, this function fixes the exception
|
||||
* up and provides dummy results for sgdt, sidt and smsw; str and sldt are not
|
||||
* fixed up. Also long mode user-space processes are not fixed up.
|
||||
* The instructions SGDT, SIDT, STR, SMSW and SLDT cause a general protection
|
||||
* fault if executed with CPL > 0 (i.e., from user space). This function fixes
|
||||
* the exception up and provides dummy results for SGDT, SIDT and SMSW; STR
|
||||
* and SLDT are not fixed up.
|
||||
*
|
||||
* If operands are memory addresses, results are copied to user-space memory as
|
||||
* indicated by the instruction pointed by eIP using the registers indicated in
|
||||
@ -373,13 +383,14 @@ bool fixup_umip_exception(struct pt_regs *regs)
|
||||
umip_pr_warning(regs, "%s instruction cannot be used by applications.\n",
|
||||
umip_insns[umip_inst]);
|
||||
|
||||
/* Do not emulate SLDT, STR or user long mode processes. */
|
||||
if (umip_inst == UMIP_INST_STR || umip_inst == UMIP_INST_SLDT || user_64bit_mode(regs))
|
||||
/* Do not emulate (spoof) SLDT or STR. */
|
||||
if (umip_inst == UMIP_INST_STR || umip_inst == UMIP_INST_SLDT)
|
||||
return false;
|
||||
|
||||
umip_pr_warning(regs, "For now, expensive software emulation returns the result.\n");
|
||||
|
||||
if (emulate_umip_insn(&insn, umip_inst, dummy_data, &dummy_data_size))
|
||||
if (emulate_umip_insn(&insn, umip_inst, dummy_data, &dummy_data_size,
|
||||
user_64bit_mode(regs)))
|
||||
return false;
|
||||
|
||||
/*
|
||||
|
@ -33,7 +33,7 @@
|
||||
102:
|
||||
.section .fixup,"ax"
|
||||
103: addl %ecx,%edx /* ecx is zerorest also */
|
||||
jmp copy_user_handle_tail
|
||||
jmp .Lcopy_user_handle_tail
|
||||
.previous
|
||||
|
||||
_ASM_EXTABLE_UA(100b, 103b)
|
||||
@ -113,7 +113,7 @@ ENTRY(copy_user_generic_unrolled)
|
||||
40: leal (%rdx,%rcx,8),%edx
|
||||
jmp 60f
|
||||
50: movl %ecx,%edx
|
||||
60: jmp copy_user_handle_tail /* ecx is zerorest also */
|
||||
60: jmp .Lcopy_user_handle_tail /* ecx is zerorest also */
|
||||
.previous
|
||||
|
||||
_ASM_EXTABLE_UA(1b, 30b)
|
||||
@ -177,7 +177,7 @@ ENTRY(copy_user_generic_string)
|
||||
.section .fixup,"ax"
|
||||
11: leal (%rdx,%rcx,8),%ecx
|
||||
12: movl %ecx,%edx /* ecx is zerorest also */
|
||||
jmp copy_user_handle_tail
|
||||
jmp .Lcopy_user_handle_tail
|
||||
.previous
|
||||
|
||||
_ASM_EXTABLE_UA(1b, 11b)
|
||||
@ -210,7 +210,7 @@ ENTRY(copy_user_enhanced_fast_string)
|
||||
|
||||
.section .fixup,"ax"
|
||||
12: movl %ecx,%edx /* ecx is zerorest also */
|
||||
jmp copy_user_handle_tail
|
||||
jmp .Lcopy_user_handle_tail
|
||||
.previous
|
||||
|
||||
_ASM_EXTABLE_UA(1b, 12b)
|
||||
@ -231,7 +231,7 @@ EXPORT_SYMBOL(copy_user_enhanced_fast_string)
|
||||
* eax uncopied bytes or 0 if successful.
|
||||
*/
|
||||
ALIGN;
|
||||
copy_user_handle_tail:
|
||||
.Lcopy_user_handle_tail:
|
||||
movl %edx,%ecx
|
||||
1: rep movsb
|
||||
2: mov %ecx,%eax
|
||||
@ -239,7 +239,7 @@ copy_user_handle_tail:
|
||||
ret
|
||||
|
||||
_ASM_EXTABLE_UA(1b, 2b)
|
||||
END(copy_user_handle_tail)
|
||||
END(.Lcopy_user_handle_tail)
|
||||
|
||||
/*
|
||||
* copy_user_nocache - Uncached memory copy with exception handling
|
||||
@ -364,7 +364,7 @@ ENTRY(__copy_user_nocache)
|
||||
movl %ecx,%edx
|
||||
.L_fixup_handle_tail:
|
||||
sfence
|
||||
jmp copy_user_handle_tail
|
||||
jmp .Lcopy_user_handle_tail
|
||||
.previous
|
||||
|
||||
_ASM_EXTABLE_UA(1b, .L_fixup_4x8b_copy)
|
||||
|
@ -115,7 +115,7 @@ ENDPROC(__get_user_8)
|
||||
EXPORT_SYMBOL(__get_user_8)
|
||||
|
||||
|
||||
bad_get_user_clac:
|
||||
.Lbad_get_user_clac:
|
||||
ASM_CLAC
|
||||
bad_get_user:
|
||||
xor %edx,%edx
|
||||
@ -123,7 +123,7 @@ bad_get_user:
|
||||
ret
|
||||
|
||||
#ifdef CONFIG_X86_32
|
||||
bad_get_user_8_clac:
|
||||
.Lbad_get_user_8_clac:
|
||||
ASM_CLAC
|
||||
bad_get_user_8:
|
||||
xor %edx,%edx
|
||||
@ -132,12 +132,12 @@ bad_get_user_8:
|
||||
ret
|
||||
#endif
|
||||
|
||||
_ASM_EXTABLE_UA(1b, bad_get_user_clac)
|
||||
_ASM_EXTABLE_UA(2b, bad_get_user_clac)
|
||||
_ASM_EXTABLE_UA(3b, bad_get_user_clac)
|
||||
_ASM_EXTABLE_UA(1b, .Lbad_get_user_clac)
|
||||
_ASM_EXTABLE_UA(2b, .Lbad_get_user_clac)
|
||||
_ASM_EXTABLE_UA(3b, .Lbad_get_user_clac)
|
||||
#ifdef CONFIG_X86_64
|
||||
_ASM_EXTABLE_UA(4b, bad_get_user_clac)
|
||||
_ASM_EXTABLE_UA(4b, .Lbad_get_user_clac)
|
||||
#else
|
||||
_ASM_EXTABLE_UA(4b, bad_get_user_8_clac)
|
||||
_ASM_EXTABLE_UA(5b, bad_get_user_8_clac)
|
||||
_ASM_EXTABLE_UA(4b, .Lbad_get_user_8_clac)
|
||||
_ASM_EXTABLE_UA(5b, .Lbad_get_user_8_clac)
|
||||
#endif
|
||||
|
@ -37,7 +37,7 @@
|
||||
ENTRY(__put_user_1)
|
||||
ENTER
|
||||
cmp TASK_addr_limit(%_ASM_BX),%_ASM_CX
|
||||
jae bad_put_user
|
||||
jae .Lbad_put_user
|
||||
ASM_STAC
|
||||
1: movb %al,(%_ASM_CX)
|
||||
xor %eax,%eax
|
||||
@ -51,7 +51,7 @@ ENTRY(__put_user_2)
|
||||
mov TASK_addr_limit(%_ASM_BX),%_ASM_BX
|
||||
sub $1,%_ASM_BX
|
||||
cmp %_ASM_BX,%_ASM_CX
|
||||
jae bad_put_user
|
||||
jae .Lbad_put_user
|
||||
ASM_STAC
|
||||
2: movw %ax,(%_ASM_CX)
|
||||
xor %eax,%eax
|
||||
@ -65,7 +65,7 @@ ENTRY(__put_user_4)
|
||||
mov TASK_addr_limit(%_ASM_BX),%_ASM_BX
|
||||
sub $3,%_ASM_BX
|
||||
cmp %_ASM_BX,%_ASM_CX
|
||||
jae bad_put_user
|
||||
jae .Lbad_put_user
|
||||
ASM_STAC
|
||||
3: movl %eax,(%_ASM_CX)
|
||||
xor %eax,%eax
|
||||
@ -79,7 +79,7 @@ ENTRY(__put_user_8)
|
||||
mov TASK_addr_limit(%_ASM_BX),%_ASM_BX
|
||||
sub $7,%_ASM_BX
|
||||
cmp %_ASM_BX,%_ASM_CX
|
||||
jae bad_put_user
|
||||
jae .Lbad_put_user
|
||||
ASM_STAC
|
||||
4: mov %_ASM_AX,(%_ASM_CX)
|
||||
#ifdef CONFIG_X86_32
|
||||
@ -91,16 +91,16 @@ ENTRY(__put_user_8)
|
||||
ENDPROC(__put_user_8)
|
||||
EXPORT_SYMBOL(__put_user_8)
|
||||
|
||||
bad_put_user_clac:
|
||||
.Lbad_put_user_clac:
|
||||
ASM_CLAC
|
||||
bad_put_user:
|
||||
.Lbad_put_user:
|
||||
movl $-EFAULT,%eax
|
||||
RET
|
||||
|
||||
_ASM_EXTABLE_UA(1b, bad_put_user_clac)
|
||||
_ASM_EXTABLE_UA(2b, bad_put_user_clac)
|
||||
_ASM_EXTABLE_UA(3b, bad_put_user_clac)
|
||||
_ASM_EXTABLE_UA(4b, bad_put_user_clac)
|
||||
_ASM_EXTABLE_UA(1b, .Lbad_put_user_clac)
|
||||
_ASM_EXTABLE_UA(2b, .Lbad_put_user_clac)
|
||||
_ASM_EXTABLE_UA(3b, .Lbad_put_user_clac)
|
||||
_ASM_EXTABLE_UA(4b, .Lbad_put_user_clac)
|
||||
#ifdef CONFIG_X86_32
|
||||
_ASM_EXTABLE_UA(5b, bad_put_user_clac)
|
||||
_ASM_EXTABLE_UA(5b, .Lbad_put_user_clac)
|
||||
#endif
|
||||
|
Loading…
Reference in New Issue
Block a user