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gpio/omap: _clear_gpio_irqbank: fix flushing of posted write

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In commit 78a1a6d341 (ARM: OMAP4: Update
the GPIO support) braces were mistakenly added to included the
register read-back inside the cpu_is_* checking.

Remove the braces, ensuring that a register read-back is done, even
when the IRQSTATUS2 register is not written.

Note that the register read-back might be IRQSTATUS1 or IRQSTATUS2
depending on the CPU, but a read-back of any register in that region
will cause a flush of the posted writes.

Signed-off-by: Kevin Hilman <khilman@ti.com>
This commit is contained in:
Kevin Hilman 2011-04-21 09:08:15 -07:00
parent 2c53b436a3
commit df3c851716
1 changed files with 1 additions and 2 deletions
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3
drivers/gpio/gpio-omap.c
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@ -700,12 +700,11 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
else if (cpu_is_omap44xx())
reg = bank->base + OMAP4_GPIO_IRQSTATUS1;
if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx())
__raw_writel(gpio_mask, reg);
/* Flush posted write for the irq status to avoid spurious interrupts */
__raw_readl(reg);
}
}
static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)