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MIPS: Add SMP_ICACHE_FLUSH for the Cavium CPU family.

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Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: Paul Gortmaker <Paul.Gortmaker@windriver.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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David Daney 2008-12-11 15:33:32 -08:00 committed by Ralf Baechle
parent babed55569
commit ddcdb1b4a4
1 changed files with 3 additions and 0 deletions
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3
arch/mips/include/asm/smp.h
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@ -37,6 +37,9 @@ extern int __cpu_logical_map[NR_CPUS];
#define SMP_RESCHEDULE_YOURSELF 0x1 /* XXX braindead */
#define SMP_CALL_FUNCTION 0x2
/* Octeon - Tell another core to flush its icache */
#define SMP_ICACHE_FLUSH 0x4
extern void asmlinkage smp_bootstrap(void);