leandrof/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

SoCFPGA fix for v5.16, part 2

Browse Source 
- Fix QSPI dts entry to include "jedec,spi-nor"
 -----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCgAyFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAmGqWjAUHGRpbmd1eWVu
 QGtlcm5lbC5vcmcACgkQGZQEC4GjKPRmXQ/+JIcLMbqMyVPapzYzHNwu4oXZka79
 zvd2FPFwOiP9YsrO7kYLMZtc7Rbb/A1hKVPjM6KId/1TKiYq+jZzOEuDzAuKKx+K
 htp7iZsUwBm6P9PjVPZOJddZXKEPzrl9ah3NiuLU1BA1FvWJgrmu99IOvBsBT4Yt
 bpUO2VrchkFi0qemjyYw/MLHW2Xs1MgmugFJF/k/3EBcN+BNwiJBMSzEmPyZSvJO
 WXRFPSRC7vtlEBHjo5bLDZR48HWgaYKg+njVhHTENr2gMQp+vh72DaBHymYpuLX6
 Wqwp28z/WUfqGLf2wJHkWVencifHsab1hrFuWk2r3MURD5Ez/PACVFVO/FExaYdK
 qVL6MPze3mxc0k/hVWfXou2Z2ACeScNANQn+VQA/UwC+/RZdyeIQ3K6TrgZmFSeO
 fLu4p1lR7oU8spVFgXXPRA8MIZs12DfHyAWh8LFSEro5BWl7Cs7z1bmQXmDidtIW
 mpy27M0p/NCp7C2Xnb0G2zYvk0uVkWp2QXckHeOwdBNnPnrOZIjCXM+y/+yxC0t9
 yV8DEzjCOx/d9i1Nax5ybZ/olbgznC2nFKWWBkos6RIWSNDze2XdIzbG1hkpO016
 KmLRpFlRxirNEkOnWB9RwWcHClwVPGEI8X0Mea2jLcNp020Ju0EHE8Sum8o/RSJg
 TzD80q0kaP2L0uQ=
 =+LeJ
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG3UowACgkQmmx57+YA
 GNnmUg//UuswIgaJ8aBDobY6FQ0lzYm0egiGEQE2swuQ6ytMW0U8A+N7D8pu/bO0
 3QStUNxrdgHs4NFghpcdCwLshJaAj3IkXKAwqsbUvAxvv6dkitoAOil0g/TIU+xu
 q3Ik2o7FQ9dowQy9aPkrKpoeVCyPNz9y08jRSiYj3RUr3J8qjjC2KobcAniL745E
 XIxBwMvUDyhMDv/6kpsVZz0RGMoUm9fZi+w4yILL8uqn8vmWqF0z+A+I4eHtQO8b
 k9qC6e/z4JCnrgBQUPNwzg7yrLtyFub/2hM5WgFJZ8iPkbfIcCRPMEvDqhx70ZZI
 bMOkvgKfqoNB+6Ei9Xg+T4CsnPiSOZ/HYfCCa+ieLppAtMi+NCgh+4UllIllSaL9
 ZWCC7cSDB1inQ97usgpw++d6ZBLc/vyZHsFuOQlZsBKuX7HbzM7lhPH8WCQix0X4
 n9guZeYBBVWx59/Bp9qO7plLmMWIHCAIcsDMMjqYbNicD/cwWc9XU5+FFP+2xwfd
 5raNudIOu2+lCL5Y60wD750waspcrfNWwEaEw8zJ4RPUo5zY4bSjVg+IEqJPPIjD
 c6H4ULA3vRUIh7/ZLK5ooK1zEaYbRN38XsiKQO9xZXtuypKsY+3JNB3c5lI3Iijz
 Hpki4AaothgKRmpfBSWe7/2Kw07F5BLb6I/SITO0J5qMObNotV0=
 =Hbbn
 -----END PGP SIGNATURE-----

Merge tag 'socfpga_fix_for_v5.16_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/fixes

SoCFPGA fix for v5.16, part 2
- Fix QSPI dts entry to include "jedec,spi-nor"

* tag 'socfpga_fix_for_v5.16_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: socfpga: dts: fix qspi node compatible

Link: https://lore.kernel.org/r/20211203181007.3138381-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-12-13 15:02:51 +01:00
commit ddae25ed97
7 changed files with 8 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts
View File

@ -12,7 +12,7 @@
flash0: n25q00@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00aa";
compatible = "micron,mt25qu02g", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;

2
arch/arm/boot/dts/socfpga_arria5_socdk.dts
View File

@ -119,7 +119,7 @@
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q256a";
compatible = "micron,n25q256a", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;

2
arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
View File

@ -124,7 +124,7 @@
flash0: n25q00@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00";
compatible = "micron,mt25qu02g", "jedec,spi-nor";
reg = <0>; /* chip select */
spi-max-frequency = <100000000>;

2
arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
View File

@ -169,7 +169,7 @@
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00";
compatible = "micron,mt25qu02g", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;

2
arch/arm/boot/dts/socfpga_cyclone5_socrates.dts
View File

@ -80,7 +80,7 @@
flash: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q256a";
compatible = "micron,n25q256a", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;
m25p,fast-read;

2
arch/arm/boot/dts/socfpga_cyclone5_sodia.dts
View File

@ -116,7 +116,7 @@
flash0: n25q512a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q512a";
compatible = "micron,n25q512a", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <100000000>;

4
arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
View File

@ -224,7 +224,7 @@
n25q128@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q128";
compatible = "micron,n25q128", "jedec,spi-nor";
reg = <0>; /* chip select */
spi-max-frequency = <100000000>;
m25p,fast-read;
@ -241,7 +241,7 @@
n25q00@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00";
compatible = "micron,mt25qu02g", "jedec,spi-nor";
reg = <1>; /* chip select */
spi-max-frequency = <100000000>;
m25p,fast-read;