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ASoC: Intel: sof_rt5682: add 512FS MCLK clock configuration

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codec system clock source support 512FS MCLK synchronous directly, so
no need to set PLL configuration when MCLK 24.576MHz.

Suggested-by: Shuming Fan <shumingf@realtek.com>
Signed-off-by: Mac Chiang <mac.chiang@intel.com>
Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20220120054012.15849-1-mac.chiang@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Mac Chiang 2022-01-20 00:40:12 -05:00 committed by Mark Brown
parent 330dc18356
commit dbf2f8e3fe
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GPG Key ID: 24D68B725D5487D0
1 changed files with 10 additions and 5 deletions
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15
sound/soc/intel/boards/sof_rt5682.c
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@ -369,11 +369,16 @@ static int sof_rt5682_hw_params(struct snd_pcm_substream *substream,
pll_out = params_rate(params) * 512;
/* Configure pll for codec */
ret = snd_soc_dai_set_pll(codec_dai, pll_id, pll_source, pll_in,
pll_out);
if (ret < 0)
dev_err(rtd->dev, "snd_soc_dai_set_pll err = %d\n", ret);
/* when MCLK is 512FS, no need to set PLL configuration additionally. */
if (pll_in == pll_out)
clk_id = RT5682S_SCLK_S_MCLK;
else {
/* Configure pll for codec */
ret = snd_soc_dai_set_pll(codec_dai, pll_id, pll_source, pll_in,
pll_out);
if (ret < 0)
dev_err(rtd->dev, "snd_soc_dai_set_pll err = %d\n", ret);
}
/* Configure sysclk for codec */
ret = snd_soc_dai_set_sysclk(codec_dai, clk_id,