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KVM: x86: Handle Intel PT CPUID adjustment in VMX code

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Move the Processor Trace CPUID adjustment into VMX code to eliminate
an instance of the undesirable "unsigned f_* = *_supported ? F(*) : 0"
pattern in the common CPUID handling code, and to pave the way toward
eventually removing ->pt_supported().

No functional change intended.

Reviewed-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Sean Christopherson 2020-03-02 15:56:38 -08:00 committed by Paolo Bonzini
parent 733deafc00
commit dbd068040c
2 changed files with 4 additions and 2 deletions
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3
arch/x86/kvm/cpuid.c
View File

@ -331,7 +331,6 @@ static int __do_cpuid_func_emulated(struct kvm_cpuid_array *array, u32 func)
static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry)
{
unsigned f_intel_pt = kvm_x86_ops->pt_supported() ? F(INTEL_PT) : 0;
unsigned f_la57;
/* cpuid 7.0.ebx */
@ -340,7 +339,7 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry)
F(BMI2) | F(ERMS) | 0 /*INVPCID*/ | F(RTM) | 0 /*MPX*/ | F(RDSEED) |
F(ADX) | F(SMAP) | F(AVX512IFMA) | F(AVX512F) | F(AVX512PF) |
F(AVX512ER) | F(AVX512CD) | F(CLFLUSHOPT) | F(CLWB) | F(AVX512DQ) |
F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | f_intel_pt;
F(SHA_NI) | F(AVX512BW) | F(AVX512VL) | 0 /*INTEL_PT*/;
/* cpuid 7.0.ecx*/
const u32 kvm_cpuid_7_0_ecx_x86_features =

3
arch/x86/kvm/vmx/vmx.c
View File

@ -7135,6 +7135,9 @@ static void vmx_set_supported_cpuid(struct kvm_cpuid_entry2 *entry)
cpuid_entry_set(entry, X86_FEATURE_MPX);
if (boot_cpu_has(X86_FEATURE_INVPCID) && cpu_has_vmx_invpcid())
cpuid_entry_set(entry, X86_FEATURE_INVPCID);
if (boot_cpu_has(X86_FEATURE_INTEL_PT) &&
vmx_pt_mode_is_host_guest())
cpuid_entry_set(entry, X86_FEATURE_INTEL_PT);
if (vmx_umip_emulated())
cpuid_entry_set(entry, X86_FEATURE_UMIP);