IB/mlx5: Advertise atomic capabilities in query device
In order to ensure IB spec atomic correctness in atomic operations, if HW is configured to host endianness, advertise IB_ATOMIC_HCA. if not, advertise IB_ATOMIC_NONE. Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com> Reviewed-by: Yishai Hadas <yishaih@mellanox.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -65,6 +65,10 @@ static char mlx5_version[] =
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DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v"
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DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v"
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DRIVER_VERSION " (" DRIVER_RELDATE ")\n";
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DRIVER_VERSION " (" DRIVER_RELDATE ")\n";
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enum {
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MLX5_ATOMIC_SIZE_QP_8BYTES = 1 << 3,
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};
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static enum rdma_link_layer
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static enum rdma_link_layer
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mlx5_port_type_cap_to_rdma_ll(int port_type_cap)
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mlx5_port_type_cap_to_rdma_ll(int port_type_cap)
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{
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{
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@ -296,6 +300,28 @@ static int mlx5_get_vport_access_method(struct ib_device *ibdev)
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return MLX5_VPORT_ACCESS_METHOD_HCA;
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return MLX5_VPORT_ACCESS_METHOD_HCA;
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}
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}
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static void get_atomic_caps(struct mlx5_ib_dev *dev,
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struct ib_device_attr *props)
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{
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u8 tmp;
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u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations);
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u8 atomic_size_qp = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp);
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u8 atomic_req_8B_endianness_mode =
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MLX5_CAP_ATOMIC(dev->mdev, atomic_req_8B_endianess_mode);
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/* Check if HW supports 8 bytes standard atomic operations and capable
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* of host endianness respond
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*/
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tmp = MLX5_ATOMIC_OPS_CMP_SWAP | MLX5_ATOMIC_OPS_FETCH_ADD;
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if (((atomic_operations & tmp) == tmp) &&
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(atomic_size_qp & MLX5_ATOMIC_SIZE_QP_8BYTES) &&
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(atomic_req_8B_endianness_mode)) {
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props->atomic_cap = IB_ATOMIC_HCA;
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} else {
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props->atomic_cap = IB_ATOMIC_NONE;
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}
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}
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static int mlx5_query_system_image_guid(struct ib_device *ibdev,
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static int mlx5_query_system_image_guid(struct ib_device *ibdev,
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__be64 *sys_image_guid)
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__be64 *sys_image_guid)
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{
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{
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@ -496,7 +522,7 @@ static int mlx5_ib_query_device(struct ib_device *ibdev,
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props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
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props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
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props->max_srq_sge = max_rq_sg - 1;
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props->max_srq_sge = max_rq_sg - 1;
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props->max_fast_reg_page_list_len = (unsigned int)-1;
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props->max_fast_reg_page_list_len = (unsigned int)-1;
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props->atomic_cap = IB_ATOMIC_NONE;
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get_atomic_caps(dev, props);
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props->masked_atomic_cap = IB_ATOMIC_NONE;
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props->masked_atomic_cap = IB_ATOMIC_NONE;
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props->max_mcast_grp = 1 << MLX5_CAP_GEN(mdev, log_max_mcg);
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props->max_mcast_grp = 1 << MLX5_CAP_GEN(mdev, log_max_mcg);
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props->max_mcast_qp_attach = MLX5_CAP_GEN(mdev, max_qp_mcg);
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props->max_mcast_qp_attach = MLX5_CAP_GEN(mdev, max_qp_mcg);
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@ -115,6 +115,11 @@ enum {
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MLX5_REG_HOST_ENDIANNESS = 0x7004,
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MLX5_REG_HOST_ENDIANNESS = 0x7004,
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};
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};
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enum {
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MLX5_ATOMIC_OPS_CMP_SWAP = 1 << 0,
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MLX5_ATOMIC_OPS_FETCH_ADD = 1 << 1,
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};
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enum mlx5_page_fault_resume_flags {
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enum mlx5_page_fault_resume_flags {
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MLX5_PAGE_FAULT_RESUME_REQUESTOR = 1 << 0,
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MLX5_PAGE_FAULT_RESUME_REQUESTOR = 1 << 0,
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MLX5_PAGE_FAULT_RESUME_WRITE = 1 << 1,
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MLX5_PAGE_FAULT_RESUME_WRITE = 1 << 1,
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