forked from Minki/linux
ARM: shmobile: r8a7793: Add GPIO nodes to device tree
Add r8a7793 GPIO device nodes that are assumed to be identical to r8a7791. This matches the data sheet for GPIO and MSTP bits. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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876e7fb9f4
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d96011d077
@ -57,6 +57,110 @@
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interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
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};
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gpio0: gpio@e6050000 {
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compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
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reg = <0 0xe6050000 0 0x50>;
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interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 0 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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clocks = <&mstp9_clks R8A7793_CLK_GPIO0>;
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power-domains = <&cpg_clocks>;
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};
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gpio1: gpio@e6051000 {
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compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
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reg = <0 0xe6051000 0 0x50>;
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interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 32 26>;
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#interrupt-cells = <2>;
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interrupt-controller;
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clocks = <&mstp9_clks R8A7793_CLK_GPIO1>;
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power-domains = <&cpg_clocks>;
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};
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gpio2: gpio@e6052000 {
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compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
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reg = <0 0xe6052000 0 0x50>;
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interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 64 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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clocks = <&mstp9_clks R8A7793_CLK_GPIO2>;
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power-domains = <&cpg_clocks>;
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};
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gpio3: gpio@e6053000 {
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compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
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reg = <0 0xe6053000 0 0x50>;
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interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 96 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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clocks = <&mstp9_clks R8A7793_CLK_GPIO3>;
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power-domains = <&cpg_clocks>;
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};
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gpio4: gpio@e6054000 {
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compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
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reg = <0 0xe6054000 0 0x50>;
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interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 128 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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clocks = <&mstp9_clks R8A7793_CLK_GPIO4>;
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power-domains = <&cpg_clocks>;
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};
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gpio5: gpio@e6055000 {
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compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
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reg = <0 0xe6055000 0 0x50>;
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interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 160 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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clocks = <&mstp9_clks R8A7793_CLK_GPIO5>;
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power-domains = <&cpg_clocks>;
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};
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gpio6: gpio@e6055400 {
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compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
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reg = <0 0xe6055400 0 0x50>;
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interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 192 32>;
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#interrupt-cells = <2>;
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interrupt-controller;
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clocks = <&mstp9_clks R8A7793_CLK_GPIO6>;
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power-domains = <&cpg_clocks>;
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};
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gpio7: gpio@e6055800 {
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compatible = "renesas,gpio-r8a7793", "renesas,gpio-rcar";
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reg = <0 0xe6055800 0 0x50>;
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interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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gpio-controller;
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gpio-ranges = <&pfc 0 224 26>;
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#interrupt-cells = <2>;
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interrupt-controller;
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clocks = <&mstp9_clks R8A7793_CLK_GPIO7>;
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power-domains = <&cpg_clocks>;
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};
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thermal@e61f0000 {
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compatible = "renesas,thermal-r8a7793", "renesas,rcar-thermal";
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reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
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@ -484,10 +588,21 @@
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mstp9_clks: mstp9_clks@e6150994 {
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compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
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clocks = <&cpg_clocks R8A7793_CLK_QSPI>;
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clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
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<&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>,
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<&cpg_clocks R8A7793_CLK_QSPI>;
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#clock-cells = <1>;
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clock-indices = <R8A7793_CLK_QSPI_MOD>;
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clock-output-names = "qspi_mod";
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clock-indices = <
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R8A7793_CLK_GPIO7 R8A7793_CLK_GPIO6
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R8A7793_CLK_GPIO5 R8A7793_CLK_GPIO4
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R8A7793_CLK_GPIO3 R8A7793_CLK_GPIO2
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R8A7793_CLK_GPIO1 R8A7793_CLK_GPIO0
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R8A7793_CLK_QSPI_MOD
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>;
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clock-output-names =
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"gpio7", "gpio6", "gpio5", "gpio4",
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"gpio3", "gpio2", "gpio1", "gpio0",
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"qspi_mod";
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};
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};
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