forked from Minki/linux
drm/armada: clear plane enable bit when disabling
Clear the plane enable bit in the software state within armada_drm_plane_disable() when disabling either the primary or overlay planes. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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@ -1128,7 +1128,7 @@ int armada_drm_plane_disable(struct drm_plane *plane,
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{
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struct armada_plane *dplane = drm_to_armada_plane(plane);
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struct armada_crtc *dcrtc;
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u32 sram_para1, dma_ctrl0_mask;
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u32 sram_para1, enable_mask;
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if (!plane->crtc)
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return 0;
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@ -1147,13 +1147,15 @@ int armada_drm_plane_disable(struct drm_plane *plane,
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if (plane->type == DRM_PLANE_TYPE_PRIMARY) {
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sram_para1 = CFG_PDWN256x32 | CFG_PDWN256x24 | CFG_PDWN256x8 |
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CFG_PDWN32x32 | CFG_PDWN64x66;
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dma_ctrl0_mask = CFG_GRA_ENA;
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enable_mask = CFG_GRA_ENA;
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} else {
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/* Power down the Y/U/V FIFOs */
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sram_para1 = CFG_PDWN16x66 | CFG_PDWN32x66;
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dma_ctrl0_mask = CFG_DMA_ENA;
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enable_mask = CFG_DMA_ENA;
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}
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dplane->state.ctrl0 &= ~enable_mask;
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dcrtc = drm_to_armada_crtc(plane->crtc);
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/* Wait for any preceding work to complete, but don't wedge */
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@ -1161,7 +1163,7 @@ int armada_drm_plane_disable(struct drm_plane *plane,
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armada_drm_plane_work_cancel(dcrtc, dplane);
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spin_lock_irq(&dcrtc->irq_lock);
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armada_updatel(0, dma_ctrl0_mask, dcrtc->base + LCD_SPU_DMA_CTRL0);
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armada_updatel(0, enable_mask, dcrtc->base + LCD_SPU_DMA_CTRL0);
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spin_unlock_irq(&dcrtc->irq_lock);
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armada_updatel(sram_para1, 0, dcrtc->base + LCD_SPU_SRAM_PARA1);
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@ -270,8 +270,6 @@ static int armada_ovl_plane_disable(struct drm_plane *plane,
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if (dplane->base.base.crtc)
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drm_to_armada_crtc(dplane->base.base.crtc)->plane = NULL;
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dplane->base.state.ctrl0 = 0;
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fb = xchg(&dplane->old_fb, NULL);
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if (fb)
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drm_framebuffer_put(fb);
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