forked from Minki/linux
r8a7779: Add Display Unit clock support
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> [Rename device from to rcarfb to rcar-du] Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> [Manual conflict resolution] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -88,7 +88,7 @@ static struct clk div4_clks[DIV4_NR] = {
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enum { MSTP323, MSTP322, MSTP321, MSTP320,
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MSTP115,
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MSTP101, MSTP100,
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MSTP103, MSTP101, MSTP100,
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MSTP030,
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MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
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MSTP016, MSTP015, MSTP014,
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@ -101,6 +101,7 @@ static struct clk mstp_clks[MSTP_NR] = {
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[MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0), /* SDHI2 */
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[MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0), /* SDHI3 */
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[MSTP115] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 15, 0), /* SATA */
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[MSTP103] = SH_CLK_MSTP32(&div4_clks[DIV4_S], MSTPCR1, 3, 0), /* DU */
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[MSTP101] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 1, 0), /* USB2 */
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[MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 0, 0), /* USB0/1 */
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[MSTP030] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 30, 0), /* I2C0 */
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@ -184,6 +185,7 @@ static struct clk_lookup lookups[] = {
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CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
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CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
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CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */
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CLKDEV_DEV_ID("rcar-du.0", &mstp_clks[MSTP103]), /* DU */
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};
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void __init r8a7779_clock_init(void)
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