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Davinci: configurable pll divider mask

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This patch allows socs to override the divider ratio mask by setting an
optional field (div_ratio_mask) in the pll_data structure.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Tested-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
Cyril Chemparathy
2010-04-14 14:44:49 -04:00
committed by Kevin Hilman
parent ce100669d2
commit d6961e6889
2 changed files with 7 additions and 3 deletions
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9
arch/arm/mach-davinci/clock.c
View File

@@ -279,7 +279,7 @@ static unsigned long clk_sysclk_recalc(struct clk *clk)
v = __raw_readl(pll->base + clk->div_reg); v = __raw_readl(pll->base + clk->div_reg);
if (v & PLLDIV_EN) { if (v & PLLDIV_EN) {
plldiv = (v & PLLDIV_RATIO_MASK) + 1; plldiv = (v & pll->div_ratio_mask) + 1;
if (plldiv) if (plldiv)
rate /= plldiv; rate /= plldiv;
} }
@@ -319,7 +319,7 @@ static unsigned long clk_pllclk_recalc(struct clk *clk)
if (pll->flags & PLL_HAS_PREDIV) { if (pll->flags & PLL_HAS_PREDIV) {
prediv = __raw_readl(pll->base + PREDIV); prediv = __raw_readl(pll->base + PREDIV);
if (prediv & PLLDIV_EN) if (prediv & PLLDIV_EN)
prediv = (prediv & PLLDIV_RATIO_MASK) + 1; prediv = (prediv & pll->div_ratio_mask) + 1;
else else
prediv = 1; prediv = 1;
} }
@@ -331,7 +331,7 @@ static unsigned long clk_pllclk_recalc(struct clk *clk)
if (pll->flags & PLL_HAS_POSTDIV) { if (pll->flags & PLL_HAS_POSTDIV) {
postdiv = __raw_readl(pll->base + POSTDIV); postdiv = __raw_readl(pll->base + POSTDIV);
if (postdiv & PLLDIV_EN) if (postdiv & PLLDIV_EN)
postdiv = (postdiv & PLLDIV_RATIO_MASK) + 1; postdiv = (postdiv & pll->div_ratio_mask) + 1;
else else
postdiv = 1; postdiv = 1;
} }
@@ -458,6 +458,9 @@ int __init davinci_clk_init(struct clk_lookup *clocks)
clk->recalc = clk_leafclk_recalc; clk->recalc = clk_leafclk_recalc;
} }
if (clk->pll_data && !clk->pll_data->div_ratio_mask)
clk->pll_data->div_ratio_mask = PLLDIV_RATIO_MASK;
if (clk->recalc) if (clk->recalc)
clk->rate = clk->recalc(clk); clk->rate = clk->recalc(clk);

1
arch/arm/mach-davinci/clock.h
View File

@@ -76,6 +76,7 @@ struct pll_data {
u32 num; u32 num;
u32 flags; u32 flags;
u32 input_rate; u32 input_rate;
u32 div_ratio_mask;
}; };
#define PLL_HAS_PREDIV 0x01 #define PLL_HAS_PREDIV 0x01
#define PLL_HAS_POSTDIV 0x02 #define PLL_HAS_POSTDIV 0x02