forked from Minki/linux
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next
Jeff Kirsher says: ==================== Intel Wired LAN Driver Updates 2014-06-05 This series contains updates to i40e and i40evf. Jesse fixes an issue reported by Dave Jones where a couple of FD checks ended up using bitwise OR where it should have been bitwise AND. Neerav removes unused defines and macros for receive LRO. Fix the driver from allowing the user to set a larger MTU size that the hardware was being configured to support. Refactors send version which moves code in two places into a small helper function. Kamil modifies register diagnostics since register ranges can vary among the different NVMs to avoid false test results. So now we try to identify the full range and use it for a register test and if we fail to define the proper register range, we will only test the first register from that group. Then removes the check for large buffer since this was added in the case this structure changed in the future, since the AQ definition is now mature enough that this check is no longer necessary. Mitch fixes i40evf driver to allocate descriptors in groups of 32 since the hardware requires it. Also fixes a crash when the ring size changed because it would change the count before deallocating resources, causing the driver to either free nonexistent buffers or leak leftover buffers. Fixed the driver to notify the VF for all types of resets so the VF can attempt a graceful reinit. Shannon refactors stats collection to create a unifying stats update routine to call the various stat collection routines. Removes rx_errors and rx_missed stats since they were removed from the chip design. Added missing VSI statistics that the hardware offers but are not apart of the standard netdev stats. v2: dropped patch "i40e: Allow disabling of DCB via debugfs" from Neerav based on feedback from David Miller. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
d68de60f73
@ -1062,8 +1062,6 @@ i40e_status i40e_aq_add_vsi(struct i40e_hw *hw,
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cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags);
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desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
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if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
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desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
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status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
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sizeof(vsi_ctx->info), cmd_details);
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@ -1204,8 +1202,6 @@ i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw,
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cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid);
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desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
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if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
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desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
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status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
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sizeof(vsi_ctx->info), NULL);
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@ -1244,8 +1240,6 @@ i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw,
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cmd->uplink_seid = cpu_to_le16(vsi_ctx->seid);
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desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
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if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
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desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
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status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
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sizeof(vsi_ctx->info), cmd_details);
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@ -862,12 +862,11 @@ static void i40e_dbg_dump_eth_stats(struct i40e_pf *pf,
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" rx_bytes = \t%lld \trx_unicast = \t\t%lld \trx_multicast = \t%lld\n",
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estats->rx_bytes, estats->rx_unicast, estats->rx_multicast);
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dev_info(&pf->pdev->dev,
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" rx_broadcast = \t%lld \trx_discards = \t\t%lld \trx_errors = \t%lld\n",
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estats->rx_broadcast, estats->rx_discards, estats->rx_errors);
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" rx_broadcast = \t%lld \trx_discards = \t\t%lld\n",
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estats->rx_broadcast, estats->rx_discards);
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dev_info(&pf->pdev->dev,
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" rx_missed = \t%lld \trx_unknown_protocol = \t%lld \ttx_bytes = \t%lld\n",
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estats->rx_missed, estats->rx_unknown_protocol,
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estats->tx_bytes);
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" rx_unknown_protocol = \t%lld \ttx_bytes = \t%lld\n",
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estats->rx_unknown_protocol, estats->tx_bytes);
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dev_info(&pf->pdev->dev,
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" tx_unicast = \t%lld \ttx_multicast = \t\t%lld \ttx_broadcast = \t%lld\n",
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estats->tx_unicast, estats->tx_multicast, estats->tx_broadcast);
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@ -67,17 +67,25 @@ static i40e_status i40e_diag_reg_pattern_test(struct i40e_hw *hw,
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struct i40e_diag_reg_test_info i40e_reg_list[] = {
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/* offset mask elements stride */
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{I40E_QTX_CTL(0), 0x0000FFBF, 4, I40E_QTX_CTL(1) - I40E_QTX_CTL(0)},
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{I40E_PFINT_ITR0(0), 0x00000FFF, 3, I40E_PFINT_ITR0(1) - I40E_PFINT_ITR0(0)},
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{I40E_PFINT_ITRN(0, 0), 0x00000FFF, 8, I40E_PFINT_ITRN(0, 1) - I40E_PFINT_ITRN(0, 0)},
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{I40E_PFINT_ITRN(1, 0), 0x00000FFF, 8, I40E_PFINT_ITRN(1, 1) - I40E_PFINT_ITRN(1, 0)},
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{I40E_PFINT_ITRN(2, 0), 0x00000FFF, 8, I40E_PFINT_ITRN(2, 1) - I40E_PFINT_ITRN(2, 0)},
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{I40E_PFINT_STAT_CTL0, 0x0000000C, 1, 0},
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{I40E_PFINT_LNKLST0, 0x00001FFF, 1, 0},
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{I40E_PFINT_LNKLSTN(0), 0x000007FF, 64, I40E_PFINT_LNKLSTN(1) - I40E_PFINT_LNKLSTN(0)},
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{I40E_QINT_TQCTL(0), 0x000000FF, 64, I40E_QINT_TQCTL(1) - I40E_QINT_TQCTL(0)},
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{I40E_QINT_RQCTL(0), 0x000000FF, 64, I40E_QINT_RQCTL(1) - I40E_QINT_RQCTL(0)},
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{I40E_PFINT_ICR0_ENA, 0xF7F20000, 1, 0},
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{I40E_QTX_CTL(0), 0x0000FFBF, 1,
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I40E_QTX_CTL(1) - I40E_QTX_CTL(0)},
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{I40E_PFINT_ITR0(0), 0x00000FFF, 3,
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I40E_PFINT_ITR0(1) - I40E_PFINT_ITR0(0)},
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{I40E_PFINT_ITRN(0, 0), 0x00000FFF, 1,
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I40E_PFINT_ITRN(0, 1) - I40E_PFINT_ITRN(0, 0)},
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{I40E_PFINT_ITRN(1, 0), 0x00000FFF, 1,
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I40E_PFINT_ITRN(1, 1) - I40E_PFINT_ITRN(1, 0)},
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{I40E_PFINT_ITRN(2, 0), 0x00000FFF, 1,
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I40E_PFINT_ITRN(2, 1) - I40E_PFINT_ITRN(2, 0)},
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{I40E_PFINT_STAT_CTL0, 0x0000000C, 1, 0},
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{I40E_PFINT_LNKLST0, 0x00001FFF, 1, 0},
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{I40E_PFINT_LNKLSTN(0), 0x000007FF, 1,
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I40E_PFINT_LNKLSTN(1) - I40E_PFINT_LNKLSTN(0)},
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{I40E_QINT_TQCTL(0), 0x000000FF, 1,
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I40E_QINT_TQCTL(1) - I40E_QINT_TQCTL(0)},
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{I40E_QINT_RQCTL(0), 0x000000FF, 1,
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I40E_QINT_RQCTL(1) - I40E_QINT_RQCTL(0)},
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{I40E_PFINT_ICR0_ENA, 0xF7F20000, 1, 0},
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{ 0 }
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};
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@ -93,9 +101,25 @@ i40e_status i40e_diag_reg_test(struct i40e_hw *hw)
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u32 reg, mask;
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u32 i, j;
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for (i = 0; (i40e_reg_list[i].offset != 0) && !ret_code; i++) {
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for (i = 0; i40e_reg_list[i].offset != 0 &&
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!ret_code; i++) {
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/* set actual reg range for dynamically allocated resources */
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if (i40e_reg_list[i].offset == I40E_QTX_CTL(0) &&
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hw->func_caps.num_tx_qp != 0)
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i40e_reg_list[i].elements = hw->func_caps.num_tx_qp;
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if ((i40e_reg_list[i].offset == I40E_PFINT_ITRN(0, 0) ||
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i40e_reg_list[i].offset == I40E_PFINT_ITRN(1, 0) ||
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i40e_reg_list[i].offset == I40E_PFINT_ITRN(2, 0) ||
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i40e_reg_list[i].offset == I40E_QINT_TQCTL(0) ||
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i40e_reg_list[i].offset == I40E_QINT_RQCTL(0)) &&
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hw->func_caps.num_msix_vectors != 0)
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i40e_reg_list[i].elements =
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hw->func_caps.num_msix_vectors - 1;
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/* test register access */
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mask = i40e_reg_list[i].mask;
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for (j = 0; (j < i40e_reg_list[i].elements) && !ret_code; j++) {
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for (j = 0; j < i40e_reg_list[i].elements && !ret_code; j++) {
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reg = i40e_reg_list[i].offset +
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(j * i40e_reg_list[i].stride);
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ret_code = i40e_diag_reg_pattern_test(hw, reg, mask);
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@ -62,6 +62,12 @@ static const struct i40e_stats i40e_gstrings_net_stats[] = {
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I40E_NETDEV_STAT(rx_crc_errors),
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};
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static const struct i40e_stats i40e_gstrings_misc_stats[] = {
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I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
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I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
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I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
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};
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static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
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struct ethtool_rxnfc *cmd);
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@ -78,7 +84,6 @@ static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
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static struct i40e_stats i40e_gstrings_stats[] = {
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I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes),
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I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes),
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I40E_PF_STAT("rx_errors", stats.eth.rx_errors),
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I40E_PF_STAT("tx_errors", stats.eth.tx_errors),
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I40E_PF_STAT("rx_dropped", stats.eth.rx_discards),
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I40E_PF_STAT("tx_dropped", stats.eth.tx_discards),
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@ -126,7 +131,9 @@ static struct i40e_stats i40e_gstrings_stats[] = {
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* (sizeof(struct i40e_queue_stats) / sizeof(u64)))
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#define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats)
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#define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats)
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#define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats)
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#define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \
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I40E_MISC_STATS_LEN + \
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I40E_QUEUE_STATS_LEN((n)))
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#define I40E_PFC_STATS_LEN ( \
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(FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \
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@ -649,6 +656,11 @@ static void i40e_get_ethtool_stats(struct net_device *netdev,
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data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat ==
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sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
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}
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for (j = 0; j < I40E_MISC_STATS_LEN; j++) {
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p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset;
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data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat ==
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sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
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}
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rcu_read_lock();
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for (j = 0; j < vsi->num_queue_pairs; j++) {
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tx_ring = ACCESS_ONCE(vsi->tx_rings[j]);
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@ -715,6 +727,11 @@ static void i40e_get_strings(struct net_device *netdev, u32 stringset,
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i40e_gstrings_net_stats[i].stat_string);
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p += ETH_GSTRING_LEN;
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}
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for (i = 0; i < I40E_MISC_STATS_LEN; i++) {
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snprintf(p, ETH_GSTRING_LEN, "%s",
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i40e_gstrings_misc_stats[i].stat_string);
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p += ETH_GSTRING_LEN;
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}
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for (i = 0; i < vsi->num_queue_pairs; i++) {
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snprintf(p, ETH_GSTRING_LEN, "tx-%u.tx_packets", i);
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p += ETH_GSTRING_LEN;
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@ -530,6 +530,12 @@ void i40e_update_eth_stats(struct i40e_vsi *vsi)
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i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
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vsi->stat_offsets_loaded,
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&oes->rx_discards, &es->rx_discards);
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i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
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vsi->stat_offsets_loaded,
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&oes->rx_unknown_protocol, &es->rx_unknown_protocol);
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i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
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vsi->stat_offsets_loaded,
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&oes->tx_errors, &es->tx_errors);
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i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
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I40E_GLV_GORCL(stat_idx),
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@ -720,19 +726,18 @@ static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
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}
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/**
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* i40e_update_stats - Update the board statistics counters.
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* i40e_update_vsi_stats - Update the vsi statistics counters.
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* @vsi: the VSI to be updated
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*
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* There are a few instances where we store the same stat in a
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* couple of different structs. This is partly because we have
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* the netdev stats that need to be filled out, which is slightly
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* different from the "eth_stats" defined by the chip and used in
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* VF communications. We sort it all out here in a central place.
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* VF communications. We sort it out here.
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**/
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void i40e_update_stats(struct i40e_vsi *vsi)
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static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
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{
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struct i40e_pf *pf = vsi->back;
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struct i40e_hw *hw = &pf->hw;
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struct rtnl_link_stats64 *ons;
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struct rtnl_link_stats64 *ns; /* netdev stats */
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struct i40e_eth_stats *oes;
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@ -741,8 +746,6 @@ void i40e_update_stats(struct i40e_vsi *vsi)
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u32 rx_page, rx_buf;
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u64 rx_p, rx_b;
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u64 tx_p, tx_b;
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u32 val;
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int i;
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u16 q;
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if (test_bit(__I40E_DOWN, &vsi->state) ||
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@ -804,195 +807,221 @@ void i40e_update_stats(struct i40e_vsi *vsi)
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ns->tx_packets = tx_p;
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ns->tx_bytes = tx_b;
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i40e_update_eth_stats(vsi);
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/* update netdev stats from eth stats */
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ons->rx_errors = oes->rx_errors;
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ns->rx_errors = es->rx_errors;
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i40e_update_eth_stats(vsi);
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ons->tx_errors = oes->tx_errors;
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ns->tx_errors = es->tx_errors;
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ons->multicast = oes->rx_multicast;
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ns->multicast = es->rx_multicast;
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ons->rx_dropped = oes->rx_discards;
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ns->rx_dropped = es->rx_discards;
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ons->tx_dropped = oes->tx_discards;
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ns->tx_dropped = es->tx_discards;
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/* Get the port data only if this is the main PF VSI */
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/* pull in a couple PF stats if this is the main vsi */
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if (vsi == pf->vsi[pf->lan_vsi]) {
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struct i40e_hw_port_stats *nsd = &pf->stats;
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struct i40e_hw_port_stats *osd = &pf->stats_offsets;
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ns->rx_crc_errors = pf->stats.crc_errors;
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ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
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ns->rx_length_errors = pf->stats.rx_length_errors;
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}
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}
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i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
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I40E_GLPRT_GORCL(hw->port),
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pf->stat_offsets_loaded,
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&osd->eth.rx_bytes, &nsd->eth.rx_bytes);
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i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
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I40E_GLPRT_GOTCL(hw->port),
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pf->stat_offsets_loaded,
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&osd->eth.tx_bytes, &nsd->eth.tx_bytes);
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i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
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pf->stat_offsets_loaded,
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&osd->eth.rx_discards,
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&nsd->eth.rx_discards);
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i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
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pf->stat_offsets_loaded,
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&osd->eth.tx_discards,
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&nsd->eth.tx_discards);
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i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
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I40E_GLPRT_MPRCL(hw->port),
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pf->stat_offsets_loaded,
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&osd->eth.rx_multicast,
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&nsd->eth.rx_multicast);
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/**
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* i40e_update_pf_stats - Update the pf statistics counters.
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* @pf: the PF to be updated
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**/
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static void i40e_update_pf_stats(struct i40e_pf *pf)
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{
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struct i40e_hw_port_stats *osd = &pf->stats_offsets;
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struct i40e_hw_port_stats *nsd = &pf->stats;
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struct i40e_hw *hw = &pf->hw;
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u32 val;
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int i;
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i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
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pf->stat_offsets_loaded,
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&osd->tx_dropped_link_down,
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&nsd->tx_dropped_link_down);
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i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
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I40E_GLPRT_GORCL(hw->port),
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pf->stat_offsets_loaded,
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&osd->eth.rx_bytes, &nsd->eth.rx_bytes);
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i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
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I40E_GLPRT_GOTCL(hw->port),
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pf->stat_offsets_loaded,
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&osd->eth.tx_bytes, &nsd->eth.tx_bytes);
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i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
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pf->stat_offsets_loaded,
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&osd->eth.rx_discards,
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&nsd->eth.rx_discards);
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i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
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pf->stat_offsets_loaded,
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&osd->eth.tx_discards,
|
||||
&nsd->eth.tx_discards);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
|
||||
I40E_GLPRT_MPRCL(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->eth.rx_multicast,
|
||||
&nsd->eth.rx_multicast);
|
||||
|
||||
i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->crc_errors, &nsd->crc_errors);
|
||||
ns->rx_crc_errors = nsd->crc_errors;
|
||||
i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_dropped_link_down,
|
||||
&nsd->tx_dropped_link_down);
|
||||
|
||||
i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->illegal_bytes, &nsd->illegal_bytes);
|
||||
ns->rx_errors = nsd->crc_errors
|
||||
+ nsd->illegal_bytes;
|
||||
i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->crc_errors, &nsd->crc_errors);
|
||||
|
||||
i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->mac_local_faults,
|
||||
&nsd->mac_local_faults);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->mac_remote_faults,
|
||||
&nsd->mac_remote_faults);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->illegal_bytes, &nsd->illegal_bytes);
|
||||
|
||||
i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_length_errors,
|
||||
&nsd->rx_length_errors);
|
||||
ns->rx_length_errors = nsd->rx_length_errors;
|
||||
i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->mac_local_faults,
|
||||
&nsd->mac_local_faults);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->mac_remote_faults,
|
||||
&nsd->mac_remote_faults);
|
||||
|
||||
i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->link_xon_rx, &nsd->link_xon_rx);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->link_xon_tx, &nsd->link_xon_tx);
|
||||
i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
|
||||
i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->link_xoff_tx, &nsd->link_xoff_tx);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_length_errors,
|
||||
&nsd->rx_length_errors);
|
||||
|
||||
for (i = 0; i < 8; i++) {
|
||||
i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->priority_xon_rx[i],
|
||||
&nsd->priority_xon_rx[i]);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->priority_xon_tx[i],
|
||||
&nsd->priority_xon_tx[i]);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->priority_xoff_tx[i],
|
||||
&nsd->priority_xoff_tx[i]);
|
||||
i40e_stat_update32(hw,
|
||||
I40E_GLPRT_RXON2OFFCNT(hw->port, i),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->priority_xon_2_xoff[i],
|
||||
&nsd->priority_xon_2_xoff[i]);
|
||||
}
|
||||
i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->link_xon_rx, &nsd->link_xon_rx);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->link_xon_tx, &nsd->link_xon_tx);
|
||||
i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
|
||||
i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->link_xoff_tx, &nsd->link_xoff_tx);
|
||||
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
|
||||
I40E_GLPRT_PRC64L(hw->port),
|
||||
for (i = 0; i < 8; i++) {
|
||||
i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_size_64, &nsd->rx_size_64);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
|
||||
I40E_GLPRT_PRC127L(hw->port),
|
||||
&osd->priority_xon_rx[i],
|
||||
&nsd->priority_xon_rx[i]);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_size_127, &nsd->rx_size_127);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
|
||||
I40E_GLPRT_PRC255L(hw->port),
|
||||
&osd->priority_xon_tx[i],
|
||||
&nsd->priority_xon_tx[i]);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_size_255, &nsd->rx_size_255);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
|
||||
I40E_GLPRT_PRC511L(hw->port),
|
||||
&osd->priority_xoff_tx[i],
|
||||
&nsd->priority_xoff_tx[i]);
|
||||
i40e_stat_update32(hw,
|
||||
I40E_GLPRT_RXON2OFFCNT(hw->port, i),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_size_511, &nsd->rx_size_511);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
|
||||
I40E_GLPRT_PRC1023L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_size_1023, &nsd->rx_size_1023);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
|
||||
I40E_GLPRT_PRC1522L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_size_1522, &nsd->rx_size_1522);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
|
||||
I40E_GLPRT_PRC9522L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_size_big, &nsd->rx_size_big);
|
||||
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
|
||||
I40E_GLPRT_PTC64L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_size_64, &nsd->tx_size_64);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
|
||||
I40E_GLPRT_PTC127L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_size_127, &nsd->tx_size_127);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
|
||||
I40E_GLPRT_PTC255L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_size_255, &nsd->tx_size_255);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
|
||||
I40E_GLPRT_PTC511L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_size_511, &nsd->tx_size_511);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
|
||||
I40E_GLPRT_PTC1023L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_size_1023, &nsd->tx_size_1023);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
|
||||
I40E_GLPRT_PTC1522L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_size_1522, &nsd->tx_size_1522);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
|
||||
I40E_GLPRT_PTC9522L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_size_big, &nsd->tx_size_big);
|
||||
|
||||
i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_undersize, &nsd->rx_undersize);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_fragments, &nsd->rx_fragments);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_oversize, &nsd->rx_oversize);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_jabber, &nsd->rx_jabber);
|
||||
|
||||
val = rd32(hw, I40E_PRTPM_EEE_STAT);
|
||||
nsd->tx_lpi_status =
|
||||
(val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
|
||||
I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
|
||||
nsd->rx_lpi_status =
|
||||
(val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
|
||||
I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
|
||||
i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_lpi_count, &nsd->tx_lpi_count);
|
||||
i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_lpi_count, &nsd->rx_lpi_count);
|
||||
&osd->priority_xon_2_xoff[i],
|
||||
&nsd->priority_xon_2_xoff[i]);
|
||||
}
|
||||
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
|
||||
I40E_GLPRT_PRC64L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_size_64, &nsd->rx_size_64);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
|
||||
I40E_GLPRT_PRC127L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_size_127, &nsd->rx_size_127);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
|
||||
I40E_GLPRT_PRC255L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_size_255, &nsd->rx_size_255);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
|
||||
I40E_GLPRT_PRC511L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_size_511, &nsd->rx_size_511);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
|
||||
I40E_GLPRT_PRC1023L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_size_1023, &nsd->rx_size_1023);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
|
||||
I40E_GLPRT_PRC1522L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_size_1522, &nsd->rx_size_1522);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
|
||||
I40E_GLPRT_PRC9522L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_size_big, &nsd->rx_size_big);
|
||||
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
|
||||
I40E_GLPRT_PTC64L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_size_64, &nsd->tx_size_64);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
|
||||
I40E_GLPRT_PTC127L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_size_127, &nsd->tx_size_127);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
|
||||
I40E_GLPRT_PTC255L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_size_255, &nsd->tx_size_255);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
|
||||
I40E_GLPRT_PTC511L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_size_511, &nsd->tx_size_511);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
|
||||
I40E_GLPRT_PTC1023L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_size_1023, &nsd->tx_size_1023);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
|
||||
I40E_GLPRT_PTC1522L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_size_1522, &nsd->tx_size_1522);
|
||||
i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
|
||||
I40E_GLPRT_PTC9522L(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_size_big, &nsd->tx_size_big);
|
||||
|
||||
i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_undersize, &nsd->rx_undersize);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_fragments, &nsd->rx_fragments);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_oversize, &nsd->rx_oversize);
|
||||
i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_jabber, &nsd->rx_jabber);
|
||||
|
||||
val = rd32(hw, I40E_PRTPM_EEE_STAT);
|
||||
nsd->tx_lpi_status =
|
||||
(val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
|
||||
I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
|
||||
nsd->rx_lpi_status =
|
||||
(val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
|
||||
I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
|
||||
i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->tx_lpi_count, &nsd->tx_lpi_count);
|
||||
i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
|
||||
pf->stat_offsets_loaded,
|
||||
&osd->rx_lpi_count, &nsd->rx_lpi_count);
|
||||
|
||||
pf->stat_offsets_loaded = true;
|
||||
}
|
||||
|
||||
/**
|
||||
* i40e_update_stats - Update the various statistics counters.
|
||||
* @vsi: the VSI to be updated
|
||||
*
|
||||
* Update the various stats for this VSI and its related entities.
|
||||
**/
|
||||
void i40e_update_stats(struct i40e_vsi *vsi)
|
||||
{
|
||||
struct i40e_pf *pf = vsi->back;
|
||||
|
||||
if (vsi == pf->vsi[pf->lan_vsi])
|
||||
i40e_update_pf_stats(pf);
|
||||
|
||||
i40e_update_vsi_stats(vsi);
|
||||
}
|
||||
|
||||
/**
|
||||
* i40e_find_filter - Search VSI filter list for specific mac/vlan filter
|
||||
* @vsi: the VSI to be searched
|
||||
@ -1698,7 +1727,7 @@ static void i40e_sync_filters_subtask(struct i40e_pf *pf)
|
||||
static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
|
||||
{
|
||||
struct i40e_netdev_priv *np = netdev_priv(netdev);
|
||||
int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
|
||||
int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
|
||||
struct i40e_vsi *vsi = np->vsi;
|
||||
|
||||
/* MTU < 68 is an error and causes problems on some kernels */
|
||||
@ -4412,6 +4441,9 @@ void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
|
||||
|
||||
WARN_ON(in_interrupt());
|
||||
|
||||
if (i40e_check_asq_alive(&pf->hw))
|
||||
i40e_vc_notify_reset(pf);
|
||||
|
||||
/* do the biggest reset indicated */
|
||||
if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
|
||||
|
||||
@ -5328,9 +5360,6 @@ static int i40e_prep_for_reset(struct i40e_pf *pf)
|
||||
|
||||
dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
|
||||
|
||||
if (i40e_check_asq_alive(hw))
|
||||
i40e_vc_notify_reset(pf);
|
||||
|
||||
/* quiesce the VSIs and their queues that are not already DOWN */
|
||||
i40e_pf_quiesce_all_vsi(pf);
|
||||
|
||||
@ -5350,6 +5379,22 @@ static int i40e_prep_for_reset(struct i40e_pf *pf)
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* i40e_send_version - update firmware with driver version
|
||||
* @pf: PF struct
|
||||
*/
|
||||
static void i40e_send_version(struct i40e_pf *pf)
|
||||
{
|
||||
struct i40e_driver_version dv;
|
||||
|
||||
dv.major_version = DRV_VERSION_MAJOR;
|
||||
dv.minor_version = DRV_VERSION_MINOR;
|
||||
dv.build_version = DRV_VERSION_BUILD;
|
||||
dv.subbuild_version = 0;
|
||||
strncpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
|
||||
i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
|
||||
}
|
||||
|
||||
/**
|
||||
* i40e_reset_and_rebuild - reset and rebuild using a saved config
|
||||
* @pf: board private structure
|
||||
@ -5357,7 +5402,6 @@ static int i40e_prep_for_reset(struct i40e_pf *pf)
|
||||
**/
|
||||
static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
|
||||
{
|
||||
struct i40e_driver_version dv;
|
||||
struct i40e_hw *hw = &pf->hw;
|
||||
i40e_status ret;
|
||||
u32 v;
|
||||
@ -5490,11 +5534,7 @@ static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
|
||||
}
|
||||
|
||||
/* tell the firmware that we're starting */
|
||||
dv.major_version = DRV_VERSION_MAJOR;
|
||||
dv.minor_version = DRV_VERSION_MINOR;
|
||||
dv.build_version = DRV_VERSION_BUILD;
|
||||
dv.subbuild_version = 0;
|
||||
i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
|
||||
i40e_send_version(pf);
|
||||
|
||||
dev_info(&pf->pdev->dev, "reset complete\n");
|
||||
|
||||
@ -8138,7 +8178,6 @@ static void i40e_print_features(struct i40e_pf *pf)
|
||||
**/
|
||||
static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
{
|
||||
struct i40e_driver_version dv;
|
||||
struct i40e_pf *pf;
|
||||
struct i40e_hw *hw;
|
||||
static u16 pfs_found;
|
||||
@ -8393,12 +8432,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
i40e_dbg_pf_init(pf);
|
||||
|
||||
/* tell the firmware that we're starting */
|
||||
dv.major_version = DRV_VERSION_MAJOR;
|
||||
dv.minor_version = DRV_VERSION_MINOR;
|
||||
dv.build_version = DRV_VERSION_BUILD;
|
||||
dv.subbuild_version = 0;
|
||||
strncpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
|
||||
i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
|
||||
i40e_send_version(pf);
|
||||
|
||||
/* since everything's happy, start the service_task timer */
|
||||
mod_timer(&pf->service_timer,
|
||||
|
@ -458,13 +458,13 @@ static void i40e_fd_handle_status(struct i40e_ring *rx_ring,
|
||||
*/
|
||||
if (fcnt_prog >= (fcnt_avail - I40E_FDIR_BUFFER_FULL_MARGIN)) {
|
||||
/* Turn off ATR first */
|
||||
if (pf->flags | I40E_FLAG_FD_ATR_ENABLED) {
|
||||
if (pf->flags & I40E_FLAG_FD_ATR_ENABLED) {
|
||||
pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
|
||||
dev_warn(&pdev->dev, "FD filter space full, ATR for further flows will be turned off\n");
|
||||
pf->auto_disable_flags |=
|
||||
I40E_FLAG_FD_ATR_ENABLED;
|
||||
pf->flags |= I40E_FLAG_FDIR_REQUIRES_REINIT;
|
||||
} else if (pf->flags | I40E_FLAG_FD_SB_ENABLED) {
|
||||
} else if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
|
||||
pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
|
||||
dev_warn(&pdev->dev, "FD filter space full, new ntuple rules will not be added\n");
|
||||
pf->auto_disable_flags |=
|
||||
|
@ -179,7 +179,6 @@ enum i40e_ring_state_t {
|
||||
__I40E_TX_DETECT_HANG,
|
||||
__I40E_HANG_CHECK_ARMED,
|
||||
__I40E_RX_PS_ENABLED,
|
||||
__I40E_RX_LRO_ENABLED,
|
||||
__I40E_RX_16BYTE_DESC_ENABLED,
|
||||
};
|
||||
|
||||
@ -195,12 +194,6 @@ enum i40e_ring_state_t {
|
||||
set_bit(__I40E_TX_DETECT_HANG, &(ring)->state)
|
||||
#define clear_check_for_tx_hang(ring) \
|
||||
clear_bit(__I40E_TX_DETECT_HANG, &(ring)->state)
|
||||
#define ring_is_lro_enabled(ring) \
|
||||
test_bit(__I40E_RX_LRO_ENABLED, &(ring)->state)
|
||||
#define set_ring_lro_enabled(ring) \
|
||||
set_bit(__I40E_RX_LRO_ENABLED, &(ring)->state)
|
||||
#define clear_ring_lro_enabled(ring) \
|
||||
clear_bit(__I40E_RX_LRO_ENABLED, &(ring)->state)
|
||||
#define ring_is_16byte_desc_enabled(ring) \
|
||||
test_bit(__I40E_RX_16BYTE_DESC_ENABLED, &(ring)->state)
|
||||
#define set_ring_16byte_desc_enabled(ring) \
|
||||
|
@ -60,8 +60,8 @@
|
||||
/* Max default timeout in ms, */
|
||||
#define I40E_MAX_NVM_TIMEOUT 18000
|
||||
|
||||
/* Switch from mc to the 2usec global time (this is the GTIME resolution) */
|
||||
#define I40E_MS_TO_GTIME(time) (((time) * 1000) / 2)
|
||||
/* Switch from ms to the 1usec global time (this is the GTIME resolution) */
|
||||
#define I40E_MS_TO_GTIME(time) ((time) * 1000)
|
||||
|
||||
/* forward declaration */
|
||||
struct i40e_hw;
|
||||
@ -955,6 +955,16 @@ struct i40e_vsi_context {
|
||||
struct i40e_aqc_vsi_properties_data info;
|
||||
};
|
||||
|
||||
struct i40e_veb_context {
|
||||
u16 seid;
|
||||
u16 uplink_seid;
|
||||
u16 veb_number;
|
||||
u16 vebs_allocated;
|
||||
u16 vebs_unallocated;
|
||||
u16 flags;
|
||||
struct i40e_aqc_get_veb_parameters_completion info;
|
||||
};
|
||||
|
||||
/* Statistics collected by each port, VSI, VEB, and S-channel */
|
||||
struct i40e_eth_stats {
|
||||
u64 rx_bytes; /* gorc */
|
||||
@ -962,8 +972,6 @@ struct i40e_eth_stats {
|
||||
u64 rx_multicast; /* mprc */
|
||||
u64 rx_broadcast; /* bprc */
|
||||
u64 rx_discards; /* rdpc */
|
||||
u64 rx_errors; /* repc */
|
||||
u64 rx_missed; /* rmpc */
|
||||
u64 rx_unknown_protocol; /* rupp */
|
||||
u64 tx_bytes; /* gotc */
|
||||
u64 tx_unicast; /* uptc */
|
||||
|
@ -178,7 +178,6 @@ enum i40e_ring_state_t {
|
||||
__I40E_TX_DETECT_HANG,
|
||||
__I40E_HANG_CHECK_ARMED,
|
||||
__I40E_RX_PS_ENABLED,
|
||||
__I40E_RX_LRO_ENABLED,
|
||||
__I40E_RX_16BYTE_DESC_ENABLED,
|
||||
};
|
||||
|
||||
@ -194,12 +193,6 @@ enum i40e_ring_state_t {
|
||||
set_bit(__I40E_TX_DETECT_HANG, &(ring)->state)
|
||||
#define clear_check_for_tx_hang(ring) \
|
||||
clear_bit(__I40E_TX_DETECT_HANG, &(ring)->state)
|
||||
#define ring_is_lro_enabled(ring) \
|
||||
test_bit(__I40E_RX_LRO_ENABLED, &(ring)->state)
|
||||
#define set_ring_lro_enabled(ring) \
|
||||
set_bit(__I40E_RX_LRO_ENABLED, &(ring)->state)
|
||||
#define clear_ring_lro_enabled(ring) \
|
||||
clear_bit(__I40E_RX_LRO_ENABLED, &(ring)->state)
|
||||
#define ring_is_16byte_desc_enabled(ring) \
|
||||
test_bit(__I40E_RX_16BYTE_DESC_ENABLED, &(ring)->state)
|
||||
#define set_ring_16byte_desc_enabled(ring) \
|
||||
|
@ -60,8 +60,8 @@
|
||||
/* Max default timeout in ms, */
|
||||
#define I40E_MAX_NVM_TIMEOUT 18000
|
||||
|
||||
/* Switch from mc to the 2usec global time (this is the GTIME resolution) */
|
||||
#define I40E_MS_TO_GTIME(time) (((time) * 1000) / 2)
|
||||
/* Switch from ms to the 1usec global time (this is the GTIME resolution) */
|
||||
#define I40E_MS_TO_GTIME(time) ((time) * 1000)
|
||||
|
||||
/* forward declaration */
|
||||
struct i40e_hw;
|
||||
@ -955,6 +955,16 @@ struct i40e_vsi_context {
|
||||
struct i40e_aqc_vsi_properties_data info;
|
||||
};
|
||||
|
||||
struct i40e_veb_context {
|
||||
u16 seid;
|
||||
u16 uplink_seid;
|
||||
u16 veb_number;
|
||||
u16 vebs_allocated;
|
||||
u16 vebs_unallocated;
|
||||
u16 flags;
|
||||
struct i40e_aqc_get_veb_parameters_completion info;
|
||||
};
|
||||
|
||||
/* Statistics collected by each port, VSI, VEB, and S-channel */
|
||||
struct i40e_eth_stats {
|
||||
u64 rx_bytes; /* gorc */
|
||||
@ -962,8 +972,6 @@ struct i40e_eth_stats {
|
||||
u64 rx_multicast; /* mprc */
|
||||
u64 rx_broadcast; /* bprc */
|
||||
u64 rx_discards; /* rdpc */
|
||||
u64 rx_errors; /* repc */
|
||||
u64 rx_missed; /* rmpc */
|
||||
u64 rx_unknown_protocol; /* rupp */
|
||||
u64 tx_bytes; /* gotc */
|
||||
u64 tx_unicast; /* uptc */
|
||||
|
@ -80,7 +80,7 @@ struct i40e_vsi {
|
||||
#define I40EVF_MIN_TXD 64
|
||||
#define I40EVF_MAX_RXD 4096
|
||||
#define I40EVF_MIN_RXD 64
|
||||
#define I40EVF_REQ_DESCRIPTOR_MULTIPLE 8
|
||||
#define I40EVF_REQ_DESCRIPTOR_MULTIPLE 32
|
||||
|
||||
/* Supported Rx Buffer Sizes */
|
||||
#define I40EVF_RXBUFFER_64 64 /* Used for packet split */
|
||||
@ -196,10 +196,12 @@ struct i40evf_adapter {
|
||||
struct i40e_ring *tx_rings[I40E_MAX_VSI_QP];
|
||||
u32 tx_timeout_count;
|
||||
struct list_head mac_filter_list;
|
||||
u32 tx_desc_count;
|
||||
|
||||
/* RX */
|
||||
struct i40e_ring *rx_rings[I40E_MAX_VSI_QP];
|
||||
u64 hw_csum_rx_error;
|
||||
u32 rx_desc_count;
|
||||
int num_msix_vectors;
|
||||
struct msix_entry *msix_entries;
|
||||
|
||||
|
@ -47,8 +47,6 @@ static const struct i40evf_stats i40evf_gstrings_stats[] = {
|
||||
I40EVF_STAT("rx_multicast", current_stats.rx_multicast),
|
||||
I40EVF_STAT("rx_broadcast", current_stats.rx_broadcast),
|
||||
I40EVF_STAT("rx_discards", current_stats.rx_discards),
|
||||
I40EVF_STAT("rx_errors", current_stats.rx_errors),
|
||||
I40EVF_STAT("rx_missed", current_stats.rx_missed),
|
||||
I40EVF_STAT("rx_unknown_protocol", current_stats.rx_unknown_protocol),
|
||||
I40EVF_STAT("tx_bytes", current_stats.tx_bytes),
|
||||
I40EVF_STAT("tx_unicast", current_stats.tx_unicast),
|
||||
@ -224,13 +222,11 @@ static void i40evf_get_ringparam(struct net_device *netdev,
|
||||
struct ethtool_ringparam *ring)
|
||||
{
|
||||
struct i40evf_adapter *adapter = netdev_priv(netdev);
|
||||
struct i40e_ring *tx_ring = adapter->tx_rings[0];
|
||||
struct i40e_ring *rx_ring = adapter->rx_rings[0];
|
||||
|
||||
ring->rx_max_pending = I40EVF_MAX_RXD;
|
||||
ring->tx_max_pending = I40EVF_MAX_TXD;
|
||||
ring->rx_pending = rx_ring->count;
|
||||
ring->tx_pending = tx_ring->count;
|
||||
ring->rx_pending = adapter->rx_desc_count;
|
||||
ring->tx_pending = adapter->tx_desc_count;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -246,7 +242,6 @@ static int i40evf_set_ringparam(struct net_device *netdev,
|
||||
{
|
||||
struct i40evf_adapter *adapter = netdev_priv(netdev);
|
||||
u32 new_rx_count, new_tx_count;
|
||||
int i;
|
||||
|
||||
if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
|
||||
return -EINVAL;
|
||||
@ -262,17 +257,16 @@ static int i40evf_set_ringparam(struct net_device *netdev,
|
||||
new_rx_count = ALIGN(new_rx_count, I40EVF_REQ_DESCRIPTOR_MULTIPLE);
|
||||
|
||||
/* if nothing to do return success */
|
||||
if ((new_tx_count == adapter->tx_rings[0]->count) &&
|
||||
(new_rx_count == adapter->rx_rings[0]->count))
|
||||
if ((new_tx_count == adapter->tx_desc_count) &&
|
||||
(new_rx_count == adapter->rx_desc_count))
|
||||
return 0;
|
||||
|
||||
for (i = 0; i < adapter->vsi_res->num_queue_pairs; i++) {
|
||||
adapter->tx_rings[0]->count = new_tx_count;
|
||||
adapter->rx_rings[0]->count = new_rx_count;
|
||||
}
|
||||
adapter->tx_desc_count = new_tx_count;
|
||||
adapter->rx_desc_count = new_rx_count;
|
||||
|
||||
if (netif_running(netdev))
|
||||
i40evf_reinit_locked(adapter);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -1091,14 +1091,14 @@ static int i40evf_alloc_queues(struct i40evf_adapter *adapter)
|
||||
tx_ring->queue_index = i;
|
||||
tx_ring->netdev = adapter->netdev;
|
||||
tx_ring->dev = &adapter->pdev->dev;
|
||||
tx_ring->count = I40EVF_DEFAULT_TXD;
|
||||
tx_ring->count = adapter->tx_desc_count;
|
||||
adapter->tx_rings[i] = tx_ring;
|
||||
|
||||
rx_ring = &tx_ring[1];
|
||||
rx_ring->queue_index = i;
|
||||
rx_ring->netdev = adapter->netdev;
|
||||
rx_ring->dev = &adapter->pdev->dev;
|
||||
rx_ring->count = I40EVF_DEFAULT_RXD;
|
||||
rx_ring->count = adapter->rx_desc_count;
|
||||
adapter->rx_rings[i] = rx_ring;
|
||||
}
|
||||
|
||||
@ -1669,6 +1669,7 @@ static int i40evf_setup_all_tx_resources(struct i40evf_adapter *adapter)
|
||||
int i, err = 0;
|
||||
|
||||
for (i = 0; i < adapter->vsi_res->num_queue_pairs; i++) {
|
||||
adapter->tx_rings[i]->count = adapter->tx_desc_count;
|
||||
err = i40evf_setup_tx_descriptors(adapter->tx_rings[i]);
|
||||
if (!err)
|
||||
continue;
|
||||
@ -1696,6 +1697,7 @@ static int i40evf_setup_all_rx_resources(struct i40evf_adapter *adapter)
|
||||
int i, err = 0;
|
||||
|
||||
for (i = 0; i < adapter->vsi_res->num_queue_pairs; i++) {
|
||||
adapter->rx_rings[i]->count = adapter->rx_desc_count;
|
||||
err = i40evf_setup_rx_descriptors(adapter->rx_rings[i]);
|
||||
if (!err)
|
||||
continue;
|
||||
@ -2092,6 +2094,8 @@ static void i40evf_init_task(struct work_struct *work)
|
||||
adapter->watchdog_timer.data = (unsigned long)adapter;
|
||||
mod_timer(&adapter->watchdog_timer, jiffies + 1);
|
||||
|
||||
adapter->tx_desc_count = I40EVF_DEFAULT_TXD;
|
||||
adapter->rx_desc_count = I40EVF_DEFAULT_RXD;
|
||||
err = i40evf_init_interrupt_scheme(adapter);
|
||||
if (err)
|
||||
goto err_sw_init;
|
||||
|
@ -748,9 +748,8 @@ void i40evf_virtchnl_completion(struct i40evf_adapter *adapter,
|
||||
stats->tx_broadcast;
|
||||
adapter->net_stats.rx_bytes = stats->rx_bytes;
|
||||
adapter->net_stats.tx_bytes = stats->tx_bytes;
|
||||
adapter->net_stats.rx_errors = stats->rx_errors;
|
||||
adapter->net_stats.tx_errors = stats->tx_errors;
|
||||
adapter->net_stats.rx_dropped = stats->rx_missed;
|
||||
adapter->net_stats.rx_dropped = stats->rx_discards;
|
||||
adapter->net_stats.tx_dropped = stats->tx_discards;
|
||||
adapter->current_stats = *stats;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user