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Qualcomm ARM64 DTS additional patches for v5.16

Browse Source 
The RPM and RPMh sleep stats are introduced on a number of platforms, to
 aid the enablement of entering low power mode.
 
 The MSM8916 support receives some polishing touches, followed by
 introduction of the necessary pieces to use the DeviceTree on 32-bit
 variants of the MSM8916 platform, in particular to boot the secondary
 CPUs. Based on this support for the Samsung Galaxy S4 Mini Value Edition
 is introduced.
 
 The Asus Zenfone 2 Laser gained touchscreen, sensors and sdcard support.
 
 MSM8996 got support for the its crypto hardware and the Xiaomi Mi 5
 gained a description of its LCD panel.
 
 The Trogdor device on SC7180 gained support for a second source eDP
 brigde, while SC7280 gains PCIe support and the newly introduced
 Herobrine device.
 
 Both MSM8916 and SDM845 has their standalong SMEM node dropped, in favour
 of the newly introduced support for specifying the compatible directly
 on the reserved-memory node.
 
 The SM7225 platform is introduced, as a derrivative of SM6350, initial
 support for the PM6350 PMIC and based on this the Fairphone 4 is
 introduced.
 
 The RB3 and RB5 devices gains msm-id and board-id, to allow the two DTBs
 to be baked into a single boot.img that can be booted on both devices.
 
 As the GDSC driver has been extended to properly describe the
 relationship between MMCX and MDSS_GDSC, the now deprecated mmcx
 regulator is removed from SM8250.
 
 SM8350 gained CPU topology, idle-states and fastrpc support. FastRPC was
 also added for SM8150 and the SA8155p ADP got a couple of remoteprocs
 enabled.
 
 Additionally a number of DT validation issues was corrected across the
 various platforms and devices.
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Merge tag 'qcom-arm64-for-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm ARM64 DTS additional patches for v5.16

The RPM and RPMh sleep stats are introduced on a number of platforms, to
aid the enablement of entering low power mode.

The MSM8916 support receives some polishing touches, followed by
introduction of the necessary pieces to use the DeviceTree on 32-bit
variants of the MSM8916 platform, in particular to boot the secondary
CPUs. Based on this support for the Samsung Galaxy S4 Mini Value Edition
is introduced.

The Asus Zenfone 2 Laser gained touchscreen, sensors and sdcard support.

MSM8996 got support for the its crypto hardware and the Xiaomi Mi 5
gained a description of its LCD panel.

The Trogdor device on SC7180 gained support for a second source eDP
brigde, while SC7280 gains PCIe support and the newly introduced
Herobrine device.

Both MSM8916 and SDM845 has their standalong SMEM node dropped, in favour
of the newly introduced support for specifying the compatible directly
on the reserved-memory node.

The SM7225 platform is introduced, as a derrivative of SM6350, initial
support for the PM6350 PMIC and based on this the Fairphone 4 is
introduced.

The RB3 and RB5 devices gains msm-id and board-id, to allow the two DTBs
to be baked into a single boot.img that can be booted on both devices.

As the GDSC driver has been extended to properly describe the
relationship between MMCX and MDSS_GDSC, the now deprecated mmcx
regulator is removed from SM8250.

SM8350 gained CPU topology, idle-states and fastrpc support. FastRPC was
also added for SM8150 and the SA8155p ADP got a couple of remoteprocs
enabled.

Additionally a number of DT validation issues was corrected across the
various platforms and devices.

* tag 'qcom-arm64-for-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (77 commits)
  Revert "arm64: dts: qcom: msm8916-asus-z00l: Add sensors"
  arm64: dts: qcom: ipq6018: Remove unused 'iface_clk' property from dma-controller node
  arm64: dts: qcom: ipq6018: Remove unused 'qcom,config-pipe-trust-reg' property
  arm64: dts: qcom: sm8350: Add CPU topology and idle-states
  arm64: dts: qcom: Drop unneeded extra device-specific includes
  arm64: dts: qcom: msm8916: Drop standalone smem node
  arm64: dts: qcom: Fix node name of rpm-msg-ram device nodes
  arm64: dts: qcom: msm8916-asus-z00l: Add sensors
  arm64: dts: qcom: msm8916-asus-z00l: Add SDCard
  arm64: dts: qcom: msm8916-asus-z00l: Add touchscreen
  arm64: dts: qcom: sdm845-oneplus: remove devinfo-size from ramoops node
  arm64: dts: qcom: sdm845: Fix Qualcomm crypto engine bus clock
  arm64: dts: qcom: msm8996: Add device tree entries to support crypto engine
  arm64: dts: qcom: msm8996: move clock-frequency from PN547 NFC to I2C bus
  arm64: dts: qcom: msm8916-asus-z00l: Add sensors
  arm64: dts: qcom: sdm630: Add disabled Venus support
  arm64: dts: qcom: pm660l: Remove board-specific WLED configuration
  arm64: dts: qcom: Move WLED num-strings from pmi8994 to sony-xperia-tone
  arm64: dts: qcom: pmi8994: Remove hardcoded linear WLED enabled-strings
  arm64: dts: qcom: pmi8994: Fix "eternal"->"external" typo in WLED node
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-10-26 22:28:18 +02:00
commit d584cdc9e8
121 changed files with 5812 additions and 2256 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/arm/cpus.yaml
View File

@ -172,6 +172,7 @@ properties:
- qcom,kryo468
- qcom,kryo485
- qcom,kryo560
- qcom,kryo570
- qcom,kryo685
- qcom,scorpion

6
Documentation/devicetree/bindings/arm/qcom.yaml
View File

@ -46,6 +46,7 @@ description: |
sdm845
sdx55
sdx65
sm7225
sm8150
sm8250
sm8350
@ -234,6 +235,11 @@ properties:
- qcom,sa8155p-adp
- const: qcom,sa8155p
- items:
- enum:
- fairphone,fp4
- const: qcom,sm7225
- items:
- enum:
- qcom,sm8150-mtp

1
arch/arm/boot/dts/Makefile
View File

@ -975,6 +975,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq8064-rb3011.dtb \
qcom-msm8226-samsung-s3ve3g.dtb \
qcom-msm8660-surf.dtb \
qcom-msm8916-samsung-serranove.dtb \
qcom-msm8960-cdp.dtb \
qcom-msm8974-fairphone-fp2.dtb \
qcom-msm8974-lge-nexus5-hammerhead.dtb \

3
arch/arm/boot/dts/qcom-msm8916-samsung-serranove.dts Normal file
View File

@ -0,0 +1,3 @@
// SPDX-License-Identifier: GPL-2.0-only
#include "arm64/qcom/msm8916-samsung-serranove.dts"
#include "qcom-msm8916-smp.dtsi"

62
arch/arm/boot/dts/qcom-msm8916-smp.dtsi Normal file
View File

@ -0,0 +1,62 @@
// SPDX-License-Identifier: GPL-2.0-only
/ {
cpus {
cpu@0 {
enable-method = "qcom,msm8916-smp";
};
cpu@1 {
enable-method = "qcom,msm8916-smp";
};
cpu@2 {
enable-method = "qcom,msm8916-smp";
};
cpu@3 {
enable-method = "qcom,msm8916-smp";
};
idle-states {
/delete-property/ entry-method;
};
};
psci {
status = "disabled";
};
};
&CPU_SLEEP_0 {
compatible = "qcom,idle-state-spc";
};
&cpu0_acc {
status = "okay";
};
&cpu0_saw {
status = "okay";
};
&cpu1_acc {
status = "okay";
};
&cpu1_saw {
status = "okay";
};
&cpu2_acc {
status = "okay";
};
&cpu2_saw {
status = "okay";
};
&cpu3_acc {
status = "okay";
};
&cpu3_saw {
status = "okay";
};

10
arch/arm/mach-qcom/Kconfig
View File

@ -21,6 +21,16 @@ config ARCH_MSM8X60
bool "Enable support for MSM8X60"
select CLKSRC_QCOM
config ARCH_MSM8916
bool "Enable support for MSM8916"
select HAVE_ARM_ARCH_TIMER
help
Enable support for the Qualcomm Snapdragon 410 (MSM8916/APQ8016).
Note that ARM64 is the main supported architecture for MSM8916.
The ARM32 option is intended for a few devices with signed firmware
that does not allow booting ARM64 kernels.
config ARCH_MSM8960
bool "Enable support for MSM8960"
select CLKSRC_QCOM

3
arch/arm64/boot/dts/qcom/Makefile
View File

@ -15,6 +15,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8916-longcheer-l8910.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-a3u-eur.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-a5u-eur.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-samsung-serranove.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8916-wingtech-wt88047.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8992-bullhead-rev-101.dtb
dtb-$(CONFIG_ARCH_QCOM) += msm8992-msft-lumia-octagon-talkman.dtb
@ -74,6 +75,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r3-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-idp2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-ganges-kirin.dtb
@ -93,6 +95,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-xiaomi-beryllium.dtb
dtb-$(CONFIG_ARCH_QCOM) += sdm850-lenovo-yoga-c630.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6125-sony-xperia-seine-pdx201.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm6350-sony-xperia-lena-pdx213.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm7225-fairphone-fp4.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8150-hdk.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8150-microsoft-surface-duo.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8150-mtp.dtb

832
arch/arm64/boot/dts/qcom/apq8016-sbc.dts
View File

@ -5,9 +5,839 @@
/dts-v1/;
#include "apq8016-sbc.dtsi"
#include "msm8916-pm8916.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
#include <dt-bindings/sound/apq8016-lpass.h>
/ {
model = "Qualcomm Technologies, Inc. APQ 8016 SBC";
compatible = "qcom,apq8016-sbc", "qcom,apq8016";
aliases {
serial0 = &blsp1_uart2;
serial1 = &blsp1_uart1;
usid0 = &pm8916_0;
i2c0 = &blsp_i2c2;
i2c1 = &blsp_i2c6;
i2c3 = &blsp_i2c4;
spi0 = &blsp_spi5;
spi1 = &blsp_spi3;
};
chosen {
stdout-path = "serial0";
};
camera_vdddo_1v8: camera-vdddo-1v8 {
compatible = "regulator-fixed";
regulator-name = "camera_vdddo";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
camera_vdda_2v8: camera-vdda-2v8 {
compatible = "regulator-fixed";
regulator-name = "camera_vdda";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
camera_vddd_1v5: camera-vddd-1v5 {
compatible = "regulator-fixed";
regulator-name = "camera_vddd";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
};
reserved-memory {
ramoops@bff00000 {
compatible = "ramoops";
reg = <0x0 0xbff00000 0x0 0x100000>;
record-size = <0x20000>;
console-size = <0x20000>;
ftrace-size = <0x20000>;
};
};
usb2513 {
compatible = "smsc,usb3503";
reset-gpios = <&pm8916_gpios 3 GPIO_ACTIVE_LOW>;
initial-mode = <1>;
};
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_id_default>;
};
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con: endpoint {
remote-endpoint = <&adv7533_out>;
};
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&msm_key_volp_n_default>;
button@0 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
};
};
leds {
pinctrl-names = "default";
pinctrl-0 = <&msmgpio_leds>,
<&pm8916_gpios_leds>,
<&pm8916_mpps_leds>;
compatible = "gpio-leds";
led@1 {
label = "apq8016-sbc:green:user1";
gpios = <&msmgpio 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led@2 {
label = "apq8016-sbc:green:user2";
gpios = <&msmgpio 120 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
led@3 {
label = "apq8016-sbc:green:user3";
gpios = <&pm8916_gpios 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
default-state = "off";
};
led@4 {
label = "apq8016-sbc:green:user4";
gpios = <&pm8916_gpios 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "none";
panic-indicator;
default-state = "off";
};
led@5 {
label = "apq8016-sbc:yellow:wlan";
gpios = <&pm8916_mpps 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tx";
default-state = "off";
};
led@6 {
label = "apq8016-sbc:blue:bt";
gpios = <&pm8916_mpps 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "bluetooth-power";
default-state = "off";
};
};
};
&blsp_dma {
status = "okay";
};
&blsp_i2c2 {
/* On Low speed expansion */
status = "okay";
label = "LS-I2C0";
};
&blsp_i2c4 {
/* On High speed expansion */
status = "okay";
label = "HS-I2C2";
adv_bridge: bridge@39 {
status = "okay";
compatible = "adi,adv7533";
reg = <0x39>;
interrupt-parent = <&msmgpio>;
interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
adi,dsi-lanes = <4>;
clocks = <&rpmcc RPM_SMD_BB_CLK2>;
clock-names = "cec";
pd-gpios = <&msmgpio 32 GPIO_ACTIVE_HIGH>;
avdd-supply = <&pm8916_l6>;
v1p2-supply = <&pm8916_l6>;
v3p3-supply = <&pm8916_l17>;
pinctrl-names = "default","sleep";
pinctrl-0 = <&adv7533_int_active &adv7533_switch_active>;
pinctrl-1 = <&adv7533_int_suspend &adv7533_switch_suspend>;
#sound-dai-cells = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7533_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@1 {
reg = <1>;
adv7533_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
};
};
};
&blsp_i2c6 {
/* On Low speed expansion */
status = "okay";
label = "LS-I2C1";
};
&blsp_spi3 {
/* On High speed expansion */
status = "okay";
label = "HS-SPI1";
};
&blsp_spi5 {
/* On Low speed expansion */
status = "okay";
label = "LS-SPI0";
};
&blsp1_uart1 {
status = "okay";
label = "LS-UART0";
};
&blsp1_uart2 {
status = "okay";
label = "LS-UART1";
};
&camss {
status = "okay";
ports {
port@0 {
reg = <0>;
csiphy0_ep: endpoint {
clock-lanes = <1>;
data-lanes = <0 2>;
remote-endpoint = <&ov5640_ep>;
status = "okay";
};
};
};
};
&cci {
status = "okay";
};
&cci_i2c0 {
camera_rear@3b {
compatible = "ovti,ov5640";
reg = <0x3b>;
enable-gpios = <&msmgpio 34 GPIO_ACTIVE_HIGH>;
reset-gpios = <&msmgpio 35 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&camera_rear_default>;
clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
clock-names = "xclk";
clock-frequency = <23880000>;
vdddo-supply = <&camera_vdddo_1v8>;
vdda-supply = <&camera_vdda_2v8>;
vddd-supply = <&camera_vddd_1v5>;
/* No camera mezzanine by default */
status = "disabled";
port {
ov5640_ep: endpoint {
clock-lanes = <1>;
data-lanes = <0 2>;
remote-endpoint = <&csiphy0_ep>;
};
};
};
};
&dsi0_out {
data-lanes = <0 1 2 3>;
remote-endpoint = <&adv7533_in>;
};
&lpass {
status = "okay";
};
&mdss {
status = "okay";
};
&mpss {
status = "okay";
firmware-name = "qcom/apq8016/mba.mbn", "qcom/apq8016/modem.mbn";
};
&pm8916_resin {
status = "okay";
linux,code = <KEY_VOLUMEDOWN>;
};
&pronto {
status = "okay";
firmware-name = "qcom/apq8016/wcnss.mbn";
};
&sdhc_1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
};
&sdhc_2 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&msmgpio 38 GPIO_ACTIVE_LOW>;
};
&sound {
status = "okay";
pinctrl-0 = <&cdc_pdm_lines_act &ext_sec_tlmm_lines_act &ext_mclk_tlmm_lines_act>;
pinctrl-1 = <&cdc_pdm_lines_sus &ext_sec_tlmm_lines_sus &ext_mclk_tlmm_lines_sus>;
pinctrl-names = "default", "sleep";
qcom,model = "DB410c";
qcom,audio-routing =
"AMIC2", "MIC BIAS Internal2",
"AMIC3", "MIC BIAS External1";
external-dai-link@0 {
link-name = "ADV7533";
cpu {
sound-dai = <&lpass MI2S_QUATERNARY>;
};
codec {
sound-dai = <&adv_bridge 0>;
};
};
internal-codec-playback-dai-link@0 {
link-name = "WCD";
cpu {
sound-dai = <&lpass MI2S_PRIMARY>;
};
codec {
sound-dai = <&lpass_codec 0>, <&wcd_codec 0>;
};
};
internal-codec-capture-dai-link@0 {
link-name = "WCD-Capture";
cpu {
sound-dai = <&lpass MI2S_TERTIARY>;
};
codec {
sound-dai = <&lpass_codec 1>, <&wcd_codec 1>;
};
};
};
&usb {
status = "okay";
extcon = <&usb_id>, <&usb_id>;
pinctrl-names = "default", "device";
pinctrl-0 = <&usb_sw_sel_pm &usb_hub_reset_pm>;
pinctrl-1 = <&usb_sw_sel_pm_device &usb_hub_reset_pm_device>;
};
&usb_hs_phy {
extcon = <&usb_id>;
};
&wcd_codec {
clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
clock-names = "mclk";
qcom,mbhc-vthreshold-low = <75 150 237 450 500>;
qcom,mbhc-vthreshold-high = <75 150 237 450 500>;
};
&wcnss_ctrl {
firmware-name = "qcom/apq8016/WCNSS_qcom_wlan_nv_sbc.bin";
};
/* Enable CoreSight */
&cti0 { status = "okay"; };
&cti1 { status = "okay"; };
&cti12 { status = "okay"; };
&cti13 { status = "okay"; };
&cti14 { status = "okay"; };
&cti15 { status = "okay"; };
&debug0 { status = "okay"; };
&debug1 { status = "okay"; };
&debug2 { status = "okay"; };
&debug3 { status = "okay"; };
&etf { status = "okay"; };
&etm0 { status = "okay"; };
&etm1 { status = "okay"; };
&etm2 { status = "okay"; };
&etm3 { status = "okay"; };
&etr { status = "okay"; };
&funnel0 { status = "okay"; };
&funnel1 { status = "okay"; };
&replicator { status = "okay"; };
&stm { status = "okay"; };
&tpiu { status = "okay"; };
&smd_rpm_regulators {
vdd_l1_l2_l3-supply = <&pm8916_s3>;
vdd_l4_l5_l6-supply = <&pm8916_s4>;
vdd_l7-supply = <&pm8916_s4>;
s3 {
regulator-min-microvolt = <375000>;
regulator-max-microvolt = <1562000>;
};
s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
l1 {
regulator-min-microvolt = <375000>;
regulator-max-microvolt = <1525000>;
};
l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
l4 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l5 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l7 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l8 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l9 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l10 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l11 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
regulator-allow-set-load;
regulator-system-load = <200000>;
};
l12 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l13 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l14 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
/**
* 1.8v required on LS expansion
* for mezzanine boards
*/
l15 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
regulator-always-on;
};
l16 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l17 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
l18 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
};
/*
* 2mA drive strength is not enough when connecting multiple
* I2C devices with different pull up resistors.
*/
&i2c2_default {
drive-strength = <16>;
};
&i2c4_default {
drive-strength = <16>;
};
&i2c6_default {
drive-strength = <16>;
};
/*
* GPIO name legend: proper name = the GPIO line is used as GPIO
* NC = not connected (pin out but not routed from the chip to
* anything the board)
* "[PER]" = pin is muxed for [peripheral] (not GPIO)
* LSEC = Low Speed External Connector
* HSEC = High Speed External Connector
*
* Line names are taken from the schematic "DragonBoard410c"
* dated monday, august 31, 2015. Page 5 in particular.
*
* For the lines routed to the external connectors the
* lines are named after the 96Boards CE Specification 1.0,
* Appendix "Expansion Connector Signal Description".
*
* When the 96Board naming of a line and the schematic name of
* the same line are in conflict, the 96Board specification
* takes precedence, which means that the external UART on the
* LSEC is named UART0 while the schematic and SoC names this
* UART3. This is only for the informational lines i.e. "[FOO]",
* the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
* ones actually used for GPIO.
*/
&msmgpio {
gpio-line-names =
"[UART0_TX]", /* GPIO_0, LSEC pin 5 */
"[UART0_RX]", /* GPIO_1, LSEC pin 7 */
"[UART0_CTS_N]", /* GPIO_2, LSEC pin 3 */
"[UART0_RTS_N]", /* GPIO_3, LSEC pin 9 */
"[UART1_TX]", /* GPIO_4, LSEC pin 11 */
"[UART1_RX]", /* GPIO_5, LSEC pin 13 */
"[I2C0_SDA]", /* GPIO_8, LSEC pin 17 */
"[I2C0_SCL]", /* GPIO_7, LSEC pin 15 */
"[SPI1_DOUT]", /* SPI1_MOSI, HSEC pin 1 */
"[SPI1_DIN]", /* SPI1_MISO, HSEC pin 11 */
"[SPI1_CS]", /* SPI1_CS_N, HSEC pin 7 */
"[SPI1_SCLK]", /* SPI1_CLK, HSEC pin 9 */
"GPIO-B", /* LS_EXP_GPIO_B, LSEC pin 24 */
"GPIO-C", /* LS_EXP_GPIO_C, LSEC pin 25 */
"[I2C3_SDA]", /* HSEC pin 38 */
"[I2C3_SCL]", /* HSEC pin 36 */
"[SPI0_MOSI]", /* LSEC pin 14 */
"[SPI0_MISO]", /* LSEC pin 10 */
"[SPI0_CS_N]", /* LSEC pin 12 */
"[SPI0_CLK]", /* LSEC pin 8 */
"HDMI_HPD_N", /* GPIO 20 */
"USR_LED_1_CTRL",
"[I2C1_SDA]", /* GPIO_22, LSEC pin 21 */
"[I2C1_SCL]", /* GPIO_23, LSEC pin 19 */
"GPIO-G", /* LS_EXP_GPIO_G, LSEC pin 29 */
"GPIO-H", /* LS_EXP_GPIO_H, LSEC pin 30 */
"[CSI0_MCLK]", /* HSEC pin 15 */
"[CSI1_MCLK]", /* HSEC pin 17 */
"GPIO-K", /* LS_EXP_GPIO_K, LSEC pin 33 */
"[I2C2_SDA]", /* HSEC pin 34 */
"[I2C2_SCL]", /* HSEC pin 32 */
"DSI2HDMI_INT_N",
"DSI_SW_SEL_APQ",
"GPIO-L", /* LS_EXP_GPIO_L, LSEC pin 34 */
"GPIO-J", /* LS_EXP_GPIO_J, LSEC pin 32 */
"GPIO-I", /* LS_EXP_GPIO_I, LSEC pin 31 */
"GPIO-A", /* LS_EXP_GPIO_A, LSEC pin 23 */
"FORCED_USB_BOOT",
"SD_CARD_DET_N",
"[WCSS_BT_SSBI]",
"[WCSS_WLAN_DATA_2]", /* GPIO 40 */
"[WCSS_WLAN_DATA_1]",
"[WCSS_WLAN_DATA_0]",
"[WCSS_WLAN_SET]",
"[WCSS_WLAN_CLK]",
"[WCSS_FM_SSBI]",
"[WCSS_FM_SDI]",
"[WCSS_BT_DAT_CTL]",
"[WCSS_BT_DAT_STB]",
"NC",
"NC", /* GPIO 50 */
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC", /* GPIO 60 */
"NC",
"NC",
"[CDC_PDM0_CLK]",
"[CDC_PDM0_SYNC]",
"[CDC_PDM0_TX0]",
"[CDC_PDM0_RX0]",
"[CDC_PDM0_RX1]",
"[CDC_PDM0_RX2]",
"GPIO-D", /* LS_EXP_GPIO_D, LSEC pin 26 */
"NC", /* GPIO 70 */
"NC",
"NC",
"NC",
"NC", /* GPIO 74 */
"NC",
"NC",
"NC",
"NC",
"NC",
"BOOT_CONFIG_0", /* GPIO 80 */
"BOOT_CONFIG_1",
"BOOT_CONFIG_2",
"BOOT_CONFIG_3",
"NC",
"NC",
"BOOT_CONFIG_5",
"NC",
"NC",
"NC",
"NC", /* GPIO 90 */
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC", /* GPIO 100 */
"NC",
"NC",
"NC",
"SSBI_GPS",
"NC",
"NC",
"KEY_VOLP_N",
"NC",
"NC",
"[LS_EXP_MI2S_WS]", /* GPIO 110 */
"NC",
"NC",
"[LS_EXP_MI2S_SCK]",
"[LS_EXP_MI2S_DATA0]",
"GPIO-E", /* LS_EXP_GPIO_E, LSEC pin 27 */
"NC",
"[DSI2HDMI_MI2S_WS]",
"[DSI2HDMI_MI2S_SCK]",
"[DSI2HDMI_MI2S_DATA0]",
"USR_LED_2_CTRL", /* GPIO 120 */
"SB_HS_ID";
msmgpio_leds: msmgpio-leds {
pins = "gpio21", "gpio120";
function = "gpio";
output-low;
};
usb_id_default: usb-id-default {
pins = "gpio121";
function = "gpio";
drive-strength = <8>;
input-enable;
bias-pull-up;
};
adv7533_int_active: adv533-int-active {
pins = "gpio31";
function = "gpio";
drive-strength = <16>;
bias-disable;
};
adv7533_int_suspend: adv7533-int-suspend {
pins = "gpio31";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
adv7533_switch_active: adv7533-switch-active {
pins = "gpio32";
function = "gpio";
drive-strength = <16>;
bias-disable;
};
adv7533_switch_suspend: adv7533-switch-suspend {
pins = "gpio32";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
msm_key_volp_n_default: msm-key-volp-n-default {
pins = "gpio107";
function = "gpio";
drive-strength = <8>;
input-enable;
bias-pull-up;
};
};
&pm8916_gpios {
gpio-line-names =
"USR_LED_3_CTRL",
"USR_LED_4_CTRL",
"USB_HUB_RESET_N_PM",
"USB_SW_SEL_PM";
usb_hub_reset_pm: usb-hub-reset-pm {
pins = "gpio3";
function = PMIC_GPIO_FUNC_NORMAL;
input-disable;
output-high;
};
usb_hub_reset_pm_device: usb-hub-reset-pm-device {
pins = "gpio3";
function = PMIC_GPIO_FUNC_NORMAL;
output-low;
};
usb_sw_sel_pm: usb-sw-sel-pm {
pins = "gpio4";
function = PMIC_GPIO_FUNC_NORMAL;
power-source = <PM8916_GPIO_VPH>;
input-disable;
output-high;
};
usb_sw_sel_pm_device: usb-sw-sel-pm-device {
pins = "gpio4";
function = PMIC_GPIO_FUNC_NORMAL;
power-source = <PM8916_GPIO_VPH>;
input-disable;
output-low;
};
pm8916_gpios_leds: pm8916-gpios-leds {
pins = "gpio1", "gpio2";
function = PMIC_GPIO_FUNC_NORMAL;
output-low;
};
};
&pm8916_mpps {
gpio-line-names =
"VDD_PX_BIAS",
"WLAN_LED_CTRL",
"BT_LED_CTRL",
"GPIO-F"; /* LS_EXP_GPIO_F, LSEC pin 28 */
pinctrl-names = "default";
pinctrl-0 = <&ls_exp_gpio_f>;
ls_exp_gpio_f: pm8916-mpp4-state {
pins = "mpp4";
function = "digital";
output-low;
power-source = <PM8916_MPP_L5>; // 1.8V
};
pm8916_mpps_leds: pm8916-mpps-state {
pins = "mpp2", "mpp3";
function = "digital";
output-low;
};
};

838
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
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@ -1,838 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2015, The Linux Foundation. All rights reserved.
*/
#include "msm8916-pm8916.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
#include <dt-bindings/sound/apq8016-lpass.h>
/ {
aliases {
serial0 = &blsp1_uart2;
serial1 = &blsp1_uart1;
usid0 = &pm8916_0;
i2c0 = &blsp_i2c2;
i2c1 = &blsp_i2c6;
i2c3 = &blsp_i2c4;
spi0 = &blsp_spi5;
spi1 = &blsp_spi3;
};
chosen {
stdout-path = "serial0";
};
camera_vdddo_1v8: camera-vdddo-1v8 {
compatible = "regulator-fixed";
regulator-name = "camera_vdddo";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
camera_vdda_2v8: camera-vdda-2v8 {
compatible = "regulator-fixed";
regulator-name = "camera_vdda";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
camera_vddd_1v5: camera-vddd-1v5 {
compatible = "regulator-fixed";
regulator-name = "camera_vddd";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
};
reserved-memory {
ramoops@bff00000 {
compatible = "ramoops";
reg = <0x0 0xbff00000 0x0 0x100000>;
record-size = <0x20000>;
console-size = <0x20000>;
ftrace-size = <0x20000>;
};
};
usb2513 {
compatible = "smsc,usb3503";
reset-gpios = <&pm8916_gpios 3 GPIO_ACTIVE_LOW>;
initial-mode = <1>;
};
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&msmgpio 121 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_id_default>;
};
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con: endpoint {
remote-endpoint = <&adv7533_out>;
};
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&msm_key_volp_n_default>;
button@0 {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
};
};
leds {
pinctrl-names = "default";
pinctrl-0 = <&msmgpio_leds>,
<&pm8916_gpios_leds>,
<&pm8916_mpps_leds>;
compatible = "gpio-leds";
led@1 {
label = "apq8016-sbc:green:user1";
gpios = <&msmgpio 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led@2 {
label = "apq8016-sbc:green:user2";
gpios = <&msmgpio 120 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
led@3 {
label = "apq8016-sbc:green:user3";
gpios = <&pm8916_gpios 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
default-state = "off";
};
led@4 {
label = "apq8016-sbc:green:user4";
gpios = <&pm8916_gpios 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "none";
panic-indicator;
default-state = "off";
};
led@5 {
label = "apq8016-sbc:yellow:wlan";
gpios = <&pm8916_mpps 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tx";
default-state = "off";
};
led@6 {
label = "apq8016-sbc:blue:bt";
gpios = <&pm8916_mpps 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "bluetooth-power";
default-state = "off";
};
};
};
&blsp_dma {
status = "okay";
};
&blsp_i2c2 {
/* On Low speed expansion */
status = "okay";
label = "LS-I2C0";
};
&blsp_i2c4 {
/* On High speed expansion */
status = "okay";
label = "HS-I2C2";
adv_bridge: bridge@39 {
status = "okay";
compatible = "adi,adv7533";
reg = <0x39>;
interrupt-parent = <&msmgpio>;
interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
adi,dsi-lanes = <4>;
clocks = <&rpmcc RPM_SMD_BB_CLK2>;
clock-names = "cec";
pd-gpios = <&msmgpio 32 GPIO_ACTIVE_HIGH>;
avdd-supply = <&pm8916_l6>;
v1p2-supply = <&pm8916_l6>;
v3p3-supply = <&pm8916_l17>;
pinctrl-names = "default","sleep";
pinctrl-0 = <&adv7533_int_active &adv7533_switch_active>;
pinctrl-1 = <&adv7533_int_suspend &adv7533_switch_suspend>;
#sound-dai-cells = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7533_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@1 {
reg = <1>;
adv7533_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
};
};
};
&blsp_i2c6 {
/* On Low speed expansion */
status = "okay";
label = "LS-I2C1";
};
&blsp_spi3 {
/* On High speed expansion */
status = "okay";
label = "HS-SPI1";
};
&blsp_spi5 {
/* On Low speed expansion */
status = "okay";
label = "LS-SPI0";
};
&blsp1_uart1 {
status = "okay";
label = "LS-UART0";
};
&blsp1_uart2 {
status = "okay";
label = "LS-UART1";
};
&camss {
status = "okay";
ports {
port@0 {
reg = <0>;
csiphy0_ep: endpoint {
clock-lanes = <1>;
data-lanes = <0 2>;
remote-endpoint = <&ov5640_ep>;
status = "okay";
};
};
};
};
&cci {
status = "okay";
};
&cci_i2c0 {
camera_rear@3b {
compatible = "ovti,ov5640";
reg = <0x3b>;
enable-gpios = <&msmgpio 34 GPIO_ACTIVE_HIGH>;
reset-gpios = <&msmgpio 35 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&camera_rear_default>;
clocks = <&gcc GCC_CAMSS_MCLK0_CLK>;
clock-names = "xclk";
clock-frequency = <23880000>;
vdddo-supply = <&camera_vdddo_1v8>;
vdda-supply = <&camera_vdda_2v8>;
vddd-supply = <&camera_vddd_1v5>;
/* No camera mezzanine by default */
status = "disabled";
port {
ov5640_ep: endpoint {
clock-lanes = <1>;
data-lanes = <0 2>;
remote-endpoint = <&csiphy0_ep>;
};
};
};
};
&dsi0_out {
data-lanes = <0 1 2 3>;
remote-endpoint = <&adv7533_in>;
};
&lpass {
status = "okay";
};
&mdss {
status = "okay";
};
&mpss {
status = "okay";
firmware-name = "qcom/msm8916/mba.mbn", "qcom/msm8916/modem.mbn";
};
&pm8916_resin {
status = "okay";
linux,code = <KEY_VOLUMEDOWN>;
};
&pronto {
status = "okay";
firmware-name = "qcom/msm8916/wcnss.mbn";
};
&sdhc_1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
};
&sdhc_2 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&msmgpio 38 GPIO_ACTIVE_LOW>;
};
&sound {
status = "okay";
pinctrl-0 = <&cdc_pdm_lines_act &ext_sec_tlmm_lines_act &ext_mclk_tlmm_lines_act>;
pinctrl-1 = <&cdc_pdm_lines_sus &ext_sec_tlmm_lines_sus &ext_mclk_tlmm_lines_sus>;
pinctrl-names = "default", "sleep";
qcom,model = "DB410c";
qcom,audio-routing =
"AMIC2", "MIC BIAS Internal2",
"AMIC3", "MIC BIAS External1";
external-dai-link@0 {
link-name = "ADV7533";
cpu {
sound-dai = <&lpass MI2S_QUATERNARY>;
};
codec {
sound-dai = <&adv_bridge 0>;
};
};
internal-codec-playback-dai-link@0 {
link-name = "WCD";
cpu {
sound-dai = <&lpass MI2S_PRIMARY>;
};
codec {
sound-dai = <&lpass_codec 0>, <&wcd_codec 0>;
};
};
internal-codec-capture-dai-link@0 {
link-name = "WCD-Capture";
cpu {
sound-dai = <&lpass MI2S_TERTIARY>;
};
codec {
sound-dai = <&lpass_codec 1>, <&wcd_codec 1>;
};
};
};
&usb {
status = "okay";
extcon = <&usb_id>, <&usb_id>;
pinctrl-names = "default", "device";
pinctrl-0 = <&usb_sw_sel_pm &usb_hub_reset_pm>;
pinctrl-1 = <&usb_sw_sel_pm_device &usb_hub_reset_pm_device>;
};
&usb_hs_phy {
extcon = <&usb_id>;
};
&wcd_codec {
clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
clock-names = "mclk";
qcom,mbhc-vthreshold-low = <75 150 237 450 500>;
qcom,mbhc-vthreshold-high = <75 150 237 450 500>;
};
&wcnss_ctrl {
firmware-name = "qcom/msm8916/WCNSS_qcom_wlan_nv.bin";
};
/* Enable CoreSight */
&cti0 { status = "okay"; };
&cti1 { status = "okay"; };
&cti12 { status = "okay"; };
&cti13 { status = "okay"; };
&cti14 { status = "okay"; };
&cti15 { status = "okay"; };
&debug0 { status = "okay"; };
&debug1 { status = "okay"; };
&debug2 { status = "okay"; };
&debug3 { status = "okay"; };
&etf { status = "okay"; };
&etm0 { status = "okay"; };
&etm1 { status = "okay"; };
&etm2 { status = "okay"; };
&etm3 { status = "okay"; };
&etr { status = "okay"; };
&funnel0 { status = "okay"; };
&funnel1 { status = "okay"; };
&replicator { status = "okay"; };
&stm { status = "okay"; };
&tpiu { status = "okay"; };
&smd_rpm_regulators {
vdd_l1_l2_l3-supply = <&pm8916_s3>;
vdd_l4_l5_l6-supply = <&pm8916_s4>;
vdd_l7-supply = <&pm8916_s4>;
s3 {
regulator-min-microvolt = <375000>;
regulator-max-microvolt = <1562000>;
};
s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
l1 {
regulator-min-microvolt = <375000>;
regulator-max-microvolt = <1525000>;
};
l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
l4 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l5 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l7 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l8 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l9 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l10 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l11 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
regulator-allow-set-load;
regulator-system-load = <200000>;
};
l12 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l13 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l14 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
/**
* 1.8v required on LS expansion
* for mezzanine boards
*/
l15 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
regulator-always-on;
};
l16 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
l17 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
l18 {
regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <3337000>;
};
};
/*
* 2mA drive strength is not enough when connecting multiple
* I2C devices with different pull up resistors.
*/
&i2c2_default {
drive-strength = <16>;
};
&i2c4_default {
drive-strength = <16>;
};
&i2c6_default {
drive-strength = <16>;
};
/*
* GPIO name legend: proper name = the GPIO line is used as GPIO
* NC = not connected (pin out but not routed from the chip to
* anything the board)
* "[PER]" = pin is muxed for [peripheral] (not GPIO)
* LSEC = Low Speed External Connector
* HSEC = High Speed External Connector
*
* Line names are taken from the schematic "DragonBoard410c"
* dated monday, august 31, 2015. Page 5 in particular.
*
* For the lines routed to the external connectors the
* lines are named after the 96Boards CE Specification 1.0,
* Appendix "Expansion Connector Signal Description".
*
* When the 96Board naming of a line and the schematic name of
* the same line are in conflict, the 96Board specification
* takes precedence, which means that the external UART on the
* LSEC is named UART0 while the schematic and SoC names this
* UART3. This is only for the informational lines i.e. "[FOO]",
* the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
* ones actually used for GPIO.
*/
&msmgpio {
gpio-line-names =
"[UART0_TX]", /* GPIO_0, LSEC pin 5 */
"[UART0_RX]", /* GPIO_1, LSEC pin 7 */
"[UART0_CTS_N]", /* GPIO_2, LSEC pin 3 */
"[UART0_RTS_N]", /* GPIO_3, LSEC pin 9 */
"[UART1_TX]", /* GPIO_4, LSEC pin 11 */
"[UART1_RX]", /* GPIO_5, LSEC pin 13 */
"[I2C0_SDA]", /* GPIO_8, LSEC pin 17 */
"[I2C0_SCL]", /* GPIO_7, LSEC pin 15 */
"[SPI1_DOUT]", /* SPI1_MOSI, HSEC pin 1 */
"[SPI1_DIN]", /* SPI1_MISO, HSEC pin 11 */
"[SPI1_CS]", /* SPI1_CS_N, HSEC pin 7 */
"[SPI1_SCLK]", /* SPI1_CLK, HSEC pin 9 */
"GPIO-B", /* LS_EXP_GPIO_B, LSEC pin 24 */
"GPIO-C", /* LS_EXP_GPIO_C, LSEC pin 25 */
"[I2C3_SDA]", /* HSEC pin 38 */
"[I2C3_SCL]", /* HSEC pin 36 */
"[SPI0_MOSI]", /* LSEC pin 14 */
"[SPI0_MISO]", /* LSEC pin 10 */
"[SPI0_CS_N]", /* LSEC pin 12 */
"[SPI0_CLK]", /* LSEC pin 8 */
"HDMI_HPD_N", /* GPIO 20 */
"USR_LED_1_CTRL",
"[I2C1_SDA]", /* GPIO_22, LSEC pin 21 */
"[I2C1_SCL]", /* GPIO_23, LSEC pin 19 */
"GPIO-G", /* LS_EXP_GPIO_G, LSEC pin 29 */
"GPIO-H", /* LS_EXP_GPIO_H, LSEC pin 30 */
"[CSI0_MCLK]", /* HSEC pin 15 */
"[CSI1_MCLK]", /* HSEC pin 17 */
"GPIO-K", /* LS_EXP_GPIO_K, LSEC pin 33 */
"[I2C2_SDA]", /* HSEC pin 34 */
"[I2C2_SCL]", /* HSEC pin 32 */
"DSI2HDMI_INT_N",
"DSI_SW_SEL_APQ",
"GPIO-L", /* LS_EXP_GPIO_L, LSEC pin 34 */
"GPIO-J", /* LS_EXP_GPIO_J, LSEC pin 32 */
"GPIO-I", /* LS_EXP_GPIO_I, LSEC pin 31 */
"GPIO-A", /* LS_EXP_GPIO_A, LSEC pin 23 */
"FORCED_USB_BOOT",
"SD_CARD_DET_N",
"[WCSS_BT_SSBI]",
"[WCSS_WLAN_DATA_2]", /* GPIO 40 */
"[WCSS_WLAN_DATA_1]",
"[WCSS_WLAN_DATA_0]",
"[WCSS_WLAN_SET]",
"[WCSS_WLAN_CLK]",
"[WCSS_FM_SSBI]",
"[WCSS_FM_SDI]",
"[WCSS_BT_DAT_CTL]",
"[WCSS_BT_DAT_STB]",
"NC",
"NC", /* GPIO 50 */
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC", /* GPIO 60 */
"NC",
"NC",
"[CDC_PDM0_CLK]",
"[CDC_PDM0_SYNC]",
"[CDC_PDM0_TX0]",
"[CDC_PDM0_RX0]",
"[CDC_PDM0_RX1]",
"[CDC_PDM0_RX2]",
"GPIO-D", /* LS_EXP_GPIO_D, LSEC pin 26 */
"NC", /* GPIO 70 */
"NC",
"NC",
"NC",
"NC", /* GPIO 74 */
"NC",
"NC",
"NC",
"NC",
"NC",
"BOOT_CONFIG_0", /* GPIO 80 */
"BOOT_CONFIG_1",
"BOOT_CONFIG_2",
"BOOT_CONFIG_3",
"NC",
"NC",
"BOOT_CONFIG_5",
"NC",
"NC",
"NC",
"NC", /* GPIO 90 */
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC",
"NC", /* GPIO 100 */
"NC",
"NC",
"NC",
"SSBI_GPS",
"NC",
"NC",
"KEY_VOLP_N",
"NC",
"NC",
"[LS_EXP_MI2S_WS]", /* GPIO 110 */
"NC",
"NC",
"[LS_EXP_MI2S_SCK]",
"[LS_EXP_MI2S_DATA0]",
"GPIO-E", /* LS_EXP_GPIO_E, LSEC pin 27 */
"NC",
"[DSI2HDMI_MI2S_WS]",
"[DSI2HDMI_MI2S_SCK]",
"[DSI2HDMI_MI2S_DATA0]",
"USR_LED_2_CTRL", /* GPIO 120 */
"SB_HS_ID";
msmgpio_leds: msmgpio-leds {
pins = "gpio21", "gpio120";
function = "gpio";
output-low;
};
usb_id_default: usb-id-default {
pins = "gpio121";
function = "gpio";
drive-strength = <8>;
input-enable;
bias-pull-up;
};
adv7533_int_active: adv533-int-active {
pins = "gpio31";
function = "gpio";
drive-strength = <16>;
bias-disable;
};
adv7533_int_suspend: adv7533-int-suspend {
pins = "gpio31";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
adv7533_switch_active: adv7533-switch-active {
pins = "gpio32";
function = "gpio";
drive-strength = <16>;
bias-disable;
};
adv7533_switch_suspend: adv7533-switch-suspend {
pins = "gpio32";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
msm_key_volp_n_default: msm-key-volp-n-default {
pins = "gpio107";
function = "gpio";
drive-strength = <8>;
input-enable;
bias-pull-up;
};
};
&pm8916_gpios {
gpio-line-names =
"USR_LED_3_CTRL",
"USR_LED_4_CTRL",
"USB_HUB_RESET_N_PM",
"USB_SW_SEL_PM";
usb_hub_reset_pm: usb-hub-reset-pm {
pins = "gpio3";
function = PMIC_GPIO_FUNC_NORMAL;
input-disable;
output-high;
};
usb_hub_reset_pm_device: usb-hub-reset-pm-device {
pins = "gpio3";
function = PMIC_GPIO_FUNC_NORMAL;
output-low;
};
usb_sw_sel_pm: usb-sw-sel-pm {
pins = "gpio4";
function = PMIC_GPIO_FUNC_NORMAL;
power-source = <PM8916_GPIO_VPH>;
input-disable;
output-high;
};
usb_sw_sel_pm_device: usb-sw-sel-pm-device {
pins = "gpio4";
function = PMIC_GPIO_FUNC_NORMAL;
power-source = <PM8916_GPIO_VPH>;
input-disable;
output-low;
};
pm8916_gpios_leds: pm8916-gpios-leds {
pins = "gpio1", "gpio2";
function = PMIC_GPIO_FUNC_NORMAL;
output-low;
};
};
&pm8916_mpps {
gpio-line-names =
"VDD_PX_BIAS",
"WLAN_LED_CTRL",
"BT_LED_CTRL",
"GPIO-F"; /* LS_EXP_GPIO_F, LSEC pin 28 */
pinctrl-names = "default";
pinctrl-0 = <&ls_exp_gpio_f>;
ls_exp_gpio_f: pm8916-mpp4 {
pins = "mpp4";
function = "digital";
output-low;
power-source = <PM8916_MPP_L5>; // 1.8V
};
pm8916_mpps_leds: pm8916-mpps-leds {
pins = "mpp2", "mpp3";
function = "digital";
output-low;
};
};

1
arch/arm64/boot/dts/qcom/apq8094-sony-xperia-kitakami-karin_windy.dts
View File

@ -11,6 +11,7 @@
/ {
model = "Sony Xperia Z4 Tablet (Wi-Fi)";
compatible = "sony,karin_windy", "qcom,apq8094";
chassis-type = "tablet";
/*
* This model uses the APQ variant of MSM8994 (APQ8094).

1070
arch/arm64/boot/dts/qcom/apq8096-db820c.dts
View File

File diff suppressed because it is too large Load Diff

1076
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi
View File

File diff suppressed because it is too large Load Diff

3
arch/arm64/boot/dts/qcom/apq8096-ifc6640.dts
View File

@ -395,9 +395,6 @@
vdda-phy-supply = <&vreg_l28a_0p925>;
vdda-pll-supply = <&vreg_l12a_1p8>;
vdda-phy-max-microamp = <18380>;
vdda-pll-max-microamp = <9440>;
};
&venus {

8
arch/arm64/boot/dts/qcom/ipq6018.dtsi
View File

@ -201,7 +201,6 @@
#dma-cells = <1>;
qcom,ee = <1>;
qcom,controlled-remotely;
qcom,config-pipe-trust-reg = <0>;
};
crypto: crypto@73a000 {
@ -347,9 +346,8 @@
compatible = "qcom,bam-v1.7.0";
reg = <0x0 0x07984000 0x0 0x1a000>;
interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_QPIC_CLK>,
<&gcc GCC_QPIC_AHB_CLK>;
clock-names = "iface_clk", "bam_clk";
clocks = <&gcc GCC_QPIC_AHB_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = <0>;
status = "disabled";
@ -401,7 +399,7 @@
reset-names = "phy",
"common";
pcie_phy0: lane@84200 {
pcie_phy0: phy@84200 {
reg = <0x0 0x84200 0x0 0x16c>, /* Serdes Tx */
<0x0 0x84400 0x0 0x200>, /* Serdes Rx */
<0x0 0x84800 0x0 0x4f4>; /* PCS: Lane0, COM, PCIE */

6
arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
View File

@ -24,6 +24,8 @@
device_type = "memory";
reg = <0x0 0x40000000 0x0 0x20000000>;
};
vreg_dummy: regulator-dummy { };
};
&blsp1_i2c2 {
@ -97,10 +99,14 @@
&ssphy_0 {
status = "okay";
vdda-phy-supply = <&vreg_dummy>;
vdda-pll-supply = <&vreg_dummy>;
};
&ssphy_1 {
status = "okay";
vdda-phy-supply = <&vreg_dummy>;
vdda-pll-supply = <&vreg_dummy>;
};
&usb_0 {

69
arch/arm64/boot/dts/qcom/ipq8074.dtsi
View File

@ -91,7 +91,6 @@
ssphy_1: phy@58000 {
compatible = "qcom,ipq8074-qmp-usb3-phy";
reg = <0x00058000 0x1c4>;
#clock-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@ -106,12 +105,13 @@
reset-names = "phy","common";
status = "disabled";
usb1_ssphy: lane@58200 {
usb1_ssphy: phy@58200 {
reg = <0x00058200 0x130>, /* Tx */
<0x00058400 0x200>, /* Rx */
<0x00058800 0x1f8>, /* PCS */
<0x00058600 0x044>; /* PCS misc*/
#phy-cells = <0>;
#clock-cells = <1>;
clocks = <&gcc GCC_USB1_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_usb1_pipe_clk_src";
@ -134,7 +134,6 @@
ssphy_0: phy@78000 {
compatible = "qcom,ipq8074-qmp-usb3-phy";
reg = <0x00078000 0x1c4>;
#clock-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@ -149,12 +148,13 @@
reset-names = "phy","common";
status = "disabled";
usb0_ssphy: lane@78200 {
usb0_ssphy: phy@78200 {
reg = <0x00078200 0x130>, /* Tx */
<0x00078400 0x200>, /* Rx */
<0x00078800 0x1f8>, /* PCS */
<0x00078600 0x044>; /* PCS misc*/
#phy-cells = <0>;
#clock-cells = <1>;
clocks = <&gcc GCC_USB0_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "gcc_usb0_pipe_clk_src";
@ -174,34 +174,60 @@
status = "disabled";
};
pcie_phy0: phy@86000 {
pcie_qmp0: phy@86000 {
compatible = "qcom,ipq8074-qmp-pcie-phy";
reg = <0x00086000 0x1000>;
#phy-cells = <0>;
clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
clock-names = "pipe_clk";
clock-output-names = "pcie20_phy0_pipe_clk";
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&gcc GCC_PCIE0_AUX_CLK>,
<&gcc GCC_PCIE0_AHB_CLK>;
clock-names = "aux", "cfg_ahb";
resets = <&gcc GCC_PCIE0_PHY_BCR>,
<&gcc GCC_PCIE0PHY_PHY_BCR>;
reset-names = "phy",
"common";
status = "disabled";
pcie_phy0: phy@86200 {
reg = <0x86200 0x16c>,
<0x86400 0x200>,
<0x86800 0x4f4>;
#phy-cells = <0>;
#clock-cells = <0>;
clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "pcie_0_pipe_clk";
};
};
pcie_phy1: phy@8e000 {
pcie_qmp1: phy@8e000 {
compatible = "qcom,ipq8074-qmp-pcie-phy";
reg = <0x0008e000 0x1000>;
#phy-cells = <0>;
clocks = <&gcc GCC_PCIE1_PIPE_CLK>;
clock-names = "pipe_clk";
clock-output-names = "pcie20_phy1_pipe_clk";
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&gcc GCC_PCIE1_AUX_CLK>,
<&gcc GCC_PCIE1_AHB_CLK>;
clock-names = "aux", "cfg_ahb";
resets = <&gcc GCC_PCIE1_PHY_BCR>,
<&gcc GCC_PCIE1PHY_PHY_BCR>;
reset-names = "phy",
"common";
status = "disabled";
pcie_phy1: phy@8e200 {
reg = <0x8e200 0x16c>,
<0x8e400 0x200>,
<0x8e800 0x4f4>;
#phy-cells = <0>;
#clock-cells = <0>;
clocks = <&gcc GCC_PCIE1_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "pcie_1_pipe_clk";
};
};
prng: rng@e3000 {
@ -430,6 +456,21 @@
status = "disabled";
};
blsp1_i2c5: i2c@78b9000 {
compatible = "qcom,i2c-qup-v2.2.1";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x78b9000 0x600>;
interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>;
clock-names = "iface", "core";
clock-frequency = <400000>;
dmas = <&blsp_dma 21>, <&blsp_dma 20>;
dma-names = "rx", "tx";
status = "disabled";
};
blsp1_i2c6: i2c@78ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
#address-cells = <1>;

1
arch/arm64/boot/dts/qcom/msm8916-alcatel-idol347.dts
View File

@ -9,6 +9,7 @@
/ {
model = "Alcatel OneTouch Idol 3 (4.7)";
compatible = "alcatel,idol347", "qcom,msm8916";
chassis-type = "handset";
aliases {
serial0 = &blsp1_uart2;

126
arch/arm64/boot/dts/qcom/msm8916-asus-z00l.dts
View File

@ -4,10 +4,13 @@
#include "msm8916-pm8916.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Asus Zenfone 2 Laser";
compatible = "asus,z00l", "qcom,msm8916";
chassis-type = "handset";
aliases {
serial0 = &blsp1_uart2;
@ -40,6 +43,21 @@
};
};
reg_sd_vmmc: regulator-sdcard-vmmc {
compatible = "regulator-fixed";
regulator-name = "sdcard-vmmc";
regulator-min-microvolt = <2950000>;
regulator-max-microvolt = <2950000>;
gpio = <&msmgpio 87 GPIO_ACTIVE_HIGH>;
enable-active-high;
startup-delay-us = <200>;
pinctrl-names = "default";
pinctrl-0 = <&sd_vmmc_en_default>;
};
usb_id: usb-id {
compatible = "linux,extcon-usb-gpio";
id-gpios = <&msmgpio 110 GPIO_ACTIVE_HIGH>;
@ -48,6 +66,64 @@
};
};
&blsp_i2c2 {
status = "okay";
magnetometer@c {
compatible = "asahi-kasei,ak09911";
reg = <0x0c>;
vdd-supply = <&pm8916_l8>;
vid-supply = <&pm8916_l6>;
reset-gpios = <&msmgpio 112 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&mag_reset_default>;
};
imu@68 {
compatible = "invensense,mpu6515";
reg = <0x68>;
interrupt-parent = <&msmgpio>;
interrupts = <36 IRQ_TYPE_EDGE_RISING>;
vdd-supply = <&pm8916_l17>;
vddio-supply = <&pm8916_l6>;
pinctrl-names = "default";
pinctrl-0 = <&imu_default>;
mount-matrix = "1", "0", "0",
"0", "-1", "0",
"0", "0", "1";
};
};
&blsp_i2c5 {
status = "okay";
touchscreen@38 {
compatible = "edt,edt-ft5306";
reg = <0x38>;
interrupt-parent = <&msmgpio>;
interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&msmgpio 12 GPIO_ACTIVE_LOW>;
vcc-supply = <&pm8916_l11>;
iovcc-supply = <&pm8916_l6>;
touchscreen-size-x = <720>;
touchscreen-size-y = <1280>;
pinctrl-names = "default";
pinctrl-0 = <&touchscreen_default>;
};
};
&blsp1_uart2 {
status = "okay";
};
@ -64,6 +140,16 @@
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
};
&sdhc_2 {
status = "okay";
vmmc-supply = <&reg_sd_vmmc>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
cd-gpios = <&msmgpio 38 GPIO_ACTIVE_LOW>;
};
&usb {
status = "okay";
extcon = <&usb_id>, <&usb_id>;
@ -185,6 +271,46 @@
bias-pull-up;
};
imu_default: imu-default {
pins = "gpio36";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
mag_reset_default: mag-reset-default {
pins = "gpio112";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
sd_vmmc_en_default: sd-vmmc-en-default {
pins = "gpio87";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
touchscreen_default: touchscreen-default {
pins = "gpio13";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
reset {
pins = "gpio12";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};
usb_id_default: usb-id-default {
pins = "gpio110";
function = "gpio";

1
arch/arm64/boot/dts/qcom/msm8916-huawei-g7.dts
View File

@ -25,6 +25,7 @@
/ {
model = "Huawei Ascend G7";
compatible = "huawei,g7", "qcom,msm8916";
chassis-type = "handset";
aliases {
serial0 = &blsp1_uart2;

1
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8150.dts
View File

@ -11,6 +11,7 @@
/ {
model = "Longcheer L8150";
compatible = "longcheer,l8150", "qcom,msm8916-v1-qrd/9-v1", "qcom,msm8916";
chassis-type = "handset";
aliases {
serial0 = &blsp1_uart2;

1
arch/arm64/boot/dts/qcom/msm8916-longcheer-l8910.dts
View File

@ -10,6 +10,7 @@
/ {
model = "BQ Aquaris X5 (Longcheer L8910)";
compatible = "longcheer,l8910", "qcom,msm8916";
chassis-type = "handset";
aliases {
serial0 = &blsp1_uart2;

15
arch/arm64/boot/dts/qcom/msm8916-mtp.dts
View File

@ -5,9 +5,22 @@
/dts-v1/;
#include "msm8916-mtp.dtsi"
#include "msm8916-pm8916.dtsi"
/ {
model = "Qualcomm Technologies, Inc. MSM 8916 MTP";
compatible = "qcom,msm8916-mtp", "qcom,msm8916-mtp/1", "qcom,msm8916";
aliases {
serial0 = &blsp1_uart2;
usid0 = &pm8916_0;
};
chosen {
stdout-path = "serial0";
};
};
&blsp1_uart2 {
status = "okay";
};

21
arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
View File

@ -1,21 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
*/
#include "msm8916-pm8916.dtsi"
/ {
aliases {
serial0 = &blsp1_uart2;
usid0 = &pm8916_0;
};
chosen {
stdout-path = "serial0";
};
};
&blsp1_uart2 {
status = "okay";
};

1
arch/arm64/boot/dts/qcom/msm8916-samsung-a3u-eur.dts
View File

@ -7,6 +7,7 @@
/ {
model = "Samsung Galaxy A3U (EUR)";
compatible = "samsung,a3u-eur", "qcom,msm8916";
chassis-type = "handset";
reg_panel_vdd3: regulator-panel-vdd3 {
compatible = "regulator-fixed";

1
arch/arm64/boot/dts/qcom/msm8916-samsung-a5u-eur.dts
View File

@ -7,6 +7,7 @@
/ {
model = "Samsung Galaxy A5U (EUR)";
compatible = "samsung,a5u-eur", "qcom,msm8916";
chassis-type = "handset";
reg_touch_key: regulator-touch-key {
compatible = "regulator-fixed";

534
arch/arm64/boot/dts/qcom/msm8916-samsung-serranove.dts Normal file
View File

@ -0,0 +1,534 @@
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (C) 2019 Stephan Gerhold
/dts-v1/;
#include "msm8916-pm8916.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/*
* NOTE: The original firmware from Samsung can only boot ARM32 kernels.
* Unfortunately, the firmware is signed and cannot be replaced easily.
* There seems to be no way to boot ARM64 kernels on this device at the moment,
* even though the hardware would support it.
*
* However, it is possible to use this device tree by compiling an ARM32 kernel
* instead. For clarity and build testing this device tree is maintained next
* to the other MSM8916 device trees. However, it is actually used through
* arch/arm/boot/dts/qcom-msm8916-samsung-serranove.dts
*/
/ {
model = "Samsung Galaxy S4 Mini Value Edition";
compatible = "samsung,serranove", "qcom,msm8916";
aliases {
serial0 = &blsp1_uart2;
};
chosen {
stdout-path = "serial0";
};
reserved-memory {
/* Additional memory used by Samsung firmware modifications */
tz-apps@85500000 {
reg = <0x0 0x85500000 0x0 0xb00000>;
no-map;
};
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_keys_default>;
label = "GPIO Buttons";
volume-up {
label = "Volume Up";
gpios = <&msmgpio 107 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
home {
label = "Home";
gpios = <&msmgpio 109 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOMEPAGE>;
};
};
gpio-hall-sensor {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_hall_sensor_default>;
label = "GPIO Hall Effect Sensor";
hall-sensor {
label = "Hall Effect Sensor";
gpios = <&msmgpio 52 GPIO_ACTIVE_LOW>;
linux,input-type = <EV_SW>;
linux,code = <SW_LID>;
linux,can-disable;
};
};
reg_vdd_tsp: regulator-vdd-tsp {
compatible = "regulator-fixed";
regulator-name = "vdd_tsp";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&msmgpio 73 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&tsp_en_default>;
};
reg_touch_key: regulator-touch-key {
compatible = "regulator-fixed";
regulator-name = "touch_key";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&msmgpio 86 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&tkey_en_default>;
};
reg_key_led: regulator-key-led {
compatible = "regulator-fixed";
regulator-name = "key_led";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&msmgpio 60 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&tkey_led_en_default>;
};
i2c-muic {
compatible = "i2c-gpio";
sda-gpios = <&msmgpio 105 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
scl-gpios = <&msmgpio 106 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
pinctrl-names = "default";
pinctrl-0 = <&muic_i2c_default>;
#address-cells = <1>;
#size-cells = <0>;
muic: extcon@14 {
compatible = "siliconmitus,sm5504-muic";
reg = <0x14>;
interrupt-parent = <&msmgpio>;
interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&muic_irq_default>;
};
};
i2c-tkey {
compatible = "i2c-gpio";
sda-gpios = <&msmgpio 16 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
scl-gpios = <&msmgpio 17 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
pinctrl-names = "default";
pinctrl-0 = <&tkey_i2c_default>;
#address-cells = <1>;
#size-cells = <0>;
touchkey@20 {
compatible = "coreriver,tc360-touchkey";
reg = <0x20>;
interrupt-parent = <&msmgpio>;
interrupts = <98 IRQ_TYPE_EDGE_FALLING>;
vcc-supply = <&reg_touch_key>;
vdd-supply = <&reg_key_led>;
vddio-supply = <&pm8916_l6>;
linux,keycodes = <KEY_APPSELECT KEY_BACK>;
pinctrl-names = "default";
pinctrl-0 = <&tkey_default>;
};
};
i2c-nfc {
compatible = "i2c-gpio";
sda-gpios = <&msmgpio 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
scl-gpios = <&msmgpio 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
pinctrl-names = "default";
pinctrl-0 = <&nfc_i2c_default>;
#address-cells = <1>;
#size-cells = <0>;
nfc@2b {
compatible = "nxp,pn547", "nxp,nxp-nci-i2c";
reg = <0x2b>;
interrupt-parent = <&msmgpio>;
interrupts = <21 IRQ_TYPE_EDGE_RISING>;
enable-gpios = <&msmgpio 20 GPIO_ACTIVE_HIGH>;
firmware-gpios = <&msmgpio 49 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&nfc_default>;
};
};
};
&blsp_i2c2 {
status = "okay";
imu@6b {
compatible = "st,lsm6ds3";
reg = <0x6b>;
interrupt-parent = <&msmgpio>;
interrupts = <115 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default";
pinctrl-0 = <&imu_irq_default>;
};
};
&blsp_i2c4 {
status = "okay";
battery@35 {
compatible = "richtek,rt5033-battery";
reg = <0x35>;
interrupt-parent = <&msmgpio>;
interrupts = <121 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&fg_alert_default>;
};
};
&blsp_i2c5 {
status = "okay";
touchscreen@20 {
compatible = "zinitix,bt541";
reg = <0x20>;
interrupt-parent = <&msmgpio>;
interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
touchscreen-size-x = <540>;
touchscreen-size-y = <960>;
vdd-supply = <&reg_vdd_tsp>;
vddo-supply = <&pm8916_l6>;
pinctrl-names = "default";
pinctrl-0 = <&tsp_irq_default>;
};
};
&blsp1_uart2 {
status = "okay";
};
&pm8916_resin {
status = "okay";
linux,code = <KEY_VOLUMEDOWN>;
};
&pm8916_vib {
status = "okay";
};
&pronto {
status = "okay";
iris {
compatible = "qcom,wcn3660b";
};
};
&sdhc_1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
};
&sdhc_2 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on>;
pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;
non-removable;
/*
* FIXME: Disable UHS-I modes since tuning fails with:
*
* sdhci_msm 7864900.sdhci: mmc1: No tuning point found
* mmc1: tuning execution failed: -5
* mmc1: error -5 whilst initialising SD card
*
* This is the quirk used on downstream, which suggests this is
* a hardware limitation. However, probing a card using DDR50 works
* (without tuning), so maybe only tuning is broken?
*/
no-1-8-v;
};
&usb {
status = "okay";
extcon = <&muic>, <&muic>;
};
&usb_hs_phy {
extcon = <&muic>;
};
&smd_rpm_regulators {
vdd_l1_l2_l3-supply = <&pm8916_s3>;
vdd_l4_l5_l6-supply = <&pm8916_s4>;
vdd_l7-supply = <&pm8916_s4>;
s3 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1300000>;
};
s4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2100000>;
};
l1 {
regulator-min-microvolt = <1225000>;
regulator-max-microvolt = <1225000>;
};
l2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
l4 {
regulator-min-microvolt = <2050000>;
regulator-max-microvolt = <2050000>;
};
l5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
l8 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2900000>;
};
l9 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
l10 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2800000>;
};
l11 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
regulator-allow-set-load;
regulator-system-load = <200000>;
};
l12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
};
l13 {
regulator-min-microvolt = <3075000>;
regulator-max-microvolt = <3075000>;
};
l14 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l16 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
l17 {
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <2850000>;
};
l18 {
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2700000>;
};
};
&msmgpio {
fg_alert_default: fg-alert-default {
pins = "gpio121";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
gpio_keys_default: gpio-keys-default {
pins = "gpio107", "gpio109";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
gpio_hall_sensor_default: gpio-hall-sensor-default {
pins = "gpio52";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
imu_irq_default: imu-irq-default {
pins = "gpio115";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
muic_i2c_default: muic-i2c-default {
pins = "gpio105", "gpio106";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
muic_irq_default: muic-irq-default {
pins = "gpio12";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
nfc_default: nfc-default {
pins = "gpio20", "gpio49";
function = "gpio";
drive-strength = <2>;
bias-disable;
irq {
pins = "gpio21";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
};
nfc_i2c_default: nfc-i2c-default {
pins = "gpio0", "gpio1";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
tkey_default: tkey-default {
pins = "gpio98";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
tkey_en_default: tkey-en-default {
pins = "gpio86";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
tkey_i2c_default: tkey-i2c-default {
pins = "gpio16", "gpio17";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
tkey_led_en_default: tkey-led-en-default {
pins = "gpio60";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
tsp_en_default: tsp-en-default {
pins = "gpio73";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
tsp_irq_default: tsp-irq-default {
pins = "gpio13";
function = "gpio";
drive-strength = <2>;
bias-disable;
};
};

1
arch/arm64/boot/dts/qcom/msm8916-wingtech-wt88047.dts
View File

@ -11,6 +11,7 @@
/ {
model = "Xiaomi Redmi 2 (Wingtech WT88047)";
compatible = "wingtech,wt88047", "qcom,msm8916";
chassis-type = "handset";
aliases {
serial0 = &blsp1_uart2;

73
arch/arm64/boot/dts/qcom/msm8916.dtsi
View File

@ -41,9 +41,13 @@
no-map;
};
smem_mem: smem_region@86300000 {
smem@86300000 {
compatible = "qcom,smem";
reg = <0x0 0x86300000 0x0 0x100000>;
no-map;
hwlocks = <&tcsr_mutex 3>;
qcom,rpm-msg-ram = <&rpm_msg_ram>;
};
hypervisor@86400000 {
@ -124,6 +128,8 @@
#cooling-cells = <2>;
power-domains = <&CPU_PD0>;
power-domain-names = "psci";
qcom,acc = <&cpu0_acc>;
qcom,saw = <&cpu0_saw>;
};
CPU1: cpu@1 {
@ -137,6 +143,8 @@
#cooling-cells = <2>;
power-domains = <&CPU_PD1>;
power-domain-names = "psci";
qcom,acc = <&cpu1_acc>;
qcom,saw = <&cpu1_saw>;
};
CPU2: cpu@2 {
@ -150,6 +158,8 @@
#cooling-cells = <2>;
power-domains = <&CPU_PD2>;
power-domain-names = "psci";
qcom,acc = <&cpu2_acc>;
qcom,saw = <&cpu2_saw>;
};
CPU3: cpu@3 {
@ -163,6 +173,8 @@
#cooling-cells = <2>;
power-domains = <&CPU_PD3>;
power-domain-names = "psci";
qcom,acc = <&cpu3_acc>;
qcom,saw = <&cpu3_saw>;
};
L2_0: l2-cache {
@ -323,15 +335,6 @@
};
};
smem {
compatible = "qcom,smem";
memory-region = <&smem_mem>;
qcom,rpm-msg-ram = <&rpm_msg_ram>;
hwlocks = <&tcsr_mutex 3>;
};
smp2p-hexagon {
compatible = "qcom,smp2p";
qcom,smem = <435>, <428>;
@ -445,7 +448,7 @@
};
};
rpm_msg_ram: memory@60000 {
rpm_msg_ram: sram@60000 {
compatible = "qcom,rpm-msg-ram";
reg = <0x00060000 0x8000>;
};
@ -1877,6 +1880,54 @@
status = "disabled";
};
};
cpu0_acc: power-manager@b088000 {
compatible = "qcom,msm8916-acc";
reg = <0x0b088000 0x1000>;
status = "reserved"; /* Controlled by PSCI firmware */
};
cpu0_saw: power-manager@b089000 {
compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
reg = <0x0b089000 0x1000>;
status = "reserved"; /* Controlled by PSCI firmware */
};
cpu1_acc: power-manager@b098000 {
compatible = "qcom,msm8916-acc";
reg = <0x0b098000 0x1000>;
status = "reserved"; /* Controlled by PSCI firmware */
};
cpu1_saw: power-manager@b099000 {
compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
reg = <0x0b099000 0x1000>;
status = "reserved"; /* Controlled by PSCI firmware */
};
cpu2_acc: power-manager@b0a8000 {
compatible = "qcom,msm8916-acc";
reg = <0x0b0a8000 0x1000>;
status = "reserved"; /* Controlled by PSCI firmware */
};
cpu2_saw: power-manager@b0a9000 {
compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
reg = <0x0b0a9000 0x1000>;
status = "reserved"; /* Controlled by PSCI firmware */
};
cpu3_acc: power-manager@b0b8000 {
compatible = "qcom,msm8916-acc";
reg = <0x0b0b8000 0x1000>;
status = "reserved"; /* Controlled by PSCI firmware */
};
cpu3_saw: power-manager@b0b9000 {
compatible = "qcom,msm8916-saw2-v3.0-cpu", "qcom,saw2";
reg = <0x0b0b9000 0x1000>;
status = "reserved"; /* Controlled by PSCI firmware */
};
};
thermal-zones {

2
arch/arm64/boot/dts/qcom/msm8992-bullhead-rev-101.dts
View File

@ -16,6 +16,8 @@
/ {
model = "LG Nexus 5X";
compatible = "lg,bullhead", "qcom,msm8992";
chassis-type = "handset";
/* required for bootloader to select correct board */
qcom,msm-id = <251 0>, <252 0>;
qcom,board-id = <0xb64 0>;

1
arch/arm64/boot/dts/qcom/msm8992-msft-lumia-octagon-talkman.dts
View File

@ -12,4 +12,5 @@
/ {
model = "Microsoft Lumia 950";
compatible = "microsoft,talkman", "qcom,msm8992";
chassis-type = "handset";
};

2
arch/arm64/boot/dts/qcom/msm8992-xiaomi-libra.dts
View File

@ -14,6 +14,8 @@
/ {
model = "Xiaomi Mi 4C";
compatible = "xiaomi,libra", "qcom,msm8992";
chassis-type = "handset";
/* required for bootloader to select correct board */
qcom,msm-id = <251 0 252 0>;
qcom,pmic-id = <65545 65546 0 0>;

1
arch/arm64/boot/dts/qcom/msm8994-angler-rev-101.dts
View File

@ -14,6 +14,7 @@
/ {
model = "Huawei Nexus 6P";
compatible = "huawei,angler", "qcom,msm8994";
chassis-type = "handset";
/* required for bootloader to select correct board */
qcom,msm-id = <207 0x20000>;
qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>;

1
arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dts
View File

@ -12,4 +12,5 @@
/ {
model = "Microsoft Lumia 950 XL";
compatible = "microsoft,cityman", "qcom,msm8994";
chassis-type = "handset";
};

1
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-ivy.dts
View File

@ -10,6 +10,7 @@
/ {
model = "Sony Xperia Z3+/Z4";
compatible = "sony,ivy-row", "qcom,msm8994";
chassis-type = "handset";
};
&pm8994_l3 {

1
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-karin.dts
View File

@ -10,6 +10,7 @@
/ {
model = "Sony Xperia Z4 Tablet (LTE)";
compatible = "sony,karin-row", "qcom,msm8994";
chassis-type = "tablet";
};
&blsp2_i2c5 {

1
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-satsuki.dts
View File

@ -10,6 +10,7 @@
/ {
model = "Sony Xperia Z5 Premium";
compatible = "sony,satsuki-row", "qcom,msm8994";
chassis-type = "handset";
};
&pm8994_l14 {

1
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-sumire.dts
View File

@ -10,6 +10,7 @@
/ {
model = "Sony Xperia Z5";
compatible = "sony,sumire-row", "qcom,msm8994";
chassis-type = "handset";
};
/delete-node/ &pm8994_l19;

1
arch/arm64/boot/dts/qcom/msm8994-sony-xperia-kitakami-suzuran.dts
View File

@ -10,6 +10,7 @@
/ {
model = "Sony Xperia Z5 Compact";
compatible = "sony,suzuran-row", "qcom,msm8994";
chassis-type = "handset";
};
&pm8994_l14 {

2
arch/arm64/boot/dts/qcom/msm8994.dtsi
View File

@ -715,7 +715,7 @@
reg = <0xfc400000 0x2000>;
};
rpm_msg_ram: memory@fc428000 {
rpm_msg_ram: sram@fc428000 {
compatible = "qcom,rpm-msg-ram";
reg = <0xfc428000 0x4000>;
};

24
arch/arm64/boot/dts/qcom/msm8996-mtp.dts
View File

@ -5,9 +5,31 @@
/dts-v1/;
#include "msm8996-mtp.dtsi"
#include "msm8996.dtsi"
/ {
model = "Qualcomm Technologies, Inc. MSM 8996 MTP";
compatible = "qcom,msm8996-mtp";
aliases {
serial0 = &blsp2_uart2;
};
chosen {
stdout-path = "serial0";
};
soc {
serial@75b0000 {
status = "okay";
};
};
};
&hdmi {
status = "okay";
};
&hdmi_phy {
status = "okay";
};

30
arch/arm64/boot/dts/qcom/msm8996-mtp.dtsi
View File

@ -1,30 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
*/
#include "msm8996.dtsi"
/ {
aliases {
serial0 = &blsp2_uart2;
};
chosen {
stdout-path = "serial0";
};
soc {
serial@75b0000 {
status = "okay";
};
};
};
&hdmi {
status = "okay";
};
&hdmi_phy {
status = "okay";
};

1
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-dora.dts
View File

@ -12,6 +12,7 @@
/ {
model = "Sony Xperia X Performance";
compatible = "sony,dora-row", "qcom,msm8996";
chassis-type = "handset";
};
/delete-node/ &tof_sensor;

1
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-kagura.dts
View File

@ -12,4 +12,5 @@
/ {
model = "Sony Xperia XZ";
compatible = "sony,kagura-row", "qcom,msm8996";
chassis-type = "handset";
};

1
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone-keyaki.dts
View File

@ -12,6 +12,7 @@
/ {
model = "Sony Xperia XZs";
compatible = "sony,keyaki-row", "qcom,msm8996";
chassis-type = "handset";
};
&pm8994_l19 {

1
arch/arm64/boot/dts/qcom/msm8996-sony-xperia-tone.dtsi
View File

@ -620,6 +620,7 @@
&pmi8994_wled {
status = "okay";
default-brightness = <512>;
qcom,num-strings = <3>;
};
&rpm_requests {

2
arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi
View File

@ -185,12 +185,12 @@
&blsp2_i2c2 {
status = "okay";
label = "NFC_I2C";
clock-frequency = <400000>;
nfc: pn548@28 {
compatible = "nxp,nxp-nci-i2c";
reg = <0x28>;
clock-frequency = <400000>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;

34
arch/arm64/boot/dts/qcom/msm8996-xiaomi-gemini.dts
View File

@ -13,6 +13,7 @@
/ {
model = "Xiaomi Mi 5";
compatible = "xiaomi,gemini", "qcom,msm8996";
chassis-type = "handset";
qcom,msm-id = <246 0x30001>;
qcom,pmic-id = <0x20009 0x2000a 0x00 0x00>;
qcom,board-id = <31 0>;
@ -90,12 +91,45 @@
};
&dsi0 {
status = "okay";
vdd-supply = <&vreg_l2a_1p25>;
vdda-supply = <&vreg_l19a_3p3>;
vddio-supply = <&vreg_l14a_1p8>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mdss_dsi_default &mdss_te_default>;
pinctrl-1 = <&mdss_dsi_sleep &mdss_te_sleep>;
panel: panel@0 {
compatible = "jdi,fhd-r63452";
reg = <0>;
reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
backlight = <&pmi8994_wled>;
port {
panel_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
};
};
&dsi0_out {
remote-endpoint = <&panel_in>;
};
&gpu {
zap-shader {
firmware-name = "qcom/msm8996/gemini/a530_zap.mbn";
};
};
&pmi8994_wled {
status = "okay";
};
&q6asmdai {
dai@0 {
reg = <0>;

1
arch/arm64/boot/dts/qcom/msm8996-xiaomi-scorpio.dts
View File

@ -13,6 +13,7 @@
/ {
model = "Xiaomi Mi Note 2";
compatible = "xiaomi,scorpio", "qcom,msm8996";
chassis-type = "handset";
qcom,msm-id = <305 0x10000>;
qcom,board-id = <34 0>;

43
arch/arm64/boot/dts/qcom/msm8996.dtsi
View File

@ -582,7 +582,6 @@
pcie_phy: phy@34000 {
compatible = "qcom,msm8996-qmp-pcie-phy";
reg = <0x00034000 0x488>;
#clock-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@ -598,12 +597,13 @@
reset-names = "phy", "common", "cfg";
status = "disabled";
pciephy_0: lane@35000 {
pciephy_0: phy@35000 {
reg = <0x00035000 0x130>,
<0x00035200 0x200>,
<0x00035400 0x1dc>;
#phy-cells = <0>;
#clock-cells = <1>;
clock-output-names = "pcie_0_pipe_clk_src";
clocks = <&gcc GCC_PCIE_0_PIPE_CLK>;
clock-names = "pipe0";
@ -611,7 +611,7 @@
reset-names = "lane0";
};
pciephy_1: lane@36000 {
pciephy_1: phy@36000 {
reg = <0x00036000 0x130>,
<0x00036200 0x200>,
<0x00036400 0x1dc>;
@ -624,7 +624,7 @@
reset-names = "lane1";
};
pciephy_2: lane@37000 {
pciephy_2: phy@37000 {
reg = <0x00037000 0x130>,
<0x00037200 0x200>,
<0x00037400 0x1dc>;
@ -638,7 +638,7 @@
};
};
rpm_msg_ram: memory@68000 {
rpm_msg_ram: sram@68000 {
compatible = "qcom,rpm-msg-ram";
reg = <0x00068000 0x6000>;
};
@ -705,6 +705,28 @@
#thermal-sensor-cells = <1>;
};
cryptobam: dma@644000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x00644000 0x24000>;
interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_CE1_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = <0>;
qcom,controlled-remotely = <1>;
};
crypto: crypto@67a000 {
compatible = "qcom,crypto-v5.4";
reg = <0x0067a000 0x6000>;
clocks = <&gcc GCC_CE1_AHB_CLK>,
<&gcc GCC_CE1_AXI_CLK>,
<&gcc GCC_CE1_CLK>;
clock-names = "iface", "bus", "core";
dmas = <&cryptobam 6>, <&cryptobam 7>;
dma-names = "rx", "tx";
};
tcsr_mutex_regs: syscon@740000 {
compatible = "syscon";
reg = <0x00740000 0x40000>;
@ -1523,6 +1545,11 @@
};
};
sram@290000 {
compatible = "qcom,rpm-stats";
reg = <0x00290000 0x10000>;
};
spmi_bus: qcom,spmi@400f000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x0400f000 0x1000>,
@ -1774,7 +1801,7 @@
reset-names = "ufsphy";
status = "disabled";
ufsphy_lane: lanes@627400 {
ufsphy_lane: phy@627400 {
reg = <0x627400 0x12c>,
<0x627600 0x200>,
<0x627c00 0x1b4>;
@ -2614,7 +2641,6 @@
usb3phy: phy@7410000 {
compatible = "qcom,msm8996-qmp-usb3-phy";
reg = <0x07410000 0x1c4>;
#clock-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@ -2629,12 +2655,13 @@
reset-names = "phy", "common";
status = "disabled";
ssusb_phy_0: lane@7410200 {
ssusb_phy_0: phy@7410200 {
reg = <0x07410200 0x200>,
<0x07410400 0x130>,
<0x07410600 0x1a8>;
#phy-cells = <0>;
#clock-cells = <1>;
clock-output-names = "usb3_phy_pipe_clk_src";
clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
clock-names = "pipe0";

1
arch/arm64/boot/dts/qcom/msm8998-asus-novago-tp370ql.dts
View File

@ -8,6 +8,7 @@
/ {
model = "Asus NovaGo TP370QL";
compatible = "asus,novago-tp370ql", "qcom,msm8998";
chassis-type = "convertible";
};
&blsp1_i2c6 {

2
arch/arm64/boot/dts/qcom/msm8998-clamshell.dtsi
View File

@ -313,6 +313,8 @@
&ufsphy {
status = "okay";
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l2a_1p2>;
};
&usb3 {

1
arch/arm64/boot/dts/qcom/msm8998-fxtec-pro1.dts
View File

@ -15,6 +15,7 @@
/ {
model = "F(x)tec Pro1 (QX1000)";
compatible = "fxtec,pro1", "qcom,msm8998";
chassis-type = "handset";
qcom,board-id = <0x02000b 0x10>;
/*

1
arch/arm64/boot/dts/qcom/msm8998-hp-envy-x2.dts
View File

@ -8,6 +8,7 @@
/ {
model = "HP Envy x2";
compatible = "hp,envy-x2", "qcom,msm8998";
chassis-type = "convertible";
};
&blsp1_i2c6 {

1
arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dts
View File

@ -8,6 +8,7 @@
/ {
model = "Lenovo Miix 630";
compatible = "lenovo,miix-630", "qcom,msm8998";
chassis-type = "convertible";
};
&blsp1_i2c6 {

4
arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
View File

@ -371,10 +371,6 @@
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l2a_1p2>;
vddp-ref-clk-supply = <&vreg_l26a_1p2>;
vdda-phy-max-microamp = <51400>;
vdda-pll-max-microamp = <14600>;
vddp-ref-clk-max-microamp = <100>;
vddp-ref-clk-always-on;
};
&usb3 {

1
arch/arm64/boot/dts/qcom/msm8998-oneplus-cheeseburger.dts
View File

@ -11,6 +11,7 @@
/ {
model = "OnePlus 5";
compatible = "oneplus,cheeseburger", "qcom,msm8998";
chassis-type = "handset";
/* Required for bootloader to select correct board */
qcom,board-id = <8 0 16859 23>;

4
arch/arm64/boot/dts/qcom/msm8998-oneplus-common.dtsi
View File

@ -480,10 +480,6 @@
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l2a_1p2>;
vddp-ref-clk-supply = <&vreg_l26a_1p2>;
vdda-phy-max-microamp = <51400>;
vdda-pll-max-microamp = <14600>;
vddp-ref-clk-max-microamp = <100>;
vddp-ref-clk-always-on;
};
&usb3 {

1
arch/arm64/boot/dts/qcom/msm8998-oneplus-dumpling.dts
View File

@ -10,6 +10,7 @@
/ {
model = "OnePlus 5T";
compatible = "oneplus,dumpling", "qcom,msm8998";
chassis-type = "handset";
/* Required for bootloader to select correct board */
qcom,board-id = <8 0 17801 43>;
};

1
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino-lilac.dts
View File

@ -11,6 +11,7 @@
/ {
model = "Sony Xperia XZ1 Compact";
compatible = "sony,xperia-lilac", "qcom,msm8998";
chassis-type = "handset";
};
&ibb {

1
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino-maple.dts
View File

@ -11,6 +11,7 @@
/ {
model = "Sony Xperia XZ Premium";
compatible = "sony,xperia-maple", "qcom,msm8998";
chassis-type = "handset";
disp_dvdd_vreg: disp-dvdd-vreg {
compatible = "regulator-fixed";

1
arch/arm64/boot/dts/qcom/msm8998-sony-xperia-yoshino-poplar.dts
View File

@ -11,6 +11,7 @@
/ {
model = "Sony Xperia XZ1";
compatible = "sony,xperia-poplar", "qcom,msm8998";
chassis-type = "handset";
};
&ibb {

23
arch/arm64/boot/dts/qcom/msm8998.dtsi
View File

@ -865,7 +865,7 @@
clocks = <&xo>, <&sleep_clk>;
};
rpm_msg_ram: memory@778000 {
rpm_msg_ram: sram@778000 {
compatible = "qcom,rpm-msg-ram";
reg = <0x00778000 0x7000>;
};
@ -962,10 +962,10 @@
interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 135 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 2 &intc 0 136 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 3 &intc 0 138 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 4 &intc 0 139 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map = <0 0 0 1 &intc 0 0 135 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 2 &intc 0 0 136 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 3 &intc 0 0 138 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 4 &intc 0 0 139 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
<&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
@ -998,7 +998,7 @@
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l2a_1p2>;
pciephy: lane@1c06800 {
pciephy: phy@1c06800 {
reg = <0x01c06200 0x128>, <0x01c06400 0x1fc>, <0x01c06800 0x20c>;
#phy-cells = <0>;
@ -1070,7 +1070,7 @@
reset-names = "ufsphy";
resets = <&ufshc 0>;
ufsphy_lanes: lanes@1da7400 {
ufsphy_lanes: phy@1da7400 {
reg = <0x01da7400 0x128>,
<0x01da7600 0x1fc>,
<0x01da7c00 0x1dc>,
@ -2022,6 +2022,11 @@
};
};
sram@290000 {
compatible = "qcom,rpm-stats";
reg = <0x00290000 0x10000>;
};
spmi_bus: spmi@800f000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x0800f000 0x1000>,
@ -2086,7 +2091,6 @@
compatible = "qcom,msm8998-qmp-usb3-phy";
reg = <0x0c010000 0x18c>;
status = "disabled";
#clock-cells = <1>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
@ -2100,13 +2104,14 @@
<&gcc GCC_USB3PHY_PHY_BCR>;
reset-names = "phy", "common";
usb1_ssphy: lane@c010200 {
usb1_ssphy: phy@c010200 {
reg = <0xc010200 0x128>,
<0xc010400 0x200>,
<0xc010c00 0x20c>,
<0xc010600 0x128>,
<0xc010800 0x200>;
#phy-cells = <0>;
#clock-cells = <1>;
clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>;
clock-names = "pipe0";
clock-output-names = "usb3_phy_pipe_clk_src";

54
arch/arm64/boot/dts/qcom/pm6350.dtsi Normal file
View File

@ -0,0 +1,54 @@
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2021, Luca Weiss <luca@z3ntu.xyz>
*/
#include <dt-bindings/spmi/spmi.h>
&spmi_bus {
pmic@0 {
compatible = "qcom,pm6350", "qcom,spmi-pmic";
reg = <0x0 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pm6350_pon: pon@800 {
compatible = "qcom,pm8998-pon";
reg = <0x800>;
mode-bootloader = <0x2>;
mode-recovery = <0x1>;
pm6350_pwrkey: pwrkey {
compatible = "qcom,pm8941-pwrkey";
interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>;
debounce = <15625>;
bias-pull-up;
linux,code = <KEY_POWER>;
};
pm6350_resin: resin {
compatible = "qcom,pm8941-resin";
interrupts = <0x0 0x8 0x1 IRQ_TYPE_EDGE_BOTH>;
debounce = <15625>;
bias-pull-up;
status = "disabled";
};
};
pm6350_gpios: gpios@c000 {
compatible = "qcom,pm6350-gpio";
reg = <0xc000>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
pmic@1 {
compatible = "qcom,pm6350", "qcom,spmi-pmic";
reg = <0x1 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
};
};

7
arch/arm64/boot/dts/qcom/pm660l.dtsi
View File

@ -72,13 +72,6 @@
interrupt-names = "ovp";
label = "backlight";
qcom,switching-freq = <800>;
qcom,ovp-millivolt = <29600>;
qcom,current-boost-limit = <970>;
qcom,current-limit-microamp = <20000>;
qcom,num-strings = <2>;
qcom,enabled-strings = <0 1>;
status = "disabled";
};

9
arch/arm64/boot/dts/qcom/pm8916.dtsi
View File

@ -98,14 +98,13 @@
};
pm8916_mpps: mpps@a000 {
compatible = "qcom,pm8916-mpp";
compatible = "qcom,pm8916-mpp", "qcom,spmi-mpp";
reg = <0xa000>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <0 0xa0 0 IRQ_TYPE_NONE>,
<0 0xa1 0 IRQ_TYPE_NONE>,
<0 0xa2 0 IRQ_TYPE_NONE>,
<0 0xa3 0 IRQ_TYPE_NONE>;
gpio-ranges = <&pm8916_mpps 0 0 4>;
interrupt-controller;
#interrupt-cells = <2>;
};
pm8916_gpios: gpios@c000 {

13
arch/arm64/boot/dts/qcom/pm8994.dtsi
View File

@ -119,18 +119,13 @@
};
pm8994_mpps: mpps@a000 {
compatible = "qcom,pm8994-mpp";
compatible = "qcom,pm8994-mpp", "qcom,spmi-mpp";
reg = <0xa000>;
gpio-controller;
#gpio-cells = <2>;
interrupts = <0 0xa0 0 IRQ_TYPE_NONE>,
<0 0xa1 0 IRQ_TYPE_NONE>,
<0 0xa2 0 IRQ_TYPE_NONE>,
<0 0xa3 0 IRQ_TYPE_NONE>,
<0 0xa4 0 IRQ_TYPE_NONE>,
<0 0xa5 0 IRQ_TYPE_NONE>,
<0 0xa6 0 IRQ_TYPE_NONE>,
<0 0xa7 0 IRQ_TYPE_NONE>;
gpio-ranges = <&pm8994_mpps 0 0 8>;
interrupt-controller;
#interrupt-cells = <2>;
};
};

5
arch/arm64/boot/dts/qcom/pmi8994.dtsi
View File

@ -38,11 +38,8 @@
reg = <0xd800 0xd900>;
interrupts = <3 0xd8 0x02 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "short";
qcom,num-strings = <3>;
/* Yes, all four strings *have to* be defined or things won't work. */
qcom,enabled-strings = <0 1 2 3>;
qcom,cabc;
qcom,eternal-pfet;
qcom,external-pfet;
status = "disabled";
};
};

1
arch/arm64/boot/dts/qcom/pmk8350.dtsi
View File

@ -59,6 +59,7 @@
reg = <0x6100>, <0x6200>;
reg-names = "rtc", "alarm";
interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
pmk8350_gpios: gpio@b000 {

7
arch/arm64/boot/dts/qcom/qcs404.dtsi
View File

@ -318,7 +318,7 @@
status = "disabled";
};
rpm_msg_ram: memory@60000 {
rpm_msg_ram: sram@60000 {
compatible = "qcom,rpm-msg-ram";
reg = <0x00060000 0x6000>;
};
@ -719,6 +719,11 @@
reg = <0x01937000 0x25000>;
};
sram@290000 {
compatible = "qcom,rpm-stats";
reg = <0x00290000 0x10000>;
};
spmi_bus: spmi@200f000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x0200f000 0x001000>,

4
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts
View File

@ -16,6 +16,8 @@
/ {
model = "Qualcomm Technologies, Inc. Robotics RB5";
compatible = "qcom,qrb5165-rb5", "qcom,sm8250";
qcom,msm-id = <455 0x20001>;
qcom,board-id = <11 3>;
aliases {
serial0 = &uart12;
@ -1222,9 +1224,7 @@
status = "okay";
vdda-phy-supply = <&vreg_l5a_0p88>;
vdda-max-microamp = <89900>;
vdda-pll-supply = <&vreg_l9a_1p2>;
vdda-pll-max-microamp = <18800>;
};
&usb_1 {

12
arch/arm64/boot/dts/qcom/sa8155p-adp.dts
View File

@ -307,6 +307,16 @@
status = "okay";
};
&remoteproc_adsp {
status = "okay";
firmware-name = "qcom/sa8155p/adsp.mdt";
};
&remoteproc_cdsp {
status = "okay";
firmware-name = "qcom/sa8155p/cdsp.mdt";
};
&uart2 {
status = "okay";
};
@ -328,9 +338,7 @@
status = "okay";
vdda-phy-supply = <&vreg_l8c_1p2>;
vdda-max-microamp = <87100>;
vdda-pll-supply = <&vreg_l5a_0p88>;
vdda-pll-max-microamp = <18300>;
};
&usb_1 {

1
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi
View File

@ -11,6 +11,7 @@ ap_ec_spi: &spi6 {};
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
/* Deleted nodes from trogdor.dtsi */

1
arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi
View File

@ -11,6 +11,7 @@ ap_ec_spi: &spi6 {};
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
/ {
/* BOARD-SPECIFIC TOP LEVEL NODES */

1
arch/arm64/boot/dts/qcom/sc7180-trogdor-lazor.dtsi
View File

@ -11,6 +11,7 @@ ap_ec_spi: &spi6 {};
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
&ap_sar_sensor {
semtech,cs0-ground;

109
arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi Normal file
View File

@ -0,0 +1,109 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Trogdor dts fragment for the boards with Parade ps8640 edp bridge
*
* Copyright 2021 Google LLC.
*/
/ {
pp3300_brij_ps8640: pp3300-brij-ps8640 {
compatible = "regulator-fixed";
status = "okay";
regulator-name = "pp3300_brij_ps8640";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&en_pp3300_edp_brij_ps8640>;
vin-supply = <&pp3300_a>;
};
};
&dsi0_out {
remote-endpoint = <&ps8640_in>;
};
edp_brij_i2c: &i2c2 {
status = "okay";
clock-frequency = <400000>;
ps8640_bridge: bridge@8 {
compatible = "parade,ps8640";
reg = <0x8>;
powerdown-gpios = <&tlmm 104 GPIO_ACTIVE_LOW>;
reset-gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&edp_brij_en>, <&edp_brij_ps8640_rst>;
vdd12-supply = <&pp1200_brij>;
vdd33-supply = <&pp3300_brij_ps8640>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ps8640_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@1 {
reg = <1>;
ps8640_out: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
};
aux-bus {
panel: panel {
/* Compatible will be filled in per-board */
power-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
port {
panel_in_edp: endpoint {
remote-endpoint = <&ps8640_out>;
};
};
};
};
};
};
&tlmm {
edp_brij_ps8640_rst: edp-brij-ps8640-rst {
pinmux {
pins = "gpio11";
function = "gpio";
};
pinconf {
pins = "gpio11";
drive-strength = <2>;
bias-disable;
};
};
en_pp3300_edp_brij_ps8640: en-pp3300-edp-brij-ps8640 {
pinmux {
pins = "gpio32";
function = "gpio";
};
pinconf {
pins = "gpio32";
drive-strength = <2>;
bias-disable;
};
};
};

1
arch/arm64/boot/dts/qcom/sc7180-trogdor-pompom.dtsi
View File

@ -11,6 +11,7 @@ ap_ec_spi: &spi6 {};
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
/ {
thermal-zones {

1
arch/arm64/boot/dts/qcom/sc7180-trogdor-r1.dts
View File

@ -13,6 +13,7 @@ ap_ec_spi: &spi6 {};
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
#include "sc7180-trogdor-ti-sn65dsi86.dtsi"
/ {
model = "Google Trogdor (rev1+)";

90
arch/arm64/boot/dts/qcom/sc7180-trogdor-ti-sn65dsi86.dtsi Normal file
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@ -0,0 +1,90 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Trogdor dts fragment for the boards with TI sn65dsi86 edp bridge
*
* Copyright 2021 Google LLC.
*/
&dsi0_out {
remote-endpoint = <&sn65dsi86_in>;
data-lanes = <0 1 2 3>;
};
edp_brij_i2c: &i2c2 {
status = "okay";
clock-frequency = <400000>;
sn65dsi86_bridge: bridge@2d {
compatible = "ti,sn65dsi86";
reg = <0x2d>;
pinctrl-names = "default";
pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&tlmm>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>;
vpll-supply = <&pp1800_edp_vpll>;
vccio-supply = <&pp1800_brij_vccio>;
vcca-supply = <&pp1200_brij>;
vcc-supply = <&pp1200_brij>;
clocks = <&rpmhcc RPMH_LN_BB_CLK3>;
clock-names = "refclk";
no-hpd;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
sn65dsi86_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@1 {
reg = <1>;
sn65dsi86_out: endpoint {
data-lanes = <0 1>;
remote-endpoint = <&panel_in_edp>;
};
};
};
aux-bus {
panel: panel {
/* Compatible will be filled in per-board */
power-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
port {
panel_in_edp: endpoint {
remote-endpoint = <&sn65dsi86_out>;
};
};
};
};
};
};
&tlmm {
edp_brij_irq: edp-brij-irq {
pinmux {
pins = "gpio11";
function = "gpio";
};
pinconf {
pins = "gpio11";
drive-strength = <2>;
bias-pull-down;
};
};
};

86
arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi
View File

@ -602,15 +602,6 @@
&dsi0 {
status = "okay";
vdda-supply = <&vdda_mipi_dsi0_1p2>;
ports {
port@1 {
endpoint {
remote-endpoint = <&sn65dsi86_in>;
data-lanes = <0 1 2 3>;
};
};
};
};
&dsi_phy {
@ -618,70 +609,6 @@
vdds-supply = <&vdda_mipi_dsi0_pll>;
};
edp_brij_i2c: &i2c2 {
status = "okay";
clock-frequency = <400000>;
sn65dsi86_bridge: bridge@2d {
compatible = "ti,sn65dsi86";
reg = <0x2d>;
pinctrl-names = "default";
pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&tlmm>;
interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>;
vpll-supply = <&pp1800_edp_vpll>;
vccio-supply = <&pp1800_brij_vccio>;
vcca-supply = <&pp1200_brij>;
vcc-supply = <&pp1200_brij>;
clocks = <&rpmhcc RPMH_LN_BB_CLK3>;
clock-names = "refclk";
no-hpd;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
sn65dsi86_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@1 {
reg = <1>;
sn65dsi86_out: endpoint {
data-lanes = <0 1>;
remote-endpoint = <&panel_in_edp>;
};
};
};
aux-bus {
panel: panel {
/* Compatible will be filled in per-board */
power-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
port {
panel_in_edp: endpoint {
remote-endpoint = <&sn65dsi86_out>;
};
};
};
};
};
};
ap_sar_sensor_i2c: &i2c5 {
clock-frequency = <400000>;
@ -1234,19 +1161,6 @@ ap_spi_fp: &spi10 {
};
};
edp_brij_irq: edp-brij-irq {
pinmux {
pins = "gpio11";
function = "gpio";
};
pinconf {
pins = "gpio11";
drive-strength = <2>;
bias-pull-down;
};
};
en_pp3300_codec: en-pp3300-codec {
pinmux {
pins = "gpio83";

9
arch/arm64/boot/dts/qcom/sc7180.dtsi
View File

@ -2647,7 +2647,7 @@
};
qspi: spi@88dc000 {
compatible = "qcom,qspi-v1";
compatible = "qcom,sc7180-qspi", "qcom,qspi-v1";
reg = <0 0x088dc000 0 0x600>;
#address-cells = <1>;
#size-cells = <0>;
@ -3219,13 +3219,18 @@
aoss_qmp: power-controller@c300000 {
compatible = "qcom,sc7180-aoss-qmp";
reg = <0 0x0c300000 0 0x100000>;
reg = <0 0x0c300000 0 0x400>;
interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
mboxes = <&apss_shared 0>;
#clock-cells = <0>;
};
sram@c3f0000 {
compatible = "qcom,rpmh-stats";
reg = <0 0x0c3f0000 0 0x400>;
};
spmi_bus: spmi@c440000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0 0x0c440000 0 0x1100>,

14
arch/arm64/boot/dts/qcom/sc7280-herobrine.dts Normal file
View File

@ -0,0 +1,14 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Herobrine board device tree source
*
* Copyright 2021 Google LLC.
*/
#include "sc7280-herobrine.dtsi"
/ {
model = "Google Herobrine";
compatible = "google,herobrine",
"qcom,sc7280";
};

1412
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi Normal file
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File diff suppressed because it is too large Load Diff

12
arch/arm64/boot/dts/qcom/sc7280-idp.dts
View File

@ -61,6 +61,18 @@
modem-init;
};
&pmk8350_rtc {
status = "okay";
};
&nvme_pwren {
pins = "gpio19";
};
&nvme_3v3_regulator {
gpio = <&tlmm 19 GPIO_ACTIVE_HIGH>;
};
&pmk8350_vadc {
pmr735a_die_temp {
reg = <PMR735A_ADC7_DIE_TEMP>;

50
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
View File

@ -31,6 +31,18 @@
linux,can-disable;
};
};
nvme_3v3_regulator: nvme-3v3-regulator {
compatible = "regulator-fixed";
regulator-name = "VLDO_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&nvme_pwren>;
};
};
/*
@ -272,6 +284,23 @@
modem-init;
};
&pcie1 {
status = "okay";
perst-gpio = <&tlmm 2 GPIO_ACTIVE_LOW>;
vddpe-3v3-supply = <&nvme_3v3_regulator>;
pinctrl-names = "default";
pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>;
};
&pcie1_phy {
status = "okay";
vdda-phy-supply = <&vreg_l10c_0p8>;
vdda-pll-supply = <&vreg_l6b_1p2>;
};
&pmk8350_vadc {
pmk8350_die_temp {
reg = <PMK8350_ADC7_DIE_TEMP>;
@ -462,6 +491,27 @@
};
&tlmm {
nvme_pwren: nvme-pwren {
function = "gpio";
};
pcie1_reset_n: pcie1-reset-n {
pins = "gpio2";
function = "gpio";
drive-strength = <16>;
output-low;
bias-disable;
};
pcie1_wake_n: pcie1-wake-n {
pins = "gpio3";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
qup_uart7_sleep_cts: qup-uart7-sleep-cts {
pins = "gpio28";
function = "gpio";

8
arch/arm64/boot/dts/qcom/sc7280-idp2.dts
View File

@ -21,3 +21,11 @@
stdout-path = "serial0:115200n8";
};
};
&nvme_pwren {
pins = "gpio51";
};
&nvme_3v3_regulator {
gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
};

130
arch/arm64/boot/dts/qcom/sc7280.dtsi
View File

@ -532,6 +532,11 @@
required-opps = <&rpmhpd_opp_svs>;
};
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
required-opps = <&rpmhpd_opp_svs_l1>;
};
opp-300000000 {
opp-hz = /bits/ 64 <300000000>;
required-opps = <&rpmhpd_opp_nom>;
@ -1563,6 +1568,117 @@
qcom,bcm-voters = <&apps_bcm_voter>;
};
pcie1: pci@1c08000 {
compatible = "qcom,pcie-sc7280";
reg = <0 0x01c08000 0 0x3000>,
<0 0x40000000 0 0xf1d>,
<0 0x40000f20 0 0xa8>,
<0 0x40001000 0 0x1000>,
<0 0x40100000 0 0x100000>;
reg-names = "parf", "dbi", "elbi", "atu", "config";
device_type = "pci";
linux,pci-domain = <1>;
bus-range = <0x00 0xff>;
num-lanes = <2>;
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>,
<0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 2 &intc 0 435 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 3 &intc 0 438 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 4 &intc 0 439 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,
<&gcc GCC_PCIE_1_PIPE_CLK_SRC>,
<&pcie1_lane 0>,
<&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_PCIE_1_AUX_CLK>,
<&gcc GCC_PCIE_1_CFG_AHB_CLK>,
<&gcc GCC_PCIE_1_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_1_SLV_AXI_CLK>,
<&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>,
<&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>,
<&gcc GCC_DDRSS_PCIE_SF_CLK>;
clock-names = "pipe",
"pipe_mux",
"phy_pipe",
"ref",
"aux",
"cfg",
"bus_master",
"bus_slave",
"slave_q2a",
"tbu",
"ddrss_sf_tbu";
assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>;
assigned-clock-rates = <19200000>;
resets = <&gcc GCC_PCIE_1_BCR>;
reset-names = "pci";
power-domains = <&gcc GCC_PCIE_1_GDSC>;
phys = <&pcie1_lane>;
phy-names = "pciephy";
pinctrl-names = "default";
pinctrl-0 = <&pcie1_clkreq_n>;
iommus = <&apps_smmu 0x1c80 0x1>;
iommu-map = <0x0 &apps_smmu 0x1c80 0x1>,
<0x100 &apps_smmu 0x1c81 0x1>;
status = "disabled";
};
pcie1_phy: phy@1c0e000 {
compatible = "qcom,sm8250-qmp-gen3x2-pcie-phy";
reg = <0 0x01c0e000 0 0x1c0>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
clocks = <&gcc GCC_PCIE_1_AUX_CLK>,
<&gcc GCC_PCIE_1_CFG_AHB_CLK>,
<&gcc GCC_PCIE_CLKREF_EN>,
<&gcc GCC_PCIE1_PHY_RCHNG_CLK>;
clock-names = "aux", "cfg_ahb", "ref", "refgen";
resets = <&gcc GCC_PCIE_1_PHY_BCR>;
reset-names = "phy";
assigned-clocks = <&gcc GCC_PCIE1_PHY_RCHNG_CLK>;
assigned-clock-rates = <100000000>;
status = "disabled";
pcie1_lane: lanes@1c0e200 {
reg = <0 0x01c0e200 0 0x170>,
<0 0x01c0e400 0 0x200>,
<0 0x01c0ea00 0 0x1f0>,
<0 0x01c0e600 0 0x170>,
<0 0x01c0e800 0 0x200>,
<0 0x01c0ee00 0 0xf4>;
clocks = <&gcc GCC_PCIE_1_PIPE_CLK>;
clock-names = "pipe0";
#phy-cells = <0>;
#clock-cells = <1>;
clock-output-names = "pcie_1_pipe_clk";
};
};
ipa: ipa@1e40000 {
compatible = "qcom,sc7280-ipa";
@ -2637,7 +2753,7 @@
aoss_qmp: power-controller@c300000 {
compatible = "qcom,sc7280-aoss-qmp";
reg = <0 0x0c300000 0 0x100000>;
reg = <0 0x0c300000 0 0x400>;
interrupts-extended = <&ipcc IPCC_CLIENT_AOP
IPCC_MPROC_SIGNAL_GLINK_QMP
IRQ_TYPE_EDGE_RISING>;
@ -2647,6 +2763,11 @@
#clock-cells = <0>;
};
sram@c3f0000 {
compatible = "qcom,rpmh-stats";
reg = <0 0x0c3f0000 0 0x400>;
};
spmi_bus: spmi@c440000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0 0x0c440000 0 0x1100>,
@ -2676,6 +2797,13 @@
gpio-ranges = <&tlmm 0 0 175>;
wakeup-parent = <&pdc>;
pcie1_clkreq_n: pcie1-clkreq-n {
pins = "gpio79";
function = "pcie1_clkreqn";
drive-strength = <2>;
bias-pull-up;
};
qspi_clk: qspi-clk {
pins = "gpio14";
function = "qspi_clk";

1
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-ganges-kirin.dts
View File

@ -11,6 +11,7 @@
/ {
model = "Sony Xperia 10";
compatible = "sony,kirin-row", "qcom,sdm630";
chassis-type = "handset";
chosen {
framebuffer@9d400000 {

1
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-discovery.dts
View File

@ -11,4 +11,5 @@
/ {
model = "Sony Xperia XA2 Ultra";
compatible = "sony,discovery-row", "qcom,sdm630";
chassis-type = "handset";
};

1
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-pioneer.dts
View File

@ -11,4 +11,5 @@
/ {
model = "Sony Xperia XA2";
compatible = "sony,pioneer-row", "qcom,sdm630";
chassis-type = "handset";
};

1
arch/arm64/boot/dts/qcom/sdm630-sony-xperia-nile-voyager.dts
View File

@ -11,6 +11,7 @@
/ {
model = "Sony Xperia XA2 Plus";
compatible = "sony,voyager-row", "qcom,sdm630";
chassis-type = "handset";
chosen {
framebuffer@9d400000 {

58
arch/arm64/boot/dts/qcom/sdm630.dtsi
View File

@ -541,7 +541,7 @@
<&sleep_clk>;
};
rpm_msg_ram: memory@778000 {
rpm_msg_ram: sram@778000 {
compatible = "qcom,rpm-msg-ram";
reg = <0x00778000 0x7000>;
};
@ -1165,6 +1165,11 @@
status = "disabled";
};
sram@290000 {
compatible = "qcom,rpm-stats";
reg = <0x00290000 0x10000>;
};
spmi_bus: spmi@800f000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x0800f000 0x1000>,
@ -2009,6 +2014,57 @@
};
};
venus: video-codec@cc00000 {
compatible = "qcom,sdm660-venus";
reg = <0x0cc00000 0xff000>;
clocks = <&mmcc VIDEO_CORE_CLK>,
<&mmcc VIDEO_AHB_CLK>,
<&mmcc VIDEO_AXI_CLK>,
<&mmcc THROTTLE_VIDEO_AXI_CLK>;
clock-names = "core", "iface", "bus", "bus_throttle";
interconnects = <&gnoc 0 &mnoc 13>,
<&mnoc 4 &bimc 5>;
interconnect-names = "cpu-cfg", "video-mem";
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
iommus = <&mmss_smmu 0x400>,
<&mmss_smmu 0x401>,
<&mmss_smmu 0x40a>,
<&mmss_smmu 0x407>,
<&mmss_smmu 0x40e>,
<&mmss_smmu 0x40f>,
<&mmss_smmu 0x408>,
<&mmss_smmu 0x409>,
<&mmss_smmu 0x40b>,
<&mmss_smmu 0x40c>,
<&mmss_smmu 0x40d>,
<&mmss_smmu 0x410>,
<&mmss_smmu 0x421>,
<&mmss_smmu 0x428>,
<&mmss_smmu 0x429>,
<&mmss_smmu 0x42b>,
<&mmss_smmu 0x42c>,
<&mmss_smmu 0x42d>,
<&mmss_smmu 0x411>,
<&mmss_smmu 0x431>;
memory-region = <&venus_region>;
power-domains = <&mmcc VENUS_GDSC>;
status = "disabled";
video-decoder {
compatible = "venus-decoder";
clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
clock-names = "vcodec0_core";
power-domains = <&mmcc VENUS_CORE0_GDSC>;
};
video-encoder {
compatible = "venus-encoder";
clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
clock-names = "vcodec0_core";
power-domains = <&mmcc VENUS_CORE0_GDSC>;
};
};
mmss_smmu: iommu@cd00000 {
compatible = "qcom,sdm630-smmu-v2", "qcom,smmu-v2";
reg = <0x0cd00000 0x40000>;

1
arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender.dts
View File

@ -10,6 +10,7 @@
/ {
model = "Xiaomi Redmi Note 7";
compatible = "xiaomi,lavender", "qcom,sdm660";
chassis-type = "handset";
aliases {
serial0 = &blsp1_uart2;

17
arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
View File

@ -5,7 +5,6 @@
* Copyright 2018 Google LLC.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sdm845.dtsi"
@ -616,6 +615,14 @@ ap_ts_i2c: &i2c14 {
};
};
&gmu {
status = "okay";
};
&gpu {
status = "okay";
};
&ipa {
status = "okay";
modem-init;
@ -629,10 +636,6 @@ ap_ts_i2c: &i2c14 {
status = "okay";
};
&mdss_mdp {
status = "okay";
};
/*
* Cheza fw does not properly program the GPU aperture to allow the
* GPU to update the SMMU pagetables for context switches. Work
@ -643,6 +646,8 @@ ap_ts_i2c: &i2c14 {
};
&mss_pil {
status = "okay";
iommus = <&apps_smmu 0x781 0x0>,
<&apps_smmu 0x724 0x3>;
};
@ -1317,6 +1322,8 @@ ap_ts_i2c: &i2c14 {
};
&venus {
status = "okay";
video-firmware {
iommus = <&apps_smmu 0x10b2 0x0>;
};

16
arch/arm64/boot/dts/qcom/sdm845-db845c.dts
View File

@ -5,7 +5,6 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/sound/qcom,q6afe.h>
@ -17,6 +16,8 @@
/ {
model = "Thundercomm Dragonboard 845c";
compatible = "thundercomm,db845c", "qcom,sdm845";
qcom,msm-id = <341 0x20001>;
qcom,board-id = <8 0>;
aliases {
serial0 = &uart9;
@ -420,7 +421,12 @@
<GCC_LPASS_SWAY_CLK>;
};
&gmu {
status = "okay";
};
&gpu {
status = "okay";
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/a630_zap.mbn";
@ -485,10 +491,6 @@
status = "okay";
};
&mdss_mdp {
status = "okay";
};
&mss_pil {
status = "okay";
firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
@ -999,6 +1001,10 @@
vdda-pll-supply = <&vreg_l26a_1p2>;
};
&venus {
status = "okay";
};
&wcd9340{
pinctrl-0 = <&wcd_intr_default>;
pinctrl-names = "default";

18
arch/arm64/boot/dts/qcom/sdm845-mtp.dts
View File

@ -7,7 +7,6 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include "sdm845.dtsi"
@ -361,9 +360,6 @@
qcom,dual-dsi-mode;
qcom,master-dsi;
#address-cells = <1>;
#size-cells = <0>;
ports {
port@1 {
endpoint {
@ -439,7 +435,13 @@
<GCC_LPASS_SWAY_CLK>;
};
&gmu {
status = "okay";
};
&gpu {
status = "okay";
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/a630_zap.mbn";
@ -460,10 +462,6 @@
status = "okay";
};
&mdss_mdp {
status = "okay";
};
&mss_pil {
status = "okay";
firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
@ -566,6 +564,10 @@
vdda-pll-supply = <&vdda_usb2_ss_core>;
};
&venus {
status = "okay";
};
&wifi {
status = "okay";
vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;

26
arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi
View File

@ -7,7 +7,6 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
@ -93,7 +92,6 @@
console-size = <0x40000>;
ftrace-size = <0x40000>;
pmsg-size = <0x200000>;
devinfo-size = <0x1000>;
ecc-size = <16>;
};
};
@ -248,6 +246,12 @@
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l23a_3p3: ldo23 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3312000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vdda_qusb_hs0_3p1:
vreg_l24a_3p075: ldo24 {
regulator-min-microvolt = <3088000>;
@ -315,9 +319,6 @@
status = "okay";
vdda-supply = <&vdda_mipi_dsi0_1p2>;
#address-cells = <1>;
#size-cells = <0>;
/*
* Both devices use different panels but all other properties
* are common. Compatible line is declared in device dts.
@ -362,7 +363,13 @@
<GCC_LPASS_SWAY_CLK>;
};
&gmu {
status = "okay";
};
&gpu {
status = "okay";
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/oneplus6/a630_zap.mbn";
@ -415,10 +422,6 @@
status = "okay";
};
&mdss_mdp {
status = "okay";
};
/* Modem/wifi*/
&mss_pil {
status = "okay";
@ -641,12 +644,17 @@
};
};
&venus {
status = "okay";
};
&wifi {
status = "okay";
vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
qcom,snoc-host-cap-8bit-quirk;
};

1
arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts
View File

@ -10,6 +10,7 @@
/ {
model = "OnePlus 6";
compatible = "oneplus,enchilada", "qcom,sdm845";
chassis-type = "handset";
};
&display_panel {

1
arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts
View File

@ -10,6 +10,7 @@
/ {
model = "OnePlus 6T";
compatible = "oneplus,fajita", "qcom,sdm845";
chassis-type = "handset";
};
&display_panel {

19
arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium.dts
View File

@ -2,7 +2,6 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/sound/qcom,q6afe.h>
@ -29,6 +28,7 @@
/ {
model = "Xiaomi Pocophone F1";
compatible = "xiaomi,beryllium", "qcom,sdm845";
chassis-type = "handset";
/* required for bootloader to select correct board */
qcom,board-id = <69 0>;
@ -215,9 +215,6 @@
status = "okay";
vdda-supply = <&vreg_l26a_1p2>;
#address-cells = <1>;
#size-cells = <0>;
panel@0 {
compatible = "tianma,fhd-video";
reg = <0>;
@ -256,7 +253,13 @@
<GCC_LPASS_SWAY_CLK>;
};
&gmu {
status = "okay";
};
&gpu {
status = "okay";
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/a630_zap.mbn";
@ -284,10 +287,6 @@
status = "okay";
};
&mdss_mdp {
status = "okay";
};
&mss_pil {
status = "okay";
firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mdt";
@ -513,6 +512,10 @@
vdda-pll-supply = <&vreg_l1a_0p875>;
};
&venus {
status = "okay";
};
&wcd9340{
pinctrl-0 = <&wcd_intr_default>;
pinctrl-names = "default";

61
arch/arm64/boot/dts/qcom/sdm845.dtsi
View File

@ -12,6 +12,7 @@
#include <dt-bindings/clock/qcom,lpass-sdm845.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,videocc-sdm845.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sdm845.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@ -99,9 +100,11 @@
no-map;
};
smem_mem: memory@86000000 {
smem@86000000 {
compatible = "qcom,smem";
reg = <0x0 0x86000000 0 0x200000>;
no-map;
hwlocks = <&tcsr_mutex 3>;
};
tz_mem: memory@86200000 {
@ -940,12 +943,6 @@
#hwlock-cells = <1>;
};
smem {
compatible = "qcom,smem";
memory-region = <&smem_mem>;
hwlocks = <&tcsr_mutex 3>;
};
smp2p-cdsp {
compatible = "qcom,smp2p";
qcom,smem = <94>, <432>;
@ -1994,10 +1991,10 @@
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
<0 0 0 2 &intc 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
<0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
<0 0 0 4 &intc 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
<0 0 0 2 &intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
<0 0 0 3 &intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
<0 0 0 4 &intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
<&gcc GCC_PCIE_0_AUX_CLK>,
@ -2063,7 +2060,7 @@
status = "disabled";
pcie0_lane: lanes@1c06200 {
pcie0_lane: phy@1c06200 {
reg = <0 0x01c06200 0 0x128>,
<0 0x01c06400 0 0x1fc>,
<0 0x01c06800 0 0x218>,
@ -2099,10 +2096,10 @@
interrupt-names = "msi";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
<0 0 0 2 &intc 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
<0 0 0 3 &intc 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
<0 0 0 4 &intc 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
<0 0 0 2 &intc 0 0 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
<0 0 0 3 &intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
<0 0 0 4 &intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,
<&gcc GCC_PCIE_1_AUX_CLK>,
@ -2173,7 +2170,7 @@
status = "disabled";
pcie1_lane: lanes@1c06200 {
pcie1_lane: phy@1c06200 {
reg = <0 0x01c0a800 0 0x800>,
<0 0x01c0a800 0 0x800>,
<0 0x01c0b800 0 0x400>;
@ -2301,7 +2298,7 @@
reset-names = "ufsphy";
status = "disabled";
ufs_mem_phy_lanes: lanes@1d87400 {
ufs_mem_phy_lanes: phy@1d87400 {
reg = <0 0x01d87400 0 0x108>,
<0 0x01d87600 0 0x1e0>,
<0 0x01d87c00 0 0x1dc>,
@ -2330,7 +2327,7 @@
compatible = "qcom,crypto-v5.4";
reg = <0 0x01dfa000 0 0x6000>;
clocks = <&gcc GCC_CE1_AHB_CLK>,
<&gcc GCC_CE1_AHB_CLK>,
<&gcc GCC_CE1_AXI_CLK>,
<&rpmhcc RPMH_CE_CLK>;
clock-names = "iface", "bus", "core";
dmas = <&cryptobam 6>, <&cryptobam 7>;
@ -2999,6 +2996,8 @@
<&rpmhpd SDM845_MSS>;
power-domain-names = "cx", "mx", "mss";
status = "disabled";
mba {
memory-region = <&mba_region>;
};
@ -3497,8 +3496,9 @@
interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC2_AHB_CLK>,
<&gcc GCC_SDCC2_APPS_CLK>;
clock-names = "iface", "core";
<&gcc GCC_SDCC2_APPS_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "core", "xo";
iommus = <&apps_smmu 0xa0 0xf>;
power-domains = <&rpmhpd SDM845_CX>;
operating-points-v2 = <&sdhc2_opp_table>;
@ -3707,7 +3707,6 @@
compatible = "qcom,sdm845-qmp-usb3-phy";
reg = <0 0x088e9000 0 0x18c>,
<0 0x088e8000 0 0x10>;
reg-names = "reg-base", "dp_com";
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
@ -3723,7 +3722,7 @@
<&gcc GCC_USB3_PHY_PRIM_BCR>;
reset-names = "phy", "common";
usb_1_ssphy: lanes@88e9200 {
usb_1_ssphy: phy@88e9200 {
reg = <0 0x088e9200 0 0x128>,
<0 0x088e9400 0 0x200>,
<0 0x088e9c00 0 0x218>,
@ -3756,7 +3755,7 @@
<&gcc GCC_USB3_PHY_SEC_BCR>;
reset-names = "phy", "common";
usb_2_ssphy: lane@88eb200 {
usb_2_ssphy: phy@88eb200 {
reg = <0 0x088eb200 0 0x128>,
<0 0x088eb400 0 0x1fc>,
<0 0x088eb800 0 0x218>,
@ -3892,6 +3891,8 @@
<&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_VENUS_CFG 0>;
interconnect-names = "video-mem", "cpu-cfg";
status = "disabled";
video-core0 {
compatible = "venus-decoder";
};
@ -4218,8 +4219,6 @@
interrupt-parent = <&mdss>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
@ -4295,6 +4294,9 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
@ -4364,6 +4366,9 @@
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
@ -4426,6 +4431,8 @@
interconnects = <&mem_noc MASTER_GFX3D 0 &mem_noc SLAVE_EBI1 0>;
interconnect-names = "gfx-mem";
status = "disabled";
gpu_opp_table: opp-table {
compatible = "operating-points-v2";
@ -4521,6 +4528,8 @@
operating-points-v2 = <&gmu_opp_table>;
status = "disabled";
gmu_opp_table: opp-table {
compatible = "operating-points-v2";

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