Memory controller drivers for v6.1
1. Fix OF node refcount leaks in pl353-smc and generic of_memory code. 2. Add support for FPGA DFL EMIF revision 1. 3. Update bindings for Mediatek SMI mt8195. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmMbW5QQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD11CxD/992ntdk/JB4l1CnWpLwyObMtgp69urBYeD pehDV/LpUCoKjuNZg+zXPVVEGoGX4xJSMNYJ/IsVJIpRvXCjI5qh5q6JLwJCSEvF 15EMJGMtF+WEVas9dK/ynAFNCWNOJc3fKzRnEZ3PR8FmZ1p14Osck3T4obZ6mk8t RL7LJ4eT4T7c7HXwgOgc4yVd0VuRAEQNGqu2Jjgs2/QAhv6h59fJsT3nf85BuVd8 KIsGr+ek2z4slmoRGodkrhNNiXZIdtTVeFFqprXL8bm1JmpJ/CJgtrpMdpy7NUWx gnzAtR0KKIqjnhK3tdusFfVwQ9Eke8CWIe7tiNoHMkRMKLYy4hqEkDijx03r1pHl Y9DnmbJBFtWO8Ba8MhwxhxU22z3CoeAwnXlzad3IjHD6WZ0AzPb2/C0Nfu/9FWxY xjRbtrtai+NXGukniuHaNBca+82yycgInFD13hOe3k7mcN4sFMLXbpYJxS6H2pST aojgNMsrEhx2IYR2qzNeVRZfExxo8Vxc7OHaz2K2d3ZAcxrsBFdsNy1zDH+NjjV+ plfxV5Bq3d9+cELRLSQlaqKti5XGk3G6lL/O5tpsueiRovq249gX9CIDAQz5XSmO Ty4Ay8dn7aoqdBTLiGyyRBQiqYF3Rk3GosRcTC3QSiVjL0YzdmIcmMUorRxvKStM CuGI3RZv4g== =x0OF -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMfRRIACgkQmmx57+YA GNllTQ//WVSXeS1/9QFOeafX1EVnYPEecNa+SPJozZ7lyyYqoZIjyBiworOYIb7h Fl52xfBjpdkSPucS/lpt8lLwfZZRTbZErSPrQtijN5+oBMxvbRneNBY3RswxrMwU MC1Q8ao/6ld549UyJ98KvgR14RAmgS29blGgq/UuOPrCja7ysz48aUe6LgDOZ7Qg cFpW/dGnHhjAy/5fAuotHFUlcYdC8nTjj88ICgbVn5bHTEkC9llBTtZ5LjrTtAVM J9tYisE2Lx5kKErGKkrRPcfNZEmuzXs8gokRC8VKB8Lokpd8xmcCBKqOKAHO6/ll bCTY1YZUefIbrQwHp64YlI71TD81iEgZw7TsTIPAFLc8403N+fWngWIA8pdUd4P2 bpfWqQdY/vTttlqKnOU/CXHP6h0DZJiGpM7LqDkhtJFbqyD2fkOWU3Ka8le1GoHt VlbDbHCo9i0rR8Be5do6g0fGCWS/ywVXuUEEgL+ePPA4j+nkUMPkDrRcIR58QUyP tDOsLGtIsNicy+6O5qN8yoDMEoaJOkT4g59v/sY8N/8CTpTOxObI03RBValaBVhy dCLFwxMz+0K4Dg1WzDh1hn3jZDINEyUTGHC8xFc8hBAo57xK4VJqH4j2TcXV/gLa RMjuAsdh5oUgX+6VJq+0ZtZdVnt6BGDAz2m2PKoBheBziuc5NZ4= =aVWV -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v6.1 1. Fix OF node refcount leaks in pl353-smc and generic of_memory code. 2. Add support for FPGA DFL EMIF revision 1. 3. Update bindings for Mediatek SMI mt8195. * tag 'memory-controller-drv-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: dt-bindings: memory: mediatek,smi: Update condition for mt8195 smi node memory: of: Fix refcount leak bug in of_lpddr3_get_ddr_timings() memory: of: Fix refcount leak bug in of_get_ddr_timings() memory: dfl-emif: Update the dfl emif driver support revision 1 memory: pl353-smc: Fix refcount leak bug in pl353_smc_probe() Link: https://lore.kernel.org/r/20220909153037.824092-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
d551bdf349
@ -144,7 +144,16 @@ allOf:
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- const: gals0
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- const: gals1
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else: # for gen2 HW that don't have gals
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- if: # for gen2 HW that don't have gals
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properties:
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compatible:
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enum:
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- mediatek,mt2712-smi-common
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- mediatek,mt6795-smi-common
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- mediatek,mt8167-smi-common
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- mediatek,mt8173-smi-common
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then:
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properties:
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clocks:
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minItems: 2
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@ -24,11 +24,24 @@
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#define EMIF_STAT_CLEAR_BUSY_SFT 16
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#define EMIF_CTRL 0x10
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#define EMIF_CTRL_CLEAR_EN_SFT 0
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#define EMIF_CTRL_CLEAR_EN_MSK GENMASK_ULL(3, 0)
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#define EMIF_CTRL_CLEAR_EN_MSK GENMASK_ULL(7, 0)
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#define EMIF_POLL_INVL 10000 /* us */
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#define EMIF_POLL_TIMEOUT 5000000 /* us */
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/*
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* The Capability Register replaces the Control Register (at the same
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* offset) for EMIF feature revisions > 0. The bitmask that indicates
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* the presence of memory channels exists in both the Capability Register
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* and Control Register definitions. These can be thought of as a C union.
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* The Capability Register definitions are used to check for the existence
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* of a memory channel, and the Control Register definitions are used for
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* managing the memory-clear functionality in revision 0.
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*/
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#define EMIF_CAPABILITY_BASE 0x10
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#define EMIF_CAPABILITY_CHN_MSK_V0 GENMASK_ULL(3, 0)
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#define EMIF_CAPABILITY_CHN_MSK GENMASK_ULL(7, 0)
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struct dfl_emif {
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struct device *dev;
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void __iomem *base;
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@ -106,16 +119,30 @@ emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 0);
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emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 1);
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emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 2);
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emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 3);
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emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 4);
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emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 5);
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emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 6);
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emif_state_attr(init_done, EMIF_STAT_INIT_DONE_SFT, 7);
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emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 0);
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emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 1);
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emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 2);
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emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 3);
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emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 4);
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emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 5);
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emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 6);
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emif_state_attr(cal_fail, EMIF_STAT_CALC_FAIL_SFT, 7);
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emif_clear_attr(0);
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emif_clear_attr(1);
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emif_clear_attr(2);
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emif_clear_attr(3);
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emif_clear_attr(4);
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emif_clear_attr(5);
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emif_clear_attr(6);
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emif_clear_attr(7);
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static struct attribute *dfl_emif_attrs[] = {
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&emif_attr_inf0_init_done.attr.attr,
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@ -134,6 +161,22 @@ static struct attribute *dfl_emif_attrs[] = {
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&emif_attr_inf3_cal_fail.attr.attr,
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&emif_attr_inf3_clear.attr.attr,
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&emif_attr_inf4_init_done.attr.attr,
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&emif_attr_inf4_cal_fail.attr.attr,
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&emif_attr_inf4_clear.attr.attr,
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&emif_attr_inf5_init_done.attr.attr,
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&emif_attr_inf5_cal_fail.attr.attr,
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&emif_attr_inf5_clear.attr.attr,
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&emif_attr_inf6_init_done.attr.attr,
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&emif_attr_inf6_cal_fail.attr.attr,
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&emif_attr_inf6_clear.attr.attr,
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&emif_attr_inf7_init_done.attr.attr,
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&emif_attr_inf7_cal_fail.attr.attr,
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&emif_attr_inf7_clear.attr.attr,
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NULL,
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};
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@ -143,15 +186,24 @@ static umode_t dfl_emif_visible(struct kobject *kobj,
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struct dfl_emif *de = dev_get_drvdata(kobj_to_dev(kobj));
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struct emif_attr *eattr = container_of(attr, struct emif_attr,
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attr.attr);
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struct dfl_device *ddev = to_dfl_dev(de->dev);
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u64 val;
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/*
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* This device supports upto 4 memory interfaces, but not all
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* This device supports up to 8 memory interfaces, but not all
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* interfaces are used on different platforms. The read out value of
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* CLEAN_EN field (which is a bitmap) could tell how many interfaces
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* are available.
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* CAPABILITY_CHN_MSK field (which is a bitmap) indicates which
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* interfaces are available.
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*/
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val = FIELD_GET(EMIF_CTRL_CLEAR_EN_MSK, readq(de->base + EMIF_CTRL));
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if (ddev->revision > 0 && strstr(attr->name, "_clear"))
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return 0;
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if (ddev->revision == 0)
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val = FIELD_GET(EMIF_CAPABILITY_CHN_MSK_V0,
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readq(de->base + EMIF_CAPABILITY_BASE));
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else
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val = FIELD_GET(EMIF_CAPABILITY_CHN_MSK,
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readq(de->base + EMIF_CAPABILITY_BASE));
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return (val & BIT_ULL(eattr->index)) ? attr->mode : 0;
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}
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@ -134,6 +134,7 @@ const struct lpddr2_timings *of_get_ddr_timings(struct device_node *np_ddr,
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for_each_child_of_node(np_ddr, np_tim) {
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if (of_device_is_compatible(np_tim, tim_compat)) {
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if (of_do_get_timings(np_tim, &timings[i])) {
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of_node_put(np_tim);
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devm_kfree(dev, timings);
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goto default_timings;
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}
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@ -284,6 +285,7 @@ const struct lpddr3_timings
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if (of_device_is_compatible(np_tim, tim_compat)) {
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if (of_lpddr3_do_get_timings(np_tim, &timings[i])) {
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devm_kfree(dev, timings);
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of_node_put(np_tim);
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goto default_timings;
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}
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i++;
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@ -122,6 +122,7 @@ static int pl353_smc_probe(struct amba_device *adev, const struct amba_id *id)
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}
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of_platform_device_create(child, NULL, &adev->dev);
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of_node_put(child);
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return 0;
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