forked from Minki/linux
Merge branch 'pci/irq-fixups' into next
* pci/irq-fixups: PCI: Inline and remove pcibios_update_irq() PCI: Remove unused pci_fixup_irqs() function sparc/PCI: Replace pci_fixup_irqs() call with host bridge IRQ mapping hooks unicore32/PCI: Replace pci_fixup_irqs() call with host bridge IRQ mapping hooks tile/PCI: Replace pci_fixup_irqs() call with host bridge IRQ mapping hooks MIPS: PCI: Replace pci_fixup_irqs() call with host bridge IRQ mapping hooks m68k/PCI: Replace pci_fixup_irqs() call with host bridge IRQ mapping hooks alpha/PCI: Replace pci_fixup_irqs() call with host bridge IRQ mapping hooks sh/PCI: Replace pci_fixup_irqs() call with host bridge IRQ mapping hooks sh/PCI: Remove __init optimisations from IRQ mapping functions/data MIPS: PCI: Fix pcibios_scan_bus() NULL check code path
This commit is contained in:
commit
d4fdf844c9
arch
alpha/kernel
m68k/coldfire
mips/pci
sh/drivers/pci
fixups-cayman.cfixups-dreamcast.cfixups-r7780rp.cfixups-rts7751r2d.cfixups-sdk7780.cfixups-se7751.cfixups-sh03.cfixups-snapgear.cfixups-titan.cpci.cpcie-sh7786.c
sparc/kernel
tile/kernel
unicore32/kernel
drivers/pci
include/linux
@ -312,8 +312,9 @@ common_init_pci(void)
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{
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struct pci_controller *hose;
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struct list_head resources;
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struct pci_host_bridge *bridge;
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struct pci_bus *bus;
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int next_busno;
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int ret, next_busno;
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int need_domain_info = 0;
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u32 pci_mem_end;
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u32 sg_base;
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@ -336,11 +337,25 @@ common_init_pci(void)
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pci_add_resource_offset(&resources, hose->mem_space,
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hose->mem_space->start);
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bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops,
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hose, &resources);
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if (!bus)
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bridge = pci_alloc_host_bridge(0);
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if (!bridge)
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continue;
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hose->bus = bus;
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list_splice_init(&resources, &bridge->windows);
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bridge->dev.parent = NULL;
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bridge->sysdata = hose;
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bridge->busnr = next_busno;
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bridge->ops = alpha_mv.pci_ops;
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bridge->swizzle_irq = alpha_mv.pci_swizzle;
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bridge->map_irq = alpha_mv.pci_map_irq;
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ret = pci_scan_root_bus_bridge(bridge);
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if (ret) {
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pci_free_host_bridge(bridge);
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continue;
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}
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bus = hose->bus = bridge->bus;
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hose->need_domain_info = need_domain_info;
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next_busno = bus->busn_res.end + 1;
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/* Don't allow 8-bit bus number overflow inside the hose -
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@ -354,7 +369,6 @@ common_init_pci(void)
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pcibios_claim_console_setup();
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pci_assign_unassigned_resources();
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pci_fixup_irqs(alpha_mv.pci_swizzle, alpha_mv.pci_map_irq);
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for (hose = hose_head; hose; hose = hose->next) {
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bus = hose->bus;
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if (bus)
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@ -362,7 +376,6 @@ common_init_pci(void)
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}
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}
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struct pci_controller * __init
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alloc_pci_controller(void)
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{
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@ -194,22 +194,46 @@ static struct resource irongate_mem = {
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.name = "Irongate PCI MEM",
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.flags = IORESOURCE_MEM,
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};
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static struct resource busn_resource = {
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.name = "PCI busn",
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.start = 0,
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.end = 255,
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.flags = IORESOURCE_BUS,
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};
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void __init
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nautilus_init_pci(void)
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{
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struct pci_controller *hose = hose_head;
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struct pci_host_bridge *bridge;
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struct pci_bus *bus;
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struct pci_dev *irongate;
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unsigned long bus_align, bus_size, pci_mem;
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unsigned long memtop = max_low_pfn << PAGE_SHIFT;
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int ret;
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/* Scan our single hose. */
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bus = pci_scan_bus(0, alpha_mv.pci_ops, hose);
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if (!bus)
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bridge = pci_alloc_host_bridge(0);
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if (!bridge)
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return;
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hose->bus = bus;
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pci_add_resource(&bridge->windows, &ioport_resource);
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pci_add_resource(&bridge->windows, &iomem_resource);
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pci_add_resource(&bridge->windows, &busn_resource);
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bridge->dev.parent = NULL;
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bridge->sysdata = hose;
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bridge->busnr = 0;
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bridge->ops = alpha_mv.pci_ops;
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bridge->swizzle_irq = alpha_mv.pci_swizzle;
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bridge->map_irq = alpha_mv.pci_map_irq;
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/* Scan our single hose. */
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ret = pci_scan_root_bus_bridge(bridge);
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if (ret) {
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pci_free_host_bridge(bridge);
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return;
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}
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bus = hose->bus = bridge->bus;
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pcibios_claim_one_bus(bus);
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irongate = pci_get_bus_and_slot(0, 0);
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@ -254,7 +278,6 @@ nautilus_init_pci(void)
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/* pci_common_swizzle() relies on bus->self being NULL
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for the root bus, so just clear it. */
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bus->self = NULL;
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pci_fixup_irqs(alpha_mv.pci_swizzle, alpha_mv.pci_map_irq);
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pci_bus_add_devices(bus);
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}
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@ -243,6 +243,13 @@ static struct resource mcf_pci_io = {
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.flags = IORESOURCE_IO,
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};
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static struct resource busn_resource = {
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.name = "PCI busn",
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.start = 0,
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.end = 255,
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.flags = IORESOURCE_BUS,
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};
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/*
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* Interrupt mapping and setting.
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*/
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@ -258,6 +265,13 @@ static int mcf_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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static int __init mcf_pci_init(void)
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{
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struct pci_host_bridge *bridge;
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int ret;
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bridge = pci_alloc_host_bridge(0);
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if (!bridge)
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return -ENOMEM;
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pr_info("ColdFire: PCI bus initialization...\n");
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/* Reset the external PCI bus */
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@ -312,14 +326,28 @@ static int __init mcf_pci_init(void)
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set_current_state(TASK_UNINTERRUPTIBLE);
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schedule_timeout(msecs_to_jiffies(200));
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rootbus = pci_scan_bus(0, &mcf_pci_ops, NULL);
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if (!rootbus)
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return -ENODEV;
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pci_add_resource(&bridge->windows, &ioport_resource);
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pci_add_resource(&bridge->windows, &iomem_resource);
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pci_add_resource(&bridge->windows, &busn_resource);
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bridge->dev.parent = NULL;
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bridge->sysdata = NULL;
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bridge->busnr = 0;
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bridge->ops = &mcf_pci_ops;
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bridge->swizzle_irq = pci_common_swizzle;
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bridge->map_irq = mcf_pci_map_irq;
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ret = pci_scan_root_bus_bridge(bridge);
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if (ret) {
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pci_free_host_bridge(bridge);
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return ret;
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}
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rootbus = bridge->bus;
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rootbus->resource[0] = &mcf_pci_io;
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rootbus->resource[1] = &mcf_pci_mem;
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pci_fixup_irqs(pci_common_swizzle, mcf_pci_map_irq);
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pci_bus_size_bridges(rootbus);
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pci_bus_assign_resources(rootbus);
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pci_bus_add_devices(rootbus);
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@ -78,6 +78,12 @@ static void pcibios_scanbus(struct pci_controller *hose)
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static int need_domain_info;
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LIST_HEAD(resources);
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struct pci_bus *bus;
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struct pci_host_bridge *bridge;
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int ret;
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bridge = pci_alloc_host_bridge(0);
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if (!bridge)
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return;
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if (hose->get_busno && pci_has_flag(PCI_PROBE_ONLY))
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next_busno = (*hose->get_busno)();
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@ -87,18 +93,24 @@ static void pcibios_scanbus(struct pci_controller *hose)
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pci_add_resource_offset(&resources,
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hose->io_resource, hose->io_offset);
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pci_add_resource(&resources, hose->busn_resource);
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bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
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&resources);
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hose->bus = bus;
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list_splice_init(&resources, &bridge->windows);
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bridge->dev.parent = NULL;
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bridge->sysdata = hose;
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bridge->busnr = next_busno;
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bridge->ops = hose->pci_ops;
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bridge->swizzle_irq = pci_common_swizzle;
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bridge->map_irq = pcibios_map_irq;
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ret = pci_scan_root_bus_bridge(bridge);
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if (ret) {
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pci_free_host_bridge(bridge);
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return;
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}
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hose->bus = bus = bridge->bus;
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need_domain_info = need_domain_info || pci_domain_nr(bus);
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set_pci_need_domain_info(hose, need_domain_info);
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if (!bus) {
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pci_free_resource_list(&resources);
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return;
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}
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next_busno = bus->busn_res.end + 1;
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/* Don't allow 8-bit bus number overflow inside the hose -
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reserve some space for bridges. */
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@ -224,8 +236,6 @@ static int __init pcibios_init(void)
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list_for_each_entry(hose, &controllers, list)
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pcibios_scanbus(hose);
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pci_fixup_irqs(pci_common_swizzle, pcibios_map_irq);
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pci_initialized = 1;
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return 0;
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@ -5,7 +5,7 @@
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#include <cpu/irq.h>
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#include "pci-sh5.h"
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int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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int result = -1;
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@ -76,7 +76,7 @@ static void gapspci_fixup_resources(struct pci_dev *dev)
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, gapspci_fixup_resources);
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int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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/*
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* The interrupt routing semantics here are quite trivial.
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@ -15,7 +15,7 @@
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#include <linux/sh_intc.h>
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#include "pci-sh4.h"
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int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
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int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
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{
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return evt2irq(0xa20) + slot;
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}
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@ -20,18 +20,18 @@
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#define PCIMCR_MRSET_OFF 0xBFFFFFFF
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#define PCIMCR_RFSH_OFF 0xFFFFFFFB
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static u8 rts7751r2d_irq_tab[] __initdata = {
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static u8 rts7751r2d_irq_tab[] = {
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IRQ_PCI_INTA,
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IRQ_PCI_INTB,
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IRQ_PCI_INTC,
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IRQ_PCI_INTD,
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};
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static char lboxre2_irq_tab[] __initdata = {
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static char lboxre2_irq_tab[] = {
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IRQ_ETH0, IRQ_ETH1, IRQ_INTA, IRQ_INTD,
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};
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int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
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int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
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{
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if (mach_is_lboxre2())
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return lboxre2_irq_tab[slot];
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|
@ -22,7 +22,7 @@
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#define IRQ_INTD evt2irq(0xa80)
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/* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */
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static char sdk7780_irq_tab[4][16] __initdata = {
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static char sdk7780_irq_tab[4][16] = {
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/* INTA */
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{ IRQ_INTA, IRQ_INTD, IRQ_INTC, IRQ_INTD, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1 },
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@ -37,7 +37,7 @@ static char sdk7780_irq_tab[4][16] __initdata = {
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-1, -1, -1 },
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};
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int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
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int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
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||||
{
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return sdk7780_irq_tab[pin-1][slot];
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}
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|
@ -7,7 +7,7 @@
|
||||
#include <linux/sh_intc.h>
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#include "pci-sh4.h"
|
||||
|
||||
int __init pcibios_map_platform_irq(const struct pci_dev *, u8 slot, u8 pin)
|
||||
int pcibios_map_platform_irq(const struct pci_dev *, u8 slot, u8 pin)
|
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{
|
||||
switch (slot) {
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||||
case 0: return evt2irq(0x3a0);
|
||||
|
@ -4,7 +4,7 @@
|
||||
#include <linux/pci.h>
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||||
#include <linux/sh_intc.h>
|
||||
|
||||
int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
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int irq;
|
||||
|
||||
|
@ -19,7 +19,7 @@
|
||||
#include <linux/sh_intc.h>
|
||||
#include "pci-sh4.h"
|
||||
|
||||
int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
|
||||
int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
|
||||
{
|
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int irq = -1;
|
||||
|
||||
|
@ -19,7 +19,7 @@
|
||||
#include <mach/titan.h>
|
||||
#include "pci-sh4.h"
|
||||
|
||||
static char titan_irq_tab[] __initdata = {
|
||||
static char titan_irq_tab[] = {
|
||||
TITAN_IRQ_WAN,
|
||||
TITAN_IRQ_LAN,
|
||||
TITAN_IRQ_MPCIA,
|
||||
@ -27,7 +27,7 @@ static char titan_irq_tab[] __initdata = {
|
||||
TITAN_IRQ_USB,
|
||||
};
|
||||
|
||||
int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
|
||||
int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
|
||||
{
|
||||
int irq = titan_irq_tab[slot];
|
||||
|
||||
|
@ -39,8 +39,12 @@ static void pcibios_scanbus(struct pci_channel *hose)
|
||||
LIST_HEAD(resources);
|
||||
struct resource *res;
|
||||
resource_size_t offset;
|
||||
int i;
|
||||
struct pci_bus *bus;
|
||||
int i, ret;
|
||||
struct pci_host_bridge *bridge;
|
||||
|
||||
bridge = pci_alloc_host_bridge(0);
|
||||
if (!bridge)
|
||||
return;
|
||||
|
||||
for (i = 0; i < hose->nr_resources; i++) {
|
||||
res = hose->resources + i;
|
||||
@ -52,19 +56,26 @@ static void pcibios_scanbus(struct pci_channel *hose)
|
||||
pci_add_resource_offset(&resources, res, offset);
|
||||
}
|
||||
|
||||
bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
|
||||
&resources);
|
||||
hose->bus = bus;
|
||||
list_splice_init(&resources, &bridge->windows);
|
||||
bridge->dev.parent = NULL;
|
||||
bridge->sysdata = hose;
|
||||
bridge->busnr = next_busno;
|
||||
bridge->ops = hose->pci_ops;
|
||||
bridge->swizzle_irq = pci_common_swizzle;
|
||||
bridge->map_irq = pcibios_map_platform_irq;
|
||||
|
||||
ret = pci_scan_root_bus_bridge(bridge);
|
||||
if (ret) {
|
||||
pci_free_host_bridge(bridge);
|
||||
return;
|
||||
}
|
||||
|
||||
hose->bus = bridge->bus;
|
||||
|
||||
need_domain_info = need_domain_info || hose->index;
|
||||
hose->need_domain_info = need_domain_info;
|
||||
|
||||
if (!bus) {
|
||||
pci_free_resource_list(&resources);
|
||||
return;
|
||||
}
|
||||
|
||||
next_busno = bus->busn_res.end + 1;
|
||||
next_busno = hose->bus->busn_res.end + 1;
|
||||
/* Don't allow 8-bit bus number overflow inside the hose -
|
||||
reserve some space for bridges. */
|
||||
if (next_busno > 224) {
|
||||
@ -72,9 +83,9 @@ static void pcibios_scanbus(struct pci_channel *hose)
|
||||
need_domain_info = 1;
|
||||
}
|
||||
|
||||
pci_bus_size_bridges(bus);
|
||||
pci_bus_assign_resources(bus);
|
||||
pci_bus_add_devices(bus);
|
||||
pci_bus_size_bridges(hose->bus);
|
||||
pci_bus_assign_resources(hose->bus);
|
||||
pci_bus_add_devices(hose->bus);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -144,8 +155,6 @@ static int __init pcibios_init(void)
|
||||
for (hose = hose_head; hose; hose = hose->next)
|
||||
pcibios_scanbus(hose);
|
||||
|
||||
pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
|
||||
|
||||
dma_debug_add_bus(&pci_bus_type);
|
||||
|
||||
pci_initialized = 1;
|
||||
|
@ -467,7 +467,7 @@ static int __init pcie_init(struct sh7786_pcie_port *port)
|
||||
return 0;
|
||||
}
|
||||
|
||||
int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
|
||||
int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
|
||||
{
|
||||
return evt2irq(0xae0);
|
||||
}
|
||||
|
@ -25,6 +25,12 @@ void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
|
||||
{
|
||||
LIST_HEAD(resources);
|
||||
struct pci_bus *root_bus;
|
||||
struct pci_host_bridge *bridge;
|
||||
int ret;
|
||||
|
||||
bridge = pci_alloc_host_bridge(0);
|
||||
if (!bridge)
|
||||
return;
|
||||
|
||||
pci_add_resource_offset(&resources, &info->io_space,
|
||||
info->io_space.start - 0x1000);
|
||||
@ -32,15 +38,21 @@ void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
|
||||
info->busn.flags = IORESOURCE_BUS;
|
||||
pci_add_resource(&resources, &info->busn);
|
||||
|
||||
root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info,
|
||||
&resources);
|
||||
if (!root_bus) {
|
||||
pci_free_resource_list(&resources);
|
||||
list_splice_init(&resources, &bridge->windows);
|
||||
bridge->dev.parent = &ofdev->dev;
|
||||
bridge->sysdata = info;
|
||||
bridge->busnr = 0;
|
||||
bridge->ops = info->ops;
|
||||
bridge->swizzle_irq = pci_common_swizzle;
|
||||
bridge->map_irq = info->map_irq;
|
||||
|
||||
ret = pci_scan_root_bus_bridge(bridge);
|
||||
if (ret) {
|
||||
pci_free_host_bridge(bridge);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Setup IRQs of all devices using custom routines */
|
||||
pci_fixup_irqs(pci_common_swizzle, info->map_irq);
|
||||
root_bus = bridge->bus;
|
||||
|
||||
/* Assign devices with resources */
|
||||
pci_assign_unassigned_resources();
|
||||
|
@ -274,6 +274,7 @@ static void fixup_read_and_payload_sizes(void)
|
||||
*/
|
||||
int __init pcibios_init(void)
|
||||
{
|
||||
struct pci_host_bridge *bridge;
|
||||
int i;
|
||||
|
||||
pr_info("PCI: Probing PCI hardware\n");
|
||||
@ -306,16 +307,26 @@ int __init pcibios_init(void)
|
||||
|
||||
pci_add_resource(&resources, &ioport_resource);
|
||||
pci_add_resource(&resources, &iomem_resource);
|
||||
bus = pci_scan_root_bus(NULL, 0, controller->ops,
|
||||
controller, &resources);
|
||||
|
||||
bridge = pci_alloc_host_bridge(0);
|
||||
if (!bridge)
|
||||
break;
|
||||
|
||||
list_splice_init(&resources, &bridge->windows);
|
||||
bridge->dev.parent = NULL;
|
||||
bridge->sysdata = controller;
|
||||
bridge->busnr = 0;
|
||||
bridge->ops = controller->ops;
|
||||
bridge->swizzle_irq = pci_common_swizzle;
|
||||
bridge->map_irq = tile_map_irq;
|
||||
|
||||
pci_scan_root_bus_bridge(bridge);
|
||||
bus = bridge->bus;
|
||||
controller->root_bus = bus;
|
||||
controller->last_busno = bus->busn_res.end;
|
||||
}
|
||||
}
|
||||
|
||||
/* Do machine dependent PCI interrupt routing */
|
||||
pci_fixup_irqs(pci_common_swizzle, tile_map_irq);
|
||||
|
||||
/*
|
||||
* This comes from the generic Linux PCI driver.
|
||||
*
|
||||
|
@ -669,6 +669,7 @@ int __init pcibios_init(void)
|
||||
resource_size_t offset;
|
||||
LIST_HEAD(resources);
|
||||
int next_busno;
|
||||
struct pci_host_bridge *bridge;
|
||||
int i;
|
||||
|
||||
tile_pci_init();
|
||||
@ -881,15 +882,25 @@ int __init pcibios_init(void)
|
||||
controller->mem_offset);
|
||||
pci_add_resource(&resources, &controller->io_space);
|
||||
controller->first_busno = next_busno;
|
||||
bus = pci_scan_root_bus(NULL, next_busno, controller->ops,
|
||||
controller, &resources);
|
||||
|
||||
bridge = pci_alloc_host_bridge(0);
|
||||
if (!bridge)
|
||||
break;
|
||||
|
||||
list_splice_init(&resources, &bridge->windows);
|
||||
bridge->dev.parent = NULL;
|
||||
bridge->sysdata = controller;
|
||||
bridge->busnr = next_busno;
|
||||
bridge->ops = controller->ops;
|
||||
bridge->swizzle_irq = pci_common_swizzle;
|
||||
bridge->map_irq = tile_map_irq;
|
||||
|
||||
pci_scan_root_bus_bridge(bridge);
|
||||
bus = bridge->bus;
|
||||
controller->root_bus = bus;
|
||||
next_busno = bus->busn_res.end + 1;
|
||||
}
|
||||
|
||||
/* Do machine dependent PCI interrupt routing */
|
||||
pci_fixup_irqs(pci_common_swizzle, tile_map_irq);
|
||||
|
||||
/*
|
||||
* This comes from the generic Linux PCI driver.
|
||||
*
|
||||
|
@ -101,7 +101,7 @@ void pci_puv3_preinit(void)
|
||||
writel(readl(PCIBRI_CMD) | PCIBRI_CMD_IO | PCIBRI_CMD_MEM, PCIBRI_CMD);
|
||||
}
|
||||
|
||||
static int __init pci_puv3_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
static int pci_puv3_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
if (dev->bus->number == 0) {
|
||||
#ifdef CONFIG_ARCH_FPGA /* 4 pci slots */
|
||||
@ -252,19 +252,46 @@ void pcibios_fixup_bus(struct pci_bus *bus)
|
||||
}
|
||||
EXPORT_SYMBOL(pcibios_fixup_bus);
|
||||
|
||||
static struct resource busn_resource = {
|
||||
.name = "PCI busn",
|
||||
.start = 0,
|
||||
.end = 255,
|
||||
.flags = IORESOURCE_BUS,
|
||||
};
|
||||
|
||||
static int __init pci_common_init(void)
|
||||
{
|
||||
struct pci_bus *puv3_bus;
|
||||
struct pci_host_bridge *bridge;
|
||||
int ret;
|
||||
|
||||
bridge = pci_alloc_host_bridge(0);
|
||||
if (!bridge)
|
||||
return -ENOMEM;
|
||||
|
||||
pci_puv3_preinit();
|
||||
|
||||
puv3_bus = pci_scan_bus(0, &pci_puv3_ops, NULL);
|
||||
pci_add_resource(&bridge->windows, &ioport_resource);
|
||||
pci_add_resource(&bridge->windows, &iomem_resource);
|
||||
pci_add_resource(&bridge->windows, &busn_resource);
|
||||
bridge->sysdata = NULL;
|
||||
bridge->busnr = 0;
|
||||
bridge->ops = &pci_puv3_ops;
|
||||
bridge->swizzle_irq = pci_common_swizzle;
|
||||
bridge->map_irq = pci_puv3_map_irq;
|
||||
|
||||
/* Scan our single hose. */
|
||||
ret = pci_scan_root_bus_bridge(bridge);
|
||||
if (ret) {
|
||||
pci_free_host_bridge(bridge);
|
||||
return;
|
||||
}
|
||||
|
||||
puv3_bus = bridge->bus;
|
||||
|
||||
if (!puv3_bus)
|
||||
panic("PCI: unable to scan bus!");
|
||||
|
||||
pci_fixup_irqs(pci_common_swizzle, pci_puv3_map_irq);
|
||||
|
||||
pci_bus_size_bridges(puv3_bus);
|
||||
pci_bus_assign_resources(puv3_bus);
|
||||
pci_bus_add_devices(puv3_bus);
|
||||
|
@ -17,12 +17,6 @@
|
||||
#include <linux/cache.h>
|
||||
#include "pci.h"
|
||||
|
||||
void __weak pcibios_update_irq(struct pci_dev *dev, int irq)
|
||||
{
|
||||
dev_dbg(&dev->dev, "assigning IRQ %02d\n", irq);
|
||||
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
|
||||
}
|
||||
|
||||
void pci_assign_irq(struct pci_dev *dev)
|
||||
{
|
||||
u8 pin;
|
||||
@ -65,29 +59,5 @@ void pci_assign_irq(struct pci_dev *dev)
|
||||
|
||||
/* Always tell the device, so the driver knows what is
|
||||
the real IRQ to use; the device does not use it. */
|
||||
pcibios_update_irq(dev, irq);
|
||||
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
|
||||
}
|
||||
|
||||
void pci_fixup_irqs(u8 (*swizzle)(struct pci_dev *, u8 *),
|
||||
int (*map_irq)(const struct pci_dev *, u8, u8))
|
||||
{
|
||||
/*
|
||||
* Implement pci_fixup_irqs() through pci_assign_irq().
|
||||
* This code should be remove eventually, it is a wrapper
|
||||
* around pci_assign_irq() interface to keep current
|
||||
* pci_fixup_irqs() behaviour unchanged on architecture
|
||||
* code still relying on its interface.
|
||||
*/
|
||||
struct pci_dev *dev = NULL;
|
||||
struct pci_host_bridge *hbrg = NULL;
|
||||
|
||||
for_each_pci_dev(dev) {
|
||||
hbrg = pci_find_host_bridge(dev->bus);
|
||||
hbrg->swizzle_irq = swizzle;
|
||||
hbrg->map_irq = map_irq;
|
||||
pci_assign_irq(dev);
|
||||
hbrg->swizzle_irq = NULL;
|
||||
hbrg->map_irq = NULL;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pci_fixup_irqs);
|
||||
|
@ -867,7 +867,6 @@ char *pcibios_setup(char *str);
|
||||
resource_size_t pcibios_align_resource(void *, const struct resource *,
|
||||
resource_size_t,
|
||||
resource_size_t);
|
||||
void pcibios_update_irq(struct pci_dev *, int irq);
|
||||
|
||||
/* Weak but can be overriden by arch */
|
||||
void pci_fixup_cardbus(struct pci_bus *);
|
||||
@ -1183,8 +1182,6 @@ void pci_assign_unassigned_bus_resources(struct pci_bus *bus);
|
||||
void pci_assign_unassigned_root_bus_resources(struct pci_bus *bus);
|
||||
void pdev_enable_device(struct pci_dev *);
|
||||
int pci_enable_resources(struct pci_dev *, int mask);
|
||||
void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
|
||||
int (*)(const struct pci_dev *, u8, u8));
|
||||
void pci_assign_irq(struct pci_dev *dev);
|
||||
struct resource *pci_find_resource(struct pci_dev *dev, struct resource *res);
|
||||
#define HAVE_PCI_REQ_REGIONS 2
|
||||
|
Loading…
Reference in New Issue
Block a user