forked from Minki/linux
Powerdomain fixes and improvements, some GRF compatible properties
and a rk3566 GRF clocksource default setup. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmJ8Q84QHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgT31B/9d8fq4fBg9mkF6s0CtFMzw/KOO0ybaxcmx 6KmIbFPOFJfhgXf1EZOl5S555XiIK4Sj24PQA8ySCnu/8jt9SV3dss5rTnaEiG+b TTxzndBFITLunvqMNa0wSSeGyQP1Hh5Y9QAEQS9Xy+L4Hnn1t+F8dX92JUEHos9E Ox9mPAiTN/dj/FFT8gYTv4gEIwtxf3y0VpwdejeyLkOmIHiwK/Te1nclty9q9aMM 2OQsSZdF0cAV2oxjEaeVoTRowAWqrlY+RF0px12RFAa/CwrNkW57qHCWKfCjfmoI WIJ44bxPWF4OhEG4/sRTYRysklofGRw3dtQSxZlUKbMy9v67pyFU =vglc -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ+JfUACgkQmmx57+YA GNkU7w//ZhChli63CICSuwykKyvgp7esVMmjUZ08WpPHAPrvG/CBKO3QkQbqcixY DTtWNnZau4gOEizOmLn7McvSe3K6f1C3HGtgoNIt7JhQFe0b7zDZ9/xRv7lE/u5a XxnS/0s/JYzkzXsfsSLEvzV+9cgsRQyO5gD3ZlAtPpbHReNCFjcA44Bzk5eoXgY9 ZTL/8yryreHc6cnOiERaKyf3+lTfAXcF6gk0q07psFT61ofl4BwQVNe+esKDiU3l DqekGWDfF0HWLYWmhXqmFPVIgnuRzlbvBpkb6R8QgTxIvopKWeUFs2GoqPKs1bln sVsevaW4GSO138J0K2l+SeeW/KVskSGblZlVEtlQhztD3yOhuVnVabKu+Mc3rNaC LzKgt0qjzddtHGwPMbvQdig/XkgCMIy8ZTPLn73BH8kQGmBORBc+pvTlhsgvXCXc t/4ixo3jOjDo+fRe2/4cNpPOSqj0Wdm8WYGdwuLs6K42EH553MtVFGLOVN45+Dzd 5pwzOf9UaDtOcGDQ0mpJztNKWhAn3j6RyvnLnBqDS+pE1Evf5hu1zvRAXaNNKw7b 9L08VMf27d1eZQqsc3vTBb/M/YNV9zq4DwcaJJCpISCRlDQDqIEUdJSlG3rjV2jo YIL85kEnYnx0iuHJYN24JtymttXykdx8Qsk6M8wFkxu/QC7rWZ8= =M9KR -----END PGP SIGNATURE----- Merge tag 'v5.19-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/drivers Powerdomain fixes and improvements, some GRF compatible properties and a rk3566 GRF clocksource default setup. * tag 'v5.19-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: soc: rockchip: Fix compile-testing SoC drivers soc: rockchip: power-domain: Replace dsb() with smb() soc: rockchip: Clean up Kconfig whitespace soc: rockchip: set dwc3 clock for rk3566 dt-bindings: soc: rockchip: add rk3566-pipe-grf compatible soc: rockchip: pm_domains: Fix typo in comment dt-bindings: soc: rockchip: add naneng combo phy register compatible Link: https://lore.kernel.org/r/3998951.tdWV9SEqCh@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
d4a3b44233
@ -15,6 +15,9 @@ properties:
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- items:
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- enum:
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- rockchip,rk3288-sgrf
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- rockchip,rk3566-pipe-grf
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- rockchip,rk3568-pipe-grf
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- rockchip,rk3568-pipe-phy-grf
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- rockchip,rk3568-usb2phy-grf
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- rockchip,rv1108-usbgrf
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- const: syscon
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@ -22,7 +22,7 @@ obj-y += microchip/
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obj-y += amlogic/
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obj-y += qcom/
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obj-y += renesas/
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obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
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obj-y += rockchip/
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obj-$(CONFIG_SOC_SAMSUNG) += samsung/
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obj-$(CONFIG_SOC_SIFIVE) += sifive/
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obj-y += sunxi/
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@ -23,23 +23,23 @@ config ROCKCHIP_IODOMAIN
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voltage supplied by the regulators.
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config ROCKCHIP_PM_DOMAINS
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bool "Rockchip generic power domain"
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depends on PM
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select PM_GENERIC_DOMAINS
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help
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Say y here to enable power domain support.
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In order to meet high performance and low power requirements, a power
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management unit is designed or saving power when RK3288 in low power
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mode. The RK3288 PMU is dedicated for managing the power of the whole chip.
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bool "Rockchip generic power domain"
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depends on PM
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select PM_GENERIC_DOMAINS
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help
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Say y here to enable power domain support.
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In order to meet high performance and low power requirements, a power
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management unit is designed or saving power when RK3288 in low power
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mode. The RK3288 PMU is dedicated for managing the power of the whole chip.
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If unsure, say N.
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If unsure, say N.
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config ROCKCHIP_DTPM
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tristate "Rockchip DTPM hierarchy"
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depends on DTPM && m
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help
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Describe the hierarchy for the Dynamic Thermal Power
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Management tree on this platform. That will create all the
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power capping capable devices.
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Describe the hierarchy for the Dynamic Thermal Power Management tree
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on this platform. That will create all the power capping capable
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devices.
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endif
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@ -108,6 +108,20 @@ static const struct rockchip_grf_info rk3399_grf __initconst = {
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.num_values = ARRAY_SIZE(rk3399_defaults),
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};
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#define RK3566_GRF_USB3OTG0_CON1 0x0104
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static const struct rockchip_grf_value rk3566_defaults[] __initconst = {
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{ "usb3otg port switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(0, 1, 12) },
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{ "usb3otg clock switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 7) },
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{ "usb3otg disable usb3", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 0) },
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};
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static const struct rockchip_grf_info rk3566_pipegrf __initconst = {
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.values = rk3566_defaults,
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.num_values = ARRAY_SIZE(rk3566_defaults),
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};
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static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
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{
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.compatible = "rockchip,rk3036-grf",
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@ -130,6 +144,9 @@ static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
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}, {
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.compatible = "rockchip,rk3399-grf",
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.data = (void *)&rk3399_grf,
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}, {
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.compatible = "rockchip,rk3566-pipe-grf",
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.data = (void *)&rk3566_pipegrf,
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},
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{ /* sentinel */ },
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};
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@ -178,7 +178,7 @@ static int rockchip_pmu_set_idle_request(struct rockchip_pm_domain *pd,
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regmap_update_bits(pmu->regmap, pmu->info->req_offset,
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pd_info->req_mask, idle ? -1U : 0);
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dsb(sy);
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wmb();
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/* Wait util idle_ack = 1 */
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target_ack = idle ? pd_info->ack_mask : 0;
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@ -285,7 +285,7 @@ static void rockchip_do_pmu_set_power_domain(struct rockchip_pm_domain *pd,
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regmap_update_bits(pmu->regmap, pmu->info->pwr_offset,
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pd->info->pwr_mask, on ? 0 : -1U);
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dsb(sy);
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wmb();
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if (readx_poll_timeout_atomic(rockchip_pmu_domain_is_on, pd, is_on,
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is_on == on, 0, 10000)) {
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@ -1068,9 +1068,9 @@ static struct platform_driver rockchip_pm_domain_driver = {
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.name = "rockchip-pm-domain",
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.of_match_table = rockchip_pm_domain_dt_match,
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/*
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* We can't forcibly eject devices form power domain,
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* so we can't really remove power domains once they
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* were added.
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* We can't forcibly eject devices from the power
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* domain, so we can't really remove power domains
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* once they were added.
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*/
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.suppress_bind_attrs = true,
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},
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