drm/amdgpu: nuke the ih reentrant lock
Interrupts on are non-reentrant on linux. This is just an ancient leftover from radeon where irq processing was kicked of from different places. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
committed by
Alex Deucher
parent
7816e4a98c
commit
d423f5514d
@@ -3284,7 +3284,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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/* mutex initialization are all done here so we
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/* mutex initialization are all done here so we
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* can recall function without having locking issues */
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* can recall function without having locking issues */
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atomic_set(&adev->irq.ih.lock, 0);
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mutex_init(&adev->firmware.mutex);
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mutex_init(&adev->firmware.mutex);
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mutex_init(&adev->pm.mutex);
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mutex_init(&adev->pm.mutex);
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mutex_init(&adev->gfx.gpu_clock_mutex);
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mutex_init(&adev->gfx.gpu_clock_mutex);
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@@ -228,10 +228,6 @@ int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih)
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wptr = amdgpu_ih_get_wptr(adev, ih);
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wptr = amdgpu_ih_get_wptr(adev, ih);
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restart_ih:
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restart_ih:
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/* is somebody else already processing irqs? */
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if (atomic_xchg(&ih->lock, 1))
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return IRQ_NONE;
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DRM_DEBUG("%s: rptr %d, wptr %d\n", __func__, ih->rptr, wptr);
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DRM_DEBUG("%s: rptr %d, wptr %d\n", __func__, ih->rptr, wptr);
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/* Order reading of wptr vs. reading of IH ring data */
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/* Order reading of wptr vs. reading of IH ring data */
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@@ -244,7 +240,6 @@ restart_ih:
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amdgpu_ih_set_rptr(adev, ih);
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amdgpu_ih_set_rptr(adev, ih);
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wake_up_all(&ih->wait_process);
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wake_up_all(&ih->wait_process);
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atomic_set(&ih->lock, 0);
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/* make sure wptr hasn't changed while processing */
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/* make sure wptr hasn't changed while processing */
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wptr = amdgpu_ih_get_wptr(adev, ih);
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wptr = amdgpu_ih_get_wptr(adev, ih);
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@@ -64,7 +64,6 @@ struct amdgpu_ih_ring {
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bool enabled;
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bool enabled;
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unsigned rptr;
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unsigned rptr;
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atomic_t lock;
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struct amdgpu_ih_regs ih_regs;
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struct amdgpu_ih_regs ih_regs;
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/* For waiting on IH processing at checkpoint. */
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/* For waiting on IH processing at checkpoint. */
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