forked from Minki/linux
sh: Hook up remaining IRQ sources for R7780MP FPGA.
Signed-off-by: Masayuki Hosokawa <hosokawa@ace-jp.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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d391c6217d
@ -18,31 +18,44 @@ enum {
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UNUSED = 0,
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/* board specific interrupt sources */
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AX88796, /* Ethernet controller */
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CF, /* Compact Flash */
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PSW, /* Push Switch */
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EXT1, /* EXT1n IRQ */
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EXT4, /* EXT4n IRQ */
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CF, /* Compact Flash */
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TP, /* Touch panel */
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SCIF1, /* FPGA SCIF1 */
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SCIF0, /* FPGA SCIF0 */
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SMBUS, /* SMBUS */
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RTC, /* RTC Alarm */
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AX88796, /* Ethernet controller */
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PSW, /* Push Switch */
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/* external bus connector */
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EXT1, EXT2, EXT4, EXT5, EXT6,
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};
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static struct intc_vect vectors[] __initdata = {
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INTC_IRQ(CF, IRQ_CF),
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INTC_IRQ(PSW, IRQ_PSW),
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INTC_IRQ(TP, IRQ_TP),
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INTC_IRQ(SCIF1, IRQ_SCIF1),
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INTC_IRQ(SCIF0, IRQ_SCIF0),
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INTC_IRQ(SMBUS, IRQ_SMBUS),
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INTC_IRQ(RTC, IRQ_RTC),
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INTC_IRQ(AX88796, IRQ_AX88796),
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INTC_IRQ(EXT1, IRQ_EXT1),
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INTC_IRQ(EXT4, IRQ_EXT4),
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INTC_IRQ(PSW, IRQ_PSW),
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INTC_IRQ(EXT1, IRQ_EXT1), INTC_IRQ(EXT2, IRQ_EXT2),
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INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5),
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INTC_IRQ(EXT6, IRQ_EXT6),
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};
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static struct intc_mask_reg mask_registers[] __initdata = {
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{ 0xa4000000, 0, 16, /* IRLMSK */
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{ 0, 0, 0, 0, CF, 0, 0, 0,
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0, 0, 0, EXT4, 0, EXT1, PSW, AX88796 } },
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{ SCIF0, SCIF1, RTC, 0, CF, 0, TP, SMBUS,
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0, EXT6, EXT5, EXT4, EXT2, EXT1, PSW, AX88796 } },
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};
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static unsigned char irl2irq[HL_NR_IRL] __initdata = {
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0, IRQ_CF, 0, 0,
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0, 0, 0, 0,
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0, IRQ_EXT4, 0, IRQ_EXT1,
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0, IRQ_CF, IRQ_TP, IRQ_SCIF1,
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IRQ_SCIF0, IRQ_SMBUS, IRQ_RTC, IRQ_EXT6,
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IRQ_EXT5, IRQ_EXT4, IRQ_EXT2, IRQ_EXT1,
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0, IRQ_AX88796, IRQ_PSW,
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};
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@ -55,11 +55,11 @@
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#define PA_SCSPTR1 (PA_BCR+0x0524) /* SCIF1 Serial Port control */
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#define PA_SCLSR1 (PA_BCR+0x0528) /* SCIF1 Line Status control */
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#define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */
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#define PA_ICCR (PA_BCR+0x0600) /* Serial control */
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#define PA_SAR (PA_BCR+0x0602) /* Serial Slave control */
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#define PA_MDR (PA_BCR+0x0604) /* Serial Mode control */
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#define PA_ADR1 (PA_BCR+0x0606) /* Serial Address1 control */
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#define PA_DAR1 (PA_BCR+0x0646) /* Serial Data1 control */
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#define PA_SMCR (PA_BCR+0x0600) /* 2-wire Serial control */
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#define PA_SMSMADR (PA_BCR+0x0602) /* 2-wire Serial Slave control */
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#define PA_SMMR (PA_BCR+0x0604) /* 2-wire Serial Mode control */
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#define PA_SMSADR1 (PA_BCR+0x0606) /* 2-wire Serial Address1 control */
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#define PA_SMTRDR1 (PA_BCR+0x0646) /* 2-wire Serial Data1 control */
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#define PA_VERREG (PA_BCR+0x0700) /* FPGA Version Register */
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#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */
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#define PA_PMR (PA_BCR+0x0900) /* */
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@ -107,11 +107,11 @@
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#define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */
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#define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */
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#define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */
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#define PA_ICCR (PA_BCR+0x0500) /* Serial control */
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#define PA_SAR (PA_BCR+0x0502) /* Serial Slave control */
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#define PA_MDR (PA_BCR+0x0504) /* Serial Mode control */
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#define PA_ADR1 (PA_BCR+0x0506) /* Serial Address1 control */
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#define PA_DAR1 (PA_BCR+0x0546) /* Serial Data1 control */
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#define PA_SMCR (PA_BCR+0x0500) /* 2-wire Serial control */
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#define PA_SMSMADR (PA_BCR+0x0502) /* 2-wire Serial Slave control */
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#define PA_SMMR (PA_BCR+0x0504) /* 2-wire Serial Mode control */
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#define PA_SMSADR1 (PA_BCR+0x0506) /* 2-wire Serial Address1 control */
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#define PA_SMTRDR1 (PA_BCR+0x0546) /* 2-wire Serial Data1 control */
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#define PA_VERREG (PA_BCR+0x0600) /* FPGA Version Register */
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#define PA_AX88796L 0xa5800400 /* AX88796L Area */
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@ -190,6 +190,8 @@
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#define IRQ_TP (HL_FPGA_IRQ_BASE + 12)
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#define IRQ_RTC (HL_FPGA_IRQ_BASE + 13)
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#define IRQ_TH_ALERT (HL_FPGA_IRQ_BASE + 14)
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#define IRQ_SCIF0 (HL_FPGA_IRQ_BASE + 15)
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#define IRQ_SCIF1 (HL_FPGA_IRQ_BASE + 16)
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unsigned char *highlander_init_irq_r7780mp(void);
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unsigned char *highlander_init_irq_r7780rp(void);
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