soc: xilinx: vcu: drop coreclk from struct xlnx_vcu
The coreclk field is newer read after being written to xlnx_vcu. Remove the coreclk field from the xlnx_vcu and use a function local variable instead. Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Acked-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/20210121071659.1226489-4-m.tretter@pengutronix.de Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -73,7 +73,6 @@
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* @aclk: axi clock source
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* @logicore_reg_ba: logicore reg base address
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* @vcu_slcr_ba: vcu_slcr Register base address
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* @coreclk: core clock frequency
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*/
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struct xvcu_device {
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struct device *dev;
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@ -81,7 +80,6 @@ struct xvcu_device {
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struct clk *aclk;
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struct regmap *logicore_reg_ba;
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void __iomem *vcu_slcr_ba;
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u32 coreclk;
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};
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static struct regmap_config vcu_settings_regmap_config = {
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@ -358,10 +356,10 @@ static int xvcu_set_vcu_pll_info(struct xvcu_device *xvcu)
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return -EINVAL;
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}
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xvcu->coreclk = pll_clk / divisor_core;
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coreclk = pll_clk / divisor_core;
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mcuclk = pll_clk / divisor_mcu;
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dev_dbg(xvcu->dev, "Actual Ref clock freq is %uHz\n", refclk);
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dev_dbg(xvcu->dev, "Actual Core clock freq is %uHz\n", xvcu->coreclk);
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dev_dbg(xvcu->dev, "Actual Core clock freq is %uHz\n", coreclk);
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dev_dbg(xvcu->dev, "Actual Mcu clock freq is %uHz\n", mcuclk);
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vcu_pll_ctrl &= ~(VCU_PLL_CTRL_FBDIV_MASK << VCU_PLL_CTRL_FBDIV_SHIFT);
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