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irqchip/qcom-pdc: Drop open coded version of __assign_bit()

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The driver uses what looks like an open-coded version of __assign_bit().
Replace it with the real thing.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Maulik Shah <quic_mkshah@quicinc.com>
Link: https://lore.kernel.org/r/20220224101226.88373-6-maz@kernel.org
This commit is contained in:
Marc Zyngier 2022-02-24 10:12:26 +00:00
parent a6aca2f460
commit d2febf6bbe
1 changed files with 2 additions and 5 deletions
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7
drivers/irqchip/qcom-pdc.c
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@ -23,9 +23,6 @@
#define PDC_MAX_GPIO_IRQS 256 #define PDC_MAX_GPIO_IRQS 256
#define CLEAR_INTR(reg, intr) (reg & ~(1 << intr))
#define ENABLE_INTR(reg, intr) (reg | (1 << intr))
#define IRQ_ENABLE_BANK 0x10 #define IRQ_ENABLE_BANK 0x10
#define IRQ_i_CFG 0x110 #define IRQ_i_CFG 0x110
@ -55,16 +52,16 @@ static u32 pdc_reg_read(int reg, u32 i)
static void pdc_enable_intr(struct irq_data *d, bool on) static void pdc_enable_intr(struct irq_data *d, bool on)
{ {
int pin_out = d->hwirq; int pin_out = d->hwirq;
unsigned long enable;
unsigned long flags; unsigned long flags;
u32 index, mask; u32 index, mask;
u32 enable;
index = pin_out / 32; index = pin_out / 32;
mask = pin_out % 32; mask = pin_out % 32;
raw_spin_lock_irqsave(&pdc_lock, flags); raw_spin_lock_irqsave(&pdc_lock, flags);
enable = pdc_reg_read(IRQ_ENABLE_BANK, index); enable = pdc_reg_read(IRQ_ENABLE_BANK, index);
enable = on ? ENABLE_INTR(enable, mask) : CLEAR_INTR(enable, mask); __assign_bit(mask, &enable, on);
pdc_reg_write(IRQ_ENABLE_BANK, index, enable); pdc_reg_write(IRQ_ENABLE_BANK, index, enable);
raw_spin_unlock_irqrestore(&pdc_lock, flags); raw_spin_unlock_irqrestore(&pdc_lock, flags);
} }