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drm/amdgpu: drop mmRLC_PG_CNTL clear v2

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SMU owns this register so the driver should not set it
to avoid breaking gfxoff.

v2: update description

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
Reviewed-by: Huang Rui <ray.huang at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2018-07-04 17:06:38 +08:00 committed by Alex Deucher
parent b58b65cf7a
commit d26031c113
1 changed files with 0 additions and 3 deletions
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3
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
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@ -2293,9 +2293,6 @@ static int gfx_v9_0_rlc_resume(struct amdgpu_device *adev)
/* disable CG */
WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL, 0);
/* disable PG */
WREG32_SOC15(GC, 0, mmRLC_PG_CNTL, 0);
gfx_v9_0_rlc_reset(adev);
gfx_v9_0_init_pg(adev);