net: dsa: mv88e6xxx: move the Global 2 macros
Move the GLOBAL2_* macros where they belong, in the related global2.h header. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Vivien Didelot
David S. Miller
parent
e097097b27
commit
d23a83f2ae
@ -33,107 +33,6 @@
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#define SMI_CMD_OP_45_READ_DATA_INC ((3 << 10) | SMI_CMD_BUSY)
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#define SMI_DATA 0x01
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#define GLOBAL2_INT_SOURCE 0x00
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#define GLOBAL2_INT_SOURCE_WATCHDOG 15
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#define GLOBAL2_INT_MASK 0x01
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#define GLOBAL2_MGMT_EN_2X 0x02
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#define GLOBAL2_MGMT_EN_0X 0x03
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#define GLOBAL2_FLOW_CONTROL 0x04
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#define GLOBAL2_SWITCH_MGMT 0x05
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#define GLOBAL2_SWITCH_MGMT_USE_DOUBLE_TAG_DATA BIT(15)
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#define GLOBAL2_SWITCH_MGMT_PREVENT_LOOPS BIT(14)
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#define GLOBAL2_SWITCH_MGMT_FLOW_CONTROL_MSG BIT(13)
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#define GLOBAL2_SWITCH_MGMT_FORCE_FLOW_CTRL_PRI BIT(7)
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#define GLOBAL2_SWITCH_MGMT_RSVD2CPU BIT(3)
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#define GLOBAL2_DEVICE_MAPPING 0x06
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#define GLOBAL2_DEVICE_MAPPING_UPDATE BIT(15)
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#define GLOBAL2_DEVICE_MAPPING_TARGET_SHIFT 8
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#define GLOBAL2_DEVICE_MAPPING_PORT_MASK 0x0f
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#define GLOBAL2_TRUNK_MASK 0x07
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#define GLOBAL2_TRUNK_MASK_UPDATE BIT(15)
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#define GLOBAL2_TRUNK_MASK_NUM_SHIFT 12
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#define GLOBAL2_TRUNK_MASK_HASK BIT(11)
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#define GLOBAL2_TRUNK_MAPPING 0x08
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#define GLOBAL2_TRUNK_MAPPING_UPDATE BIT(15)
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#define GLOBAL2_TRUNK_MAPPING_ID_SHIFT 11
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#define GLOBAL2_IRL_CMD 0x09
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#define GLOBAL2_IRL_CMD_BUSY BIT(15)
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#define GLOBAL2_IRL_CMD_OP_INIT_ALL ((0x001 << 12) | GLOBAL2_IRL_CMD_BUSY)
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#define GLOBAL2_IRL_CMD_OP_INIT_SEL ((0x010 << 12) | GLOBAL2_IRL_CMD_BUSY)
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#define GLOBAL2_IRL_CMD_OP_WRITE_SEL ((0x011 << 12) | GLOBAL2_IRL_CMD_BUSY)
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#define GLOBAL2_IRL_CMD_OP_READ_SEL ((0x100 << 12) | GLOBAL2_IRL_CMD_BUSY)
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#define GLOBAL2_IRL_DATA 0x0a
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#define GLOBAL2_PVT_ADDR 0x0b
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#define GLOBAL2_PVT_ADDR_BUSY BIT(15)
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#define GLOBAL2_PVT_ADDR_OP_INIT_ONES ((0x01 << 12) | GLOBAL2_PVT_ADDR_BUSY)
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#define GLOBAL2_PVT_ADDR_OP_WRITE_PVLAN ((0x03 << 12) | GLOBAL2_PVT_ADDR_BUSY)
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#define GLOBAL2_PVT_ADDR_OP_READ ((0x04 << 12) | GLOBAL2_PVT_ADDR_BUSY)
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#define GLOBAL2_PVT_DATA 0x0c
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#define GLOBAL2_SWITCH_MAC 0x0d
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#define GLOBAL2_ATU_STATS 0x0e
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#define GLOBAL2_PRIO_OVERRIDE 0x0f
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#define GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP BIT(7)
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#define GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT 4
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#define GLOBAL2_PRIO_OVERRIDE_FORCE_ARP BIT(3)
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#define GLOBAL2_PRIO_OVERRIDE_ARP_SHIFT 0
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#define GLOBAL2_EEPROM_CMD 0x14
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#define GLOBAL2_EEPROM_CMD_BUSY BIT(15)
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#define GLOBAL2_EEPROM_CMD_OP_WRITE ((0x3 << 12) | GLOBAL2_EEPROM_CMD_BUSY)
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#define GLOBAL2_EEPROM_CMD_OP_READ ((0x4 << 12) | GLOBAL2_EEPROM_CMD_BUSY)
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#define GLOBAL2_EEPROM_CMD_OP_LOAD ((0x6 << 12) | GLOBAL2_EEPROM_CMD_BUSY)
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#define GLOBAL2_EEPROM_CMD_RUNNING BIT(11)
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#define GLOBAL2_EEPROM_CMD_WRITE_EN BIT(10)
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#define GLOBAL2_EEPROM_CMD_ADDR_MASK 0xff
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#define GLOBAL2_EEPROM_DATA 0x15
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#define GLOBAL2_EEPROM_ADDR 0x15 /* 6390, 6341 */
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#define GLOBAL2_PTP_AVB_OP 0x16
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#define GLOBAL2_PTP_AVB_DATA 0x17
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#define GLOBAL2_SMI_PHY_CMD 0x18
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#define GLOBAL2_SMI_PHY_CMD_BUSY BIT(15)
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#define GLOBAL2_SMI_PHY_CMD_EXTERNAL BIT(13)
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#define GLOBAL2_SMI_PHY_CMD_MODE_22 BIT(12)
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#define GLOBAL2_SMI_PHY_CMD_OP_22_WRITE_DATA ((0x1 << 10) | \
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GLOBAL2_SMI_PHY_CMD_MODE_22 | \
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GLOBAL2_SMI_PHY_CMD_BUSY)
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#define GLOBAL2_SMI_PHY_CMD_OP_22_READ_DATA ((0x2 << 10) | \
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GLOBAL2_SMI_PHY_CMD_MODE_22 | \
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GLOBAL2_SMI_PHY_CMD_BUSY)
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#define GLOBAL2_SMI_PHY_CMD_OP_45_WRITE_ADDR ((0x0 << 10) | \
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GLOBAL2_SMI_PHY_CMD_BUSY)
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#define GLOBAL2_SMI_PHY_CMD_OP_45_WRITE_DATA ((0x1 << 10) | \
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GLOBAL2_SMI_PHY_CMD_BUSY)
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#define GLOBAL2_SMI_PHY_CMD_OP_45_READ_DATA ((0x3 << 10) | \
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GLOBAL2_SMI_PHY_CMD_BUSY)
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#define GLOBAL2_SMI_PHY_DATA 0x19
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#define GLOBAL2_SCRATCH_MISC 0x1a
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#define GLOBAL2_SCRATCH_BUSY BIT(15)
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#define GLOBAL2_SCRATCH_REGISTER_SHIFT 8
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#define GLOBAL2_SCRATCH_VALUE_MASK 0xff
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#define GLOBAL2_WDOG_CONTROL 0x1b
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#define GLOBAL2_WDOG_CONTROL_EGRESS_EVENT BIT(7)
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#define GLOBAL2_WDOG_CONTROL_RMU_TIMEOUT BIT(6)
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#define GLOBAL2_WDOG_CONTROL_QC_ENABLE BIT(5)
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#define GLOBAL2_WDOG_CONTROL_EGRESS_HISTORY BIT(4)
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#define GLOBAL2_WDOG_CONTROL_EGRESS_ENABLE BIT(3)
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#define GLOBAL2_WDOG_CONTROL_FORCE_IRQ BIT(2)
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#define GLOBAL2_WDOG_CONTROL_HISTORY BIT(1)
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#define GLOBAL2_WDOG_CONTROL_SWRESET BIT(0)
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#define GLOBAL2_WDOG_UPDATE BIT(15)
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#define GLOBAL2_WDOG_INT_SOURCE (0x00 << 8)
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#define GLOBAL2_WDOG_INT_STATUS (0x10 << 8)
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#define GLOBAL2_WDOG_INT_ENABLE (0x11 << 8)
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#define GLOBAL2_WDOG_EVENT (0x12 << 8)
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#define GLOBAL2_WDOG_HISTORY (0x13 << 8)
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#define GLOBAL2_WDOG_DATA_MASK 0xff
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#define GLOBAL2_WDOG_CUT_THROUGH BIT(3)
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#define GLOBAL2_WDOG_QUEUE_CONTROLLER BIT(2)
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#define GLOBAL2_WDOG_EGRESS BIT(1)
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#define GLOBAL2_WDOG_FORCE_IRQ BIT(0)
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#define GLOBAL2_QOS_WEIGHT 0x1c
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#define GLOBAL2_MISC 0x1d
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#define GLOBAL2_MISC_5_BIT_PORT BIT(14)
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#define MV88E6XXX_N_FID 4096
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/* PVT limits for 4-bit port and 5-bit switch */
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@ -20,8 +20,6 @@
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#include "global1.h" /* for GLOBAL_STATUS_IRQ_DEVICE */
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#include "global2.h"
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#define ADDR_GLOBAL2 0x1c
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static int mv88e6xxx_g2_read(struct mv88e6xxx_chip *chip, int reg, u16 *val)
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{
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return mv88e6xxx_read(chip, ADDR_GLOBAL2, reg, val);
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@ -17,6 +17,109 @@
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#include "chip.h"
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#define ADDR_GLOBAL2 0x1c
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#define GLOBAL2_INT_SOURCE 0x00
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#define GLOBAL2_INT_SOURCE_WATCHDOG 15
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#define GLOBAL2_INT_MASK 0x01
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#define GLOBAL2_MGMT_EN_2X 0x02
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#define GLOBAL2_MGMT_EN_0X 0x03
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#define GLOBAL2_FLOW_CONTROL 0x04
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#define GLOBAL2_SWITCH_MGMT 0x05
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#define GLOBAL2_SWITCH_MGMT_USE_DOUBLE_TAG_DATA BIT(15)
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#define GLOBAL2_SWITCH_MGMT_PREVENT_LOOPS BIT(14)
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#define GLOBAL2_SWITCH_MGMT_FLOW_CONTROL_MSG BIT(13)
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#define GLOBAL2_SWITCH_MGMT_FORCE_FLOW_CTRL_PRI BIT(7)
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#define GLOBAL2_SWITCH_MGMT_RSVD2CPU BIT(3)
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#define GLOBAL2_DEVICE_MAPPING 0x06
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#define GLOBAL2_DEVICE_MAPPING_UPDATE BIT(15)
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#define GLOBAL2_DEVICE_MAPPING_TARGET_SHIFT 8
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#define GLOBAL2_DEVICE_MAPPING_PORT_MASK 0x0f
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#define GLOBAL2_TRUNK_MASK 0x07
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#define GLOBAL2_TRUNK_MASK_UPDATE BIT(15)
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#define GLOBAL2_TRUNK_MASK_NUM_SHIFT 12
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#define GLOBAL2_TRUNK_MASK_HASK BIT(11)
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#define GLOBAL2_TRUNK_MAPPING 0x08
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#define GLOBAL2_TRUNK_MAPPING_UPDATE BIT(15)
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#define GLOBAL2_TRUNK_MAPPING_ID_SHIFT 11
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#define GLOBAL2_IRL_CMD 0x09
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#define GLOBAL2_IRL_CMD_BUSY BIT(15)
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#define GLOBAL2_IRL_CMD_OP_INIT_ALL ((0x001 << 12) | GLOBAL2_IRL_CMD_BUSY)
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#define GLOBAL2_IRL_CMD_OP_INIT_SEL ((0x010 << 12) | GLOBAL2_IRL_CMD_BUSY)
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#define GLOBAL2_IRL_CMD_OP_WRITE_SEL ((0x011 << 12) | GLOBAL2_IRL_CMD_BUSY)
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#define GLOBAL2_IRL_CMD_OP_READ_SEL ((0x100 << 12) | GLOBAL2_IRL_CMD_BUSY)
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#define GLOBAL2_IRL_DATA 0x0a
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#define GLOBAL2_PVT_ADDR 0x0b
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#define GLOBAL2_PVT_ADDR_BUSY BIT(15)
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#define GLOBAL2_PVT_ADDR_OP_INIT_ONES ((0x01 << 12) | GLOBAL2_PVT_ADDR_BUSY)
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#define GLOBAL2_PVT_ADDR_OP_WRITE_PVLAN ((0x03 << 12) | GLOBAL2_PVT_ADDR_BUSY)
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#define GLOBAL2_PVT_ADDR_OP_READ ((0x04 << 12) | GLOBAL2_PVT_ADDR_BUSY)
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#define GLOBAL2_PVT_DATA 0x0c
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#define GLOBAL2_SWITCH_MAC 0x0d
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#define GLOBAL2_ATU_STATS 0x0e
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#define GLOBAL2_PRIO_OVERRIDE 0x0f
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#define GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP BIT(7)
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#define GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT 4
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#define GLOBAL2_PRIO_OVERRIDE_FORCE_ARP BIT(3)
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#define GLOBAL2_PRIO_OVERRIDE_ARP_SHIFT 0
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#define GLOBAL2_EEPROM_CMD 0x14
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#define GLOBAL2_EEPROM_CMD_BUSY BIT(15)
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#define GLOBAL2_EEPROM_CMD_OP_WRITE ((0x3 << 12) | GLOBAL2_EEPROM_CMD_BUSY)
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#define GLOBAL2_EEPROM_CMD_OP_READ ((0x4 << 12) | GLOBAL2_EEPROM_CMD_BUSY)
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#define GLOBAL2_EEPROM_CMD_OP_LOAD ((0x6 << 12) | GLOBAL2_EEPROM_CMD_BUSY)
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#define GLOBAL2_EEPROM_CMD_RUNNING BIT(11)
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#define GLOBAL2_EEPROM_CMD_WRITE_EN BIT(10)
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#define GLOBAL2_EEPROM_CMD_ADDR_MASK 0xff
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#define GLOBAL2_EEPROM_DATA 0x15
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#define GLOBAL2_EEPROM_ADDR 0x15 /* 6390, 6341 */
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#define GLOBAL2_PTP_AVB_OP 0x16
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#define GLOBAL2_PTP_AVB_DATA 0x17
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#define GLOBAL2_SMI_PHY_CMD 0x18
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#define GLOBAL2_SMI_PHY_CMD_BUSY BIT(15)
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#define GLOBAL2_SMI_PHY_CMD_EXTERNAL BIT(13)
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#define GLOBAL2_SMI_PHY_CMD_MODE_22 BIT(12)
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#define GLOBAL2_SMI_PHY_CMD_OP_22_WRITE_DATA ((0x1 << 10) | \
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GLOBAL2_SMI_PHY_CMD_MODE_22 | \
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GLOBAL2_SMI_PHY_CMD_BUSY)
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#define GLOBAL2_SMI_PHY_CMD_OP_22_READ_DATA ((0x2 << 10) | \
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GLOBAL2_SMI_PHY_CMD_MODE_22 | \
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GLOBAL2_SMI_PHY_CMD_BUSY)
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#define GLOBAL2_SMI_PHY_CMD_OP_45_WRITE_ADDR ((0x0 << 10) | \
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GLOBAL2_SMI_PHY_CMD_BUSY)
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#define GLOBAL2_SMI_PHY_CMD_OP_45_WRITE_DATA ((0x1 << 10) | \
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GLOBAL2_SMI_PHY_CMD_BUSY)
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#define GLOBAL2_SMI_PHY_CMD_OP_45_READ_DATA ((0x3 << 10) | \
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GLOBAL2_SMI_PHY_CMD_BUSY)
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#define GLOBAL2_SMI_PHY_DATA 0x19
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#define GLOBAL2_SCRATCH_MISC 0x1a
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#define GLOBAL2_SCRATCH_BUSY BIT(15)
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#define GLOBAL2_SCRATCH_REGISTER_SHIFT 8
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#define GLOBAL2_SCRATCH_VALUE_MASK 0xff
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#define GLOBAL2_WDOG_CONTROL 0x1b
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#define GLOBAL2_WDOG_CONTROL_EGRESS_EVENT BIT(7)
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#define GLOBAL2_WDOG_CONTROL_RMU_TIMEOUT BIT(6)
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#define GLOBAL2_WDOG_CONTROL_QC_ENABLE BIT(5)
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#define GLOBAL2_WDOG_CONTROL_EGRESS_HISTORY BIT(4)
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#define GLOBAL2_WDOG_CONTROL_EGRESS_ENABLE BIT(3)
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#define GLOBAL2_WDOG_CONTROL_FORCE_IRQ BIT(2)
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#define GLOBAL2_WDOG_CONTROL_HISTORY BIT(1)
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#define GLOBAL2_WDOG_CONTROL_SWRESET BIT(0)
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#define GLOBAL2_WDOG_UPDATE BIT(15)
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#define GLOBAL2_WDOG_INT_SOURCE (0x00 << 8)
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#define GLOBAL2_WDOG_INT_STATUS (0x10 << 8)
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#define GLOBAL2_WDOG_INT_ENABLE (0x11 << 8)
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#define GLOBAL2_WDOG_EVENT (0x12 << 8)
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#define GLOBAL2_WDOG_HISTORY (0x13 << 8)
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#define GLOBAL2_WDOG_DATA_MASK 0xff
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#define GLOBAL2_WDOG_CUT_THROUGH BIT(3)
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#define GLOBAL2_WDOG_QUEUE_CONTROLLER BIT(2)
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#define GLOBAL2_WDOG_EGRESS BIT(1)
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#define GLOBAL2_WDOG_FORCE_IRQ BIT(0)
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#define GLOBAL2_QOS_WEIGHT 0x1c
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#define GLOBAL2_MISC 0x1d
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#define GLOBAL2_MISC_5_BIT_PORT BIT(14)
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#ifdef CONFIG_NET_DSA_MV88E6XXX_GLOBAL2
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static inline int mv88e6xxx_g2_require(struct mv88e6xxx_chip *chip)
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