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net: hns3: enable 8~11th bit of mac common msi-x error

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These bits are enabled now and have been test.

Signed-off-by: Weihang Li <liweihang@hisilicon.com>
Signed-off-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Weihang Li 2019-02-20 10:32:46 +08:00 committed by David S. Miller
parent 747fc3f351
commit d1f55d6bfc
2 changed files with 8 additions and 2 deletions
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6
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
View File

@ -219,6 +219,12 @@ static const struct hclge_hw_error hclge_mac_afifo_tnl_int[] = {
{ .int_msk = BIT(5), .msg = "cge_igu_afifo_ecc_mbit_err" },
{ .int_msk = BIT(6), .msg = "lge_igu_afifo_ecc_1bit_err" },
{ .int_msk = BIT(7), .msg = "lge_igu_afifo_ecc_mbit_err" },
{ .int_msk = BIT(8), .msg = "cge_igu_afifo_overflow_err" },
{ .int_msk = BIT(9), .msg = "lge_igu_afifo_overflow_err" },
{ .int_msk = BIT(10), .msg = "egu_cge_afifo_underrun_err" },
{ .int_msk = BIT(11), .msg = "egu_lge_afifo_underrun_err" },
{ .int_msk = BIT(12), .msg = "egu_ge_afifo_underrun_err" },
{ .int_msk = BIT(13), .msg = "ge_igu_afifo_overflow_err" },
{ /* sentinel */ }
};

4
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
View File

@ -45,8 +45,8 @@
#define HCLGE_TM_QCN_MEM_ERR_INT_EN 0xFFFFFF
#define HCLGE_NCSI_ERR_INT_EN 0x3
#define HCLGE_NCSI_ERR_INT_TYPE 0x9
#define HCLGE_MAC_COMMON_ERR_INT_EN GENMASK(7, 0)
#define HCLGE_MAC_COMMON_ERR_INT_EN_MASK GENMASK(7, 0)
#define HCLGE_MAC_COMMON_ERR_INT_EN 0x107FF
#define HCLGE_MAC_COMMON_ERR_INT_EN_MASK 0x107FF
#define HCLGE_PPU_MPF_ABNORMAL_INT0_EN GENMASK(31, 0)
#define HCLGE_PPU_MPF_ABNORMAL_INT0_EN_MASK GENMASK(31, 0)
#define HCLGE_PPU_MPF_ABNORMAL_INT1_EN GENMASK(31, 0)