forked from Minki/linux
drm/amdgpu: move and rename amdgpu_pte_update_params
Move the update parameter into the VM header and rename them. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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072b7a0bd2
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@ -66,51 +66,6 @@ INTERVAL_TREE_DEFINE(struct amdgpu_bo_va_mapping, rb, uint64_t, __subtree_last,
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#undef START
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#undef LAST
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/**
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* struct amdgpu_pte_update_params - Local structure
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*
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* Encapsulate some VM table update parameters to reduce
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* the number of function parameters
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*
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*/
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struct amdgpu_pte_update_params {
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/**
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* @adev: amdgpu device we do this update for
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*/
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struct amdgpu_device *adev;
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/**
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* @vm: optional amdgpu_vm we do this update for
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*/
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struct amdgpu_vm *vm;
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/**
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* @pages_addr:
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*
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* DMA addresses to use for mapping
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*/
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dma_addr_t *pages_addr;
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/**
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* @src: address where to copy page table entries from
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*/
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uint64_t src;
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/**
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* @ib: indirect buffer to fill with commands
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*/
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struct amdgpu_ib *ib;
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/**
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* @func: Function which actually does the update
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*/
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void (*func)(struct amdgpu_pte_update_params *params,
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struct amdgpu_bo *bo, uint64_t pe,
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uint64_t addr, unsigned count, uint32_t incr,
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uint64_t flags);
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};
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/**
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* struct amdgpu_prt_cb - Helper to disable partial resident texture feature from a fence callback
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*/
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@ -1218,7 +1173,7 @@ struct amdgpu_bo_va *amdgpu_vm_bo_find(struct amdgpu_vm *vm,
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/**
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* amdgpu_vm_do_set_ptes - helper to call the right asic function
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*
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* @params: see amdgpu_pte_update_params definition
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* @params: see amdgpu_vm_update_params definition
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* @bo: PD/PT to update
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* @pe: addr of the page entry
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* @addr: dst addr to write into pe
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@ -1229,7 +1184,7 @@ struct amdgpu_bo_va *amdgpu_vm_bo_find(struct amdgpu_vm *vm,
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* Traces the parameters and calls the right asic functions
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* to setup the page table using the DMA.
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*/
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static void amdgpu_vm_do_set_ptes(struct amdgpu_pte_update_params *params,
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static void amdgpu_vm_do_set_ptes(struct amdgpu_vm_update_params *params,
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struct amdgpu_bo *bo,
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uint64_t pe, uint64_t addr,
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unsigned count, uint32_t incr,
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@ -1251,7 +1206,7 @@ static void amdgpu_vm_do_set_ptes(struct amdgpu_pte_update_params *params,
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/**
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* amdgpu_vm_do_copy_ptes - copy the PTEs from the GART
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*
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* @params: see amdgpu_pte_update_params definition
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* @params: see amdgpu_vm_update_params definition
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* @bo: PD/PT to update
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* @pe: addr of the page entry
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* @addr: dst addr to write into pe
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@ -1261,7 +1216,7 @@ static void amdgpu_vm_do_set_ptes(struct amdgpu_pte_update_params *params,
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*
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* Traces the parameters and calls the DMA function to copy the PTEs.
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*/
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static void amdgpu_vm_do_copy_ptes(struct amdgpu_pte_update_params *params,
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static void amdgpu_vm_do_copy_ptes(struct amdgpu_vm_update_params *params,
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struct amdgpu_bo *bo,
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uint64_t pe, uint64_t addr,
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unsigned count, uint32_t incr,
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@ -1305,7 +1260,7 @@ static uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr)
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/**
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* amdgpu_vm_cpu_set_ptes - helper to update page tables via CPU
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*
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* @params: see amdgpu_pte_update_params definition
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* @params: see amdgpu_vm_update_params definition
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* @bo: PD/PT to update
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* @pe: kmap addr of the page entry
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* @addr: dst addr to write into pe
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@ -1315,7 +1270,7 @@ static uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr)
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*
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* Write count number of PT/PD entries directly.
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*/
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static void amdgpu_vm_cpu_set_ptes(struct amdgpu_pte_update_params *params,
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static void amdgpu_vm_cpu_set_ptes(struct amdgpu_vm_update_params *params,
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struct amdgpu_bo *bo,
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uint64_t pe, uint64_t addr,
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unsigned count, uint32_t incr,
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@ -1343,7 +1298,7 @@ static void amdgpu_vm_cpu_set_ptes(struct amdgpu_pte_update_params *params,
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*
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* Calls the update function for both the given BO as well as its shadow.
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*/
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static void amdgpu_vm_update_func(struct amdgpu_pte_update_params *params,
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static void amdgpu_vm_update_func(struct amdgpu_vm_update_params *params,
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struct amdgpu_bo *bo,
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uint64_t pe, uint64_t addr,
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unsigned count, uint32_t incr,
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@ -1364,7 +1319,7 @@ static void amdgpu_vm_update_func(struct amdgpu_pte_update_params *params,
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*
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* Makes sure the requested entry in parent is up to date.
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*/
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static void amdgpu_vm_update_pde(struct amdgpu_pte_update_params *params,
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static void amdgpu_vm_update_pde(struct amdgpu_vm_update_params *params,
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struct amdgpu_vm *vm,
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struct amdgpu_vm_pt *parent,
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struct amdgpu_vm_pt *entry)
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@ -1415,7 +1370,7 @@ static void amdgpu_vm_invalidate_pds(struct amdgpu_device *adev,
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int amdgpu_vm_update_directories(struct amdgpu_device *adev,
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struct amdgpu_vm *vm)
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{
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struct amdgpu_pte_update_params params;
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struct amdgpu_vm_update_params params;
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struct amdgpu_job *job;
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unsigned ndw = 0;
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int r = 0;
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@ -1506,7 +1461,7 @@ error:
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*
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* Make sure to set the right flags for the PTEs at the desired level.
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*/
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static void amdgpu_vm_update_flags(struct amdgpu_pte_update_params *params,
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static void amdgpu_vm_update_flags(struct amdgpu_vm_update_params *params,
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struct amdgpu_bo *bo, unsigned level,
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uint64_t pe, uint64_t addr,
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unsigned count, uint32_t incr,
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@ -1531,7 +1486,7 @@ static void amdgpu_vm_update_flags(struct amdgpu_pte_update_params *params,
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/**
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* amdgpu_vm_fragment - get fragment for PTEs
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*
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* @params: see amdgpu_pte_update_params definition
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* @params: see amdgpu_vm_update_params definition
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* @start: first PTE to handle
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* @end: last PTE to handle
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* @flags: hw mapping flags
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@ -1540,7 +1495,7 @@ static void amdgpu_vm_update_flags(struct amdgpu_pte_update_params *params,
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*
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* Returns the first possible fragment for the start and end address.
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*/
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static void amdgpu_vm_fragment(struct amdgpu_pte_update_params *params,
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static void amdgpu_vm_fragment(struct amdgpu_vm_update_params *params,
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uint64_t start, uint64_t end, uint64_t flags,
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unsigned int *frag, uint64_t *frag_end)
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{
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@ -1592,7 +1547,7 @@ static void amdgpu_vm_fragment(struct amdgpu_pte_update_params *params,
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/**
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* amdgpu_vm_update_ptes - make sure that page tables are valid
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*
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* @params: see amdgpu_pte_update_params definition
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* @params: see amdgpu_vm_update_params definition
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* @start: start of GPU address range
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* @end: end of GPU address range
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* @dst: destination address to map to, the next dst inside the function
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@ -1603,7 +1558,7 @@ static void amdgpu_vm_fragment(struct amdgpu_pte_update_params *params,
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* Returns:
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* 0 for success, -EINVAL for failure.
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*/
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static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,
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static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
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uint64_t start, uint64_t end,
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uint64_t dst, uint64_t flags)
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{
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@ -1746,7 +1701,7 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
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void *owner = AMDGPU_FENCE_OWNER_VM;
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unsigned nptes, ncmds, ndw;
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struct amdgpu_job *job;
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struct amdgpu_pte_update_params params;
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struct amdgpu_vm_update_params params;
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struct dma_fence *f = NULL;
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int r;
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@ -172,6 +172,51 @@ struct amdgpu_task_info {
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pid_t tgid;
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};
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/**
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* struct amdgpu_vm_update_params
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*
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* Encapsulate some VM table update parameters to reduce
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* the number of function parameters
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*
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*/
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struct amdgpu_vm_update_params {
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/**
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* @adev: amdgpu device we do this update for
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*/
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struct amdgpu_device *adev;
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/**
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* @vm: optional amdgpu_vm we do this update for
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*/
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struct amdgpu_vm *vm;
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/**
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* @pages_addr:
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*
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* DMA addresses to use for mapping
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*/
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dma_addr_t *pages_addr;
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/**
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* @src: address where to copy page table entries from
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*/
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uint64_t src;
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/**
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* @ib: indirect buffer to fill with commands
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*/
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struct amdgpu_ib *ib;
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/**
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* @func: Function which actually does the update
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*/
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void (*func)(struct amdgpu_vm_update_params *params,
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struct amdgpu_bo *bo, uint64_t pe,
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uint64_t addr, unsigned count, uint32_t incr,
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uint64_t flags);
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};
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struct amdgpu_vm {
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/* tree of virtual addresses mapped */
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struct rb_root_cached va;
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