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drm/i915/gt: Apply sanitiization just before resume

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Bring sanitization completely underneath the umbrella of intel_gt, and
perform it exclusively after suspend and before the next resume.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Andi Shyti <andi.shyti@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191226111834.2545953-1-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson 2019-12-26 11:18:34 +00:00
parent c2d78a9b73
commit d03b224f42
5 changed files with 14 additions and 29 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/drm/i915/gt/intel_gt.c
View File

@ -38,8 +38,6 @@ void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
void intel_gt_init_hw_early(struct intel_gt *gt, struct i915_ggtt *ggtt) void intel_gt_init_hw_early(struct intel_gt *gt, struct i915_ggtt *ggtt)
{ {
gt->ggtt = ggtt; gt->ggtt = ggtt;
intel_gt_sanitize(gt, false);
} }
static void init_unused_ring(struct intel_gt *gt, u32 base) static void init_unused_ring(struct intel_gt *gt, u32 base)
@ -77,10 +75,6 @@ int intel_gt_init_hw(struct intel_gt *gt)
struct intel_uncore *uncore = gt->uncore; struct intel_uncore *uncore = gt->uncore;
int ret; int ret;
ret = intel_gt_terminally_wedged(gt);
if (ret)
return ret;
gt->last_init_time = ktime_get(); gt->last_init_time = ktime_get();
/* Double layer security blanket, see i915_gem_init() */ /* Double layer security blanket, see i915_gem_init() */

31
drivers/gpu/drm/i915/gt/intel_gt_pm.c
View File

@ -126,17 +126,7 @@ static bool reset_engines(struct intel_gt *gt)
return __intel_gt_reset(gt, ALL_ENGINES) == 0; return __intel_gt_reset(gt, ALL_ENGINES) == 0;
} }
/** static void gt_sanitize(struct intel_gt *gt, bool force)
* intel_gt_sanitize: called after the GPU has lost power
* @gt: the i915 GT container
* @force: ignore a failed reset and sanitize engine state anyway
*
* Anytime we reset the GPU, either with an explicit GPU reset or through a
* PCI power cycle, the GPU loses state and we must reset our state tracking
* to match. Note that calling intel_gt_sanitize() if the GPU has not
* been reset results in much confusion!
*/
void intel_gt_sanitize(struct intel_gt *gt, bool force)
{ {
struct intel_engine_cs *engine; struct intel_engine_cs *engine;
enum intel_engine_id id; enum intel_engine_id id;
@ -189,6 +179,10 @@ int intel_gt_resume(struct intel_gt *gt)
enum intel_engine_id id; enum intel_engine_id id;
int err; int err;
err = intel_gt_terminally_wedged(gt);
if (err)
return err;
GT_TRACE(gt, "\n"); GT_TRACE(gt, "\n");
/* /*
@ -201,14 +195,14 @@ int intel_gt_resume(struct intel_gt *gt)
intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL); intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL);
intel_rc6_sanitize(&gt->rc6); intel_rc6_sanitize(&gt->rc6);
gt_sanitize(gt, true);
/* Only when the HW is re-initialised, can we replay the requests */ /* Only when the HW is re-initialised, can we replay the requests */
err = intel_gt_init_hw(gt); err = intel_gt_init_hw(gt);
if (err) { if (err) {
dev_err(gt->i915->drm.dev, dev_err(gt->i915->drm.dev,
"Failed to initialize GPU, declaring it wedged!\n"); "Failed to initialize GPU, declaring it wedged!\n");
intel_gt_set_wedged(gt); goto err_wedged;
goto err_fw;
} }
intel_rps_enable(&gt->rps); intel_rps_enable(&gt->rps);
@ -233,7 +227,7 @@ int intel_gt_resume(struct intel_gt *gt)
dev_err(gt->i915->drm.dev, dev_err(gt->i915->drm.dev,
"Failed to restart %s (%d)\n", "Failed to restart %s (%d)\n",
engine->name, err); engine->name, err);
break; goto err_wedged;
} }
} }
@ -243,11 +237,14 @@ int intel_gt_resume(struct intel_gt *gt)
user_forcewake(gt, false); user_forcewake(gt, false);
err_fw: out_fw:
intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL); intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL);
intel_gt_pm_put(gt); intel_gt_pm_put(gt);
return err; return err;
err_wedged:
intel_gt_set_wedged(gt);
goto out_fw;
} }
static void wait_for_suspend(struct intel_gt *gt) static void wait_for_suspend(struct intel_gt *gt)
@ -315,7 +312,7 @@ void intel_gt_suspend_late(struct intel_gt *gt)
intel_llc_disable(&gt->llc); intel_llc_disable(&gt->llc);
} }
intel_gt_sanitize(gt, false); gt_sanitize(gt, false);
GT_TRACE(gt, "\n"); GT_TRACE(gt, "\n");
} }

2
drivers/gpu/drm/i915/gt/intel_gt_pm.h
View File

@ -51,8 +51,6 @@ void intel_gt_pm_init_early(struct intel_gt *gt);
void intel_gt_pm_init(struct intel_gt *gt); void intel_gt_pm_init(struct intel_gt *gt);
void intel_gt_pm_fini(struct intel_gt *gt); void intel_gt_pm_fini(struct intel_gt *gt);
void intel_gt_sanitize(struct intel_gt *gt, bool force);
void intel_gt_suspend_prepare(struct intel_gt *gt); void intel_gt_suspend_prepare(struct intel_gt *gt);
void intel_gt_suspend_late(struct intel_gt *gt); void intel_gt_suspend_late(struct intel_gt *gt);
int intel_gt_resume(struct intel_gt *gt); int intel_gt_resume(struct intel_gt *gt);

2
drivers/gpu/drm/i915/i915_drv.c
View File

@ -1817,8 +1817,6 @@ static int i915_drm_resume(struct drm_device *dev)
disable_rpm_wakeref_asserts(&dev_priv->runtime_pm); disable_rpm_wakeref_asserts(&dev_priv->runtime_pm);
intel_gt_sanitize(&dev_priv->gt, true);
ret = i915_ggtt_enable_hw(dev_priv); ret = i915_ggtt_enable_hw(dev_priv);
if (ret) if (ret)
DRM_ERROR("failed to re-enable GGTT\n"); DRM_ERROR("failed to re-enable GGTT\n");

2
drivers/gpu/drm/i915/selftests/i915_gem.c
View File

@ -124,8 +124,6 @@ static void pm_resume(struct drm_i915_private *i915)
* that runtime-pm just works. * that runtime-pm just works.
*/ */
with_intel_runtime_pm(&i915->runtime_pm, wakeref) { with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
intel_gt_sanitize(&i915->gt, false);
i915_gem_restore_gtt_mappings(i915); i915_gem_restore_gtt_mappings(i915);
i915_gem_restore_fences(&i915->ggtt); i915_gem_restore_fences(&i915->ggtt);