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drm/msm/dpu: rename hw_ctl to lm_ctl

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Rename hw_ctl to lm_ctl to mean the ctl associated
with the hw layer mixer block.

sed -i 's/\([*@.>]\)hw_ctl\([^s]\)/\1lm_ctl\2/g' dpu_crtc.c dpu_crtc.h

changes in v4:
	- Specifiy shell command used for renaming (Sean)
changes in v5:
	- none

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Jeykumar Sankaran 2018-09-05 19:08:21 -07:00 committed by Rob Clark
parent 9222cdd27e
commit cf6916f461
2 changed files with 15 additions and 15 deletions
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26
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
View File

@ -194,7 +194,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc,
return; return;
} }
ctl = mixer->hw_ctl; ctl = mixer->lm_ctl;
lm = mixer->hw_lm; lm = mixer->hw_lm;
stage_cfg = &dpu_crtc->stage_cfg; stage_cfg = &dpu_crtc->stage_cfg;
cstate = to_dpu_crtc_state(crtc->state); cstate = to_dpu_crtc_state(crtc->state);
@ -279,15 +279,15 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc)
DPU_DEBUG("%s\n", dpu_crtc->name); DPU_DEBUG("%s\n", dpu_crtc->name);
for (i = 0; i < cstate->num_mixers; i++) { for (i = 0; i < cstate->num_mixers; i++) {
if (!mixer[i].hw_lm || !mixer[i].hw_ctl) { if (!mixer[i].hw_lm || !mixer[i].lm_ctl) {
DPU_ERROR("invalid lm or ctl assigned to mixer\n"); DPU_ERROR("invalid lm or ctl assigned to mixer\n");
return; return;
} }
mixer[i].mixer_op_mode = 0; mixer[i].mixer_op_mode = 0;
mixer[i].flush_mask = 0; mixer[i].flush_mask = 0;
if (mixer[i].hw_ctl->ops.clear_all_blendstages) if (mixer[i].lm_ctl->ops.clear_all_blendstages)
mixer[i].hw_ctl->ops.clear_all_blendstages( mixer[i].lm_ctl->ops.clear_all_blendstages(
mixer[i].hw_ctl); mixer[i].lm_ctl);
} }
/* initialize stage cfg */ /* initialize stage cfg */
@ -296,7 +296,7 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc)
_dpu_crtc_blend_setup_mixer(crtc, dpu_crtc, mixer); _dpu_crtc_blend_setup_mixer(crtc, dpu_crtc, mixer);
for (i = 0; i < cstate->num_mixers; i++) { for (i = 0; i < cstate->num_mixers; i++) {
ctl = mixer[i].hw_ctl; ctl = mixer[i].lm_ctl;
lm = mixer[i].hw_lm; lm = mixer[i].hw_lm;
lm->ops.setup_alpha_out(lm, mixer[i].mixer_op_mode); lm->ops.setup_alpha_out(lm, mixer[i].mixer_op_mode);
@ -540,14 +540,14 @@ static void _dpu_crtc_setup_mixer_for_encoder(
if (!dpu_rm_get_hw(rm, &ctl_iter)) { if (!dpu_rm_get_hw(rm, &ctl_iter)) {
DPU_DEBUG("no ctl assigned to lm %d, using previous\n", DPU_DEBUG("no ctl assigned to lm %d, using previous\n",
mixer->hw_lm->idx - LM_0); mixer->hw_lm->idx - LM_0);
mixer->hw_ctl = last_valid_ctl; mixer->lm_ctl = last_valid_ctl;
} else { } else {
mixer->hw_ctl = (struct dpu_hw_ctl *)ctl_iter.hw; mixer->lm_ctl = (struct dpu_hw_ctl *)ctl_iter.hw;
last_valid_ctl = mixer->hw_ctl; last_valid_ctl = mixer->lm_ctl;
} }
/* Shouldn't happen, mixers are always >= ctls */ /* Shouldn't happen, mixers are always >= ctls */
if (!mixer->hw_ctl) { if (!mixer->lm_ctl) {
DPU_ERROR("no valid ctls found for lm %d\n", DPU_ERROR("no valid ctls found for lm %d\n",
mixer->hw_lm->idx - LM_0); mixer->hw_lm->idx - LM_0);
return; return;
@ -559,7 +559,7 @@ static void _dpu_crtc_setup_mixer_for_encoder(
DPU_DEBUG("setup mixer %d: lm %d\n", DPU_DEBUG("setup mixer %d: lm %d\n",
i, mixer->hw_lm->idx - LM_0); i, mixer->hw_lm->idx - LM_0);
DPU_DEBUG("setup mixer %d: ctl %d\n", DPU_DEBUG("setup mixer %d: ctl %d\n",
i, mixer->hw_ctl->idx - CTL_0); i, mixer->lm_ctl->idx - CTL_0);
} }
} }
@ -1532,11 +1532,11 @@ static int _dpu_debugfs_status_show(struct seq_file *s, void *data)
m = &cstate->mixers[i]; m = &cstate->mixers[i];
if (!m->hw_lm) if (!m->hw_lm)
seq_printf(s, "\tmixer[%d] has no lm\n", i); seq_printf(s, "\tmixer[%d] has no lm\n", i);
else if (!m->hw_ctl) else if (!m->lm_ctl)
seq_printf(s, "\tmixer[%d] has no ctl\n", i); seq_printf(s, "\tmixer[%d] has no ctl\n", i);
else else
seq_printf(s, "\tmixer:%d ctl:%d width:%d height:%d\n", seq_printf(s, "\tmixer:%d ctl:%d width:%d height:%d\n",
m->hw_lm->idx - LM_0, m->hw_ctl->idx - CTL_0, m->hw_lm->idx - LM_0, m->lm_ctl->idx - CTL_0,
out_width, mode->vdisplay); out_width, mode->vdisplay);
} }

4
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
View File

@ -83,14 +83,14 @@ struct dpu_crtc_smmu_state_data {
/** /**
* struct dpu_crtc_mixer: stores the map for each virtual pipeline in the CRTC * struct dpu_crtc_mixer: stores the map for each virtual pipeline in the CRTC
* @hw_lm: LM HW Driver context * @hw_lm: LM HW Driver context
* @hw_ctl: CTL Path HW driver context * @lm_ctl: CTL Path HW driver context
* @encoder: Encoder attached to this lm & ctl * @encoder: Encoder attached to this lm & ctl
* @mixer_op_mode: mixer blending operation mode * @mixer_op_mode: mixer blending operation mode
* @flush_mask: mixer flush mask for ctl, mixer and pipe * @flush_mask: mixer flush mask for ctl, mixer and pipe
*/ */
struct dpu_crtc_mixer { struct dpu_crtc_mixer {
struct dpu_hw_mixer *hw_lm; struct dpu_hw_mixer *hw_lm;
struct dpu_hw_ctl *hw_ctl; struct dpu_hw_ctl *lm_ctl;
struct drm_encoder *encoder; struct drm_encoder *encoder;
u32 mixer_op_mode; u32 mixer_op_mode;
u32 flush_mask; u32 flush_mask;