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Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

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* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  [MIPS] Oprofile: Fix computation of number of counters.
  [MIPS] Alchemy: fix IRQ bases
  [MIPS] Alchemy: replace ffs() with __ffs()
  [MIPS] BCM1480: Fix interrupt routing, take 2.
This commit is contained in:
Linus Torvalds 2007-12-06 09:43:26 -08:00
commit ceaeee6ad6
6 changed files with 63 additions and 27 deletions
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2
arch/mips/au1000/common/dbdma.c
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@ -859,7 +859,7 @@ dbdma_interrupt(int irq, void *dev_id)
intstat = dbdma_gptr->ddma_intstat;
au_sync();
chan_index = ffs(intstat);
chan_index = __ffs(intstat);
ctp = chan_tab_ptr[chan_index];
cp = ctp->chan_ptr;

16
arch/mips/au1000/common/irq.c
View File

@ -462,9 +462,9 @@ static void intc0_req0_irqdispatch(void)
return;
}
#endif
bit = ffs(intc0_req0);
bit = __ffs(intc0_req0);
intc0_req0 &= ~(1 << bit);
do_IRQ(MIPS_CPU_IRQ_BASE + bit);
do_IRQ(AU1000_INTC0_INT_BASE + bit);
}
@ -478,9 +478,9 @@ static void intc0_req1_irqdispatch(void)
if (!intc0_req1)
return;
bit = ffs(intc0_req1);
bit = __ffs(intc0_req1);
intc0_req1 &= ~(1 << bit);
do_IRQ(bit);
do_IRQ(AU1000_INTC0_INT_BASE + bit);
}
@ -498,9 +498,9 @@ static void intc1_req0_irqdispatch(void)
if (!intc1_req0)
return;
bit = ffs(intc1_req0);
bit = __ffs(intc1_req0);
intc1_req0 &= ~(1 << bit);
do_IRQ(MIPS_CPU_IRQ_BASE + 32 + bit);
do_IRQ(AU1000_INTC1_INT_BASE + bit);
}
@ -514,9 +514,9 @@ static void intc1_req1_irqdispatch(void)
if (!intc1_req1)
return;
bit = ffs(intc1_req1);
bit = __ffs(intc1_req1);
intc1_req1 &= ~(1 << bit);
do_IRQ(MIPS_CPU_IRQ_BASE + 32 + bit);
do_IRQ(AU1000_INTC1_INT_BASE + bit);
}
asmlinkage void plat_irq_dispatch(void)

2
arch/mips/au1000/pb1200/irqmap.c
View File

@ -74,7 +74,7 @@ irqreturn_t pb1200_cascade_handler( int irq, void *dev_id)
bcsr->int_status = bisr;
for( ; bisr; bisr &= (bisr-1) )
{
extirq_nr = PB1200_INT_BEGIN + ffs(bisr);
extirq_nr = PB1200_INT_BEGIN + __ffs(bisr);
/* Ack and dispatch IRQ */
do_IRQ(extirq_nr);
}

44
arch/mips/oprofile/op_model_mipsxx.c
View File

@ -6,6 +6,7 @@
* Copyright (C) 2004, 05, 06 by Ralf Baechle
* Copyright (C) 2005 by MIPS Technologies, Inc.
*/
#include <linux/cpumask.h>
#include <linux/oprofile.h>
#include <linux/interrupt.h>
#include <linux/smp.h>
@ -33,11 +34,45 @@
#ifdef CONFIG_MIPS_MT_SMP
#define WHAT (M_TC_EN_VPE | M_PERFCTL_VPEID(smp_processor_id()))
#define vpe_id() smp_processor_id()
/*
* The number of bits to shift to convert between counters per core and
* counters per VPE. There is no reasonable interface atm to obtain the
* number of VPEs used by Linux and in the 34K this number is fixed to two
* anyways so we hardcore a few things here for the moment. The way it's
* done here will ensure that oprofile VSMP kernel will run right on a lesser
* core like a 24K also or with maxcpus=1.
*/
static inline unsigned int vpe_shift(void)
{
if (num_possible_cpus() > 1)
return 1;
return 0;
}
#else
#define WHAT 0
#define vpe_id() 0
static inline unsigned int vpe_shift(void)
{
return 0;
}
#endif
static inline unsigned int counters_total_to_per_cpu(unsigned int counters)
{
return counters >> vpe_shift();
}
static inline unsigned int counters_per_cpu_to_total(unsigned int counters)
{
return counters << vpe_shift();
}
#define __define_perf_accessors(r, n, np) \
\
static inline unsigned int r_c0_ ## r ## n(void) \
@ -269,9 +304,7 @@ static int __init mipsxx_init(void)
reset_counters(counters);
#ifdef CONFIG_MIPS_MT_SMP
counters >>= 1;
#endif
counters = counters_total_to_per_cpu(counters);
op_model_mipsxx_ops.num_counters = counters;
switch (current_cpu_type()) {
@ -330,9 +363,8 @@ static int __init mipsxx_init(void)
static void mipsxx_exit(void)
{
int counters = op_model_mipsxx_ops.num_counters;
#ifdef CONFIG_MIPS_MT_SMP
counters <<= 1;
#endif
counters = counters_per_cpu_to_total(counters);
reset_counters(counters);
perf_irq = null_perf_irq;

5
arch/mips/pci/pci-bcm1480.c
View File

@ -76,7 +76,10 @@ static inline void WRITECFG32(u32 addr, u32 data)
int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
return K_BCM1480_INT_PCI_INTA + pin;
if (pin == 0)
return -1;
return K_BCM1480_INT_PCI_INTA - 1 + pin;
}
/* Do platform specific device initialization at pci_enable_device() time */

21
include/asm-mips/mach-au1x00/au1000.h
View File

@ -526,7 +526,7 @@ extern struct au1xxx_irqmap au1xxx_irq_map[];
/* Au1000 */
#ifdef CONFIG_SOC_AU1000
enum soc_au1000_ints {
AU1000_FIRST_INT = MIPS_CPU_IRQ_BASE,
AU1000_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
AU1000_UART0_INT = AU1000_FIRST_INT,
AU1000_UART1_INT, /* au1000 */
AU1000_UART2_INT, /* au1000 */
@ -605,7 +605,7 @@ enum soc_au1000_ints {
/* Au1500 */
#ifdef CONFIG_SOC_AU1500
enum soc_au1500_ints {
AU1500_FIRST_INT = MIPS_CPU_IRQ_BASE,
AU1500_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
AU1500_UART0_INT = AU1500_FIRST_INT,
AU1000_PCI_INTA, /* au1500 */
AU1000_PCI_INTB, /* au1500 */
@ -686,7 +686,7 @@ enum soc_au1500_ints {
/* Au1100 */
#ifdef CONFIG_SOC_AU1100
enum soc_au1100_ints {
AU1100_FIRST_INT = MIPS_CPU_IRQ_BASE,
AU1100_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
AU1100_UART0_INT,
AU1100_UART1_INT,
AU1100_SD_INT,
@ -761,7 +761,7 @@ enum soc_au1100_ints {
#ifdef CONFIG_SOC_AU1550
enum soc_au1550_ints {
AU1550_FIRST_INT = MIPS_CPU_IRQ_BASE,
AU1550_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
AU1550_UART0_INT = AU1550_FIRST_INT,
AU1550_PCI_INTA,
AU1550_PCI_INTB,
@ -851,7 +851,7 @@ enum soc_au1550_ints {
#ifdef CONFIG_SOC_AU1200
enum soc_au1200_ints {
AU1200_FIRST_INT = MIPS_CPU_IRQ_BASE,
AU1200_FIRST_INT = MIPS_CPU_IRQ_BASE + 8,
AU1200_UART0_INT = AU1200_FIRST_INT,
AU1200_SWT_INT,
AU1200_SD_INT,
@ -948,11 +948,12 @@ enum soc_au1200_ints {
#endif /* CONFIG_SOC_AU1200 */
#define AU1000_INTC0_INT_BASE (MIPS_CPU_IRQ_BASE + 0)
#define AU1000_INTC0_INT_LAST (MIPS_CPU_IRQ_BASE + 31)
#define AU1000_INTC1_INT_BASE (MIPS_CPU_IRQ_BASE + 32)
#define AU1000_INTC1_INT_LAST (MIPS_CPU_IRQ_BASE + 63)
#define AU1000_MAX_INTR (MIPS_CPU_IRQ_BASE + 63)
#define AU1000_INTC0_INT_BASE (MIPS_CPU_IRQ_BASE + 8)
#define AU1000_INTC0_INT_LAST (AU1000_INTC0_INT_BASE + 31)
#define AU1000_INTC1_INT_BASE (AU1000_INTC0_INT_BASE + 32)
#define AU1000_INTC1_INT_LAST (AU1000_INTC1_INT_BASE + 31)
#define AU1000_MAX_INTR AU1000_INTC1_INT_LAST
#define INTX 0xFF /* not valid */
/* Programmable Counters 0 and 1 */