mtd: nand: ecc-bch: Move BCH code to the generic NAND layer
BCH ECC code might be later re-used by the SPI NAND layer. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-3-miquel.raynal@bootlin.com
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@ -15,6 +15,17 @@ config MTD_NAND_ECC
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bool
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depends on MTD_NAND_CORE
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config MTD_NAND_ECC_SW_BCH
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bool "Software BCH ECC engine"
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select BCH
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select MTD_NAND_ECC
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default n
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help
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This enables support for software BCH error correction. Binary BCH
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codes are more powerful and cpu intensive than traditional Hamming
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ECC codes. They are used with NAND devices requiring more than 1 bit
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of error correction.
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endmenu
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endmenu
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@ -8,3 +8,4 @@ obj-y += raw/
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obj-y += spi/
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nandcore-$(CONFIG_MTD_NAND_ECC) += ecc.o
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nandcore-$(CONFIG_MTD_NAND_ECC_SW_BCH) += ecc-sw-bch.o
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@ -13,7 +13,7 @@
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#include <linux/bitops.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/mtd/nand_bch.h>
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#include <linux/mtd/nand-ecc-sw-bch.h>
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#include <linux/bch.h>
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/**
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@ -22,16 +22,6 @@ menuconfig MTD_RAW_NAND
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if MTD_RAW_NAND
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config MTD_NAND_ECC_SW_BCH
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bool "Support software BCH ECC"
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select BCH
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default n
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help
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This enables support for software BCH error correction. Binary BCH
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codes are more powerful and cpu intensive than traditional Hamming
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ECC codes. They are used with NAND devices requiring more than 1 bit
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of error correction.
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comment "Raw/parallel NAND flash controllers"
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config MTD_NAND_DENALI
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@ -2,7 +2,6 @@
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obj-$(CONFIG_MTD_RAW_NAND) += nand.o
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obj-$(CONFIG_MTD_NAND_ECC_SW_HAMMING) += nand_ecc.o
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nand-$(CONFIG_MTD_NAND_ECC_SW_BCH) += nand_bch.o
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obj-$(CONFIG_MTD_SM_COMMON) += sm_common.o
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obj-$(CONFIG_MTD_NAND_CAFE) += cafe_nand.o
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@ -36,7 +36,7 @@
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand_ecc.h>
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#include <linux/mtd/nand_bch.h>
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#include <linux/mtd/nand-ecc-sw-bch.h>
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#include <linux/interrupt.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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@ -23,7 +23,7 @@
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#include <linux/string.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/mtd/nand_bch.h>
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#include <linux/mtd/nand-ecc-sw-bch.h>
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#include <linux/mtd/partitions.h>
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#include <linux/delay.h>
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#include <linux/list.h>
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@ -23,7 +23,7 @@
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/mtd/nand_bch.h>
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#include <linux/mtd/nand-ecc-sw-bch.h>
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#include <linux/platform_data/elm.h>
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#include <linux/omap-gpmc.h>
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@ -5,8 +5,8 @@
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* This file is the header for the NAND BCH ECC implementation.
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*/
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#ifndef __MTD_NAND_BCH_H__
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#define __MTD_NAND_BCH_H__
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#ifndef __MTD_NAND_ECC_SW_BCH_H__
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#define __MTD_NAND_ECC_SW_BCH_H__
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struct mtd_info;
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struct nand_chip;
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@ -63,4 +63,4 @@ static inline void nand_bch_free(struct nand_bch_control *nbc) {}
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#endif /* CONFIG_MTD_NAND_ECC_SW_BCH */
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#endif /* __MTD_NAND_BCH_H__ */
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#endif /* __MTD_NAND_ECC_SW_BCH_H__ */
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