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Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6

Browse Source 
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6:
  sh: Fix dreamcast build for IRQ changes.
  sh: Fix clock multiplier on SH7722.
  sh: Wire up kdump crash kernel exec in die().
  sh: sr.bl toggling around idle sleep.
  sh: disable genrtc support.
  fs: Kill sh dependency for binfmt_flat.
  sh: Disable psw support for R7785RP.
  sh: Fix page size alignment in __copy_user_page().
  sh: Fix up various compile warnings for SE boards.
  sh: Wire up signalfd/timerfd/eventfd syscalls.
  sh: revert addition of page fault notifiers
  spelling fixes: arch/sh/
  input: hp680_ts compile fixes.
  sh: landisk: Header cleanups.
  sh: landisk: rtc-rs5c313 support.
  sh: Kill off pmb slab cache destructor.
  sh: Fix up psw build rules for r7780rp.
  sh: Shut up compiler warnings in __do_page_fault().
This commit is contained in:
Linus Torvalds 2007-05-22 17:26:18 -07:00
commit cdb7532f7b
39 changed files with 165 additions and 186 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/sh/boards/landisk/gio.c
View File

@ -69,7 +69,7 @@ static int gio_ioctl(struct inode *inode, struct file *filp,
}
switch (cmd) {
case GIODRV_IOCSGIOSETADDR: /* addres set */
case GIODRV_IOCSGIOSETADDR: /* address set */
addr = data;
break;

6
arch/sh/boards/landisk/setup.c
View File

@ -44,8 +44,14 @@ static struct platform_device cf_ide_device = {
},
};
static struct platform_device rtc_device = {
.name = "rs5c313",
.id = -1,
};
static struct platform_device *landisk_devices[] __initdata = {
&cf_ide_device,
&rtc_device,
};
static int __init landisk_devices_setup(void)

5
arch/sh/boards/renesas/r7780rp/Makefile
View File

@ -3,5 +3,8 @@
#
irqinit-y := irq-r7780rp.o
irqinit-$(CONFIG_SH_R7785RP) := irq-r7785rp.o
obj-y := setup.o irq.o $(irqinit-y)
ifneq ($(CONFIG_SH_R7785RP),y)
obj-$(CONFIG_PUSH_SWITCH) += psw.o
obj-y := setup.o irq.o $(irqinit-y)
endif

2
arch/sh/boards/snapgear/rtc.c
View File

@ -108,7 +108,7 @@ static void ds1302_writebyte(unsigned int addr, unsigned int val)
static void ds1302_reset(void)
{
unsigned long flags;
/* Hardware dependant reset/init */
/* Hardware dependent reset/init */
local_irq_save(flags);
set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));

6
arch/sh/boards/superh/microdev/io.c
View File

@ -198,12 +198,12 @@ void microdev_outb(unsigned char b, unsigned long port)
/*
* There is a board feature with the current SH4-202 MicroDev in
* that the 2 byte enables (nBE0 and nBE1) are tied together (and
* to the Chip Select Line (Ethernet_CS)). Due to this conectivity,
* to the Chip Select Line (Ethernet_CS)). Due to this connectivity,
* it is not possible to safely perform 8-bit writes to the
* Ethernet registers, as 16-bits will be consumed from the Data
* lines (corrupting the other byte). Hence, this function is
* written to impliment 16-bit read/modify/write for all byte-wide
* acceses.
* written to implement 16-bit read/modify/write for all byte-wide
* accesses.
*
* Note: there is no problem with byte READS (even or odd).
*

6
arch/sh/boards/superh/microdev/irq.c
View File

@ -100,7 +100,7 @@ static void disable_microdev_irq(unsigned int irq)
fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
/* disable interupts on the FPGA INTC register */
/* disable interrupts on the FPGA INTC register */
ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
}
@ -125,7 +125,7 @@ static void enable_microdev_irq(unsigned int irq)
priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri);
ctrl_outl(priorities, priorityReg);
/* enable interupts on the FPGA INTC register */
/* enable interrupts on the FPGA INTC register */
ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
}
@ -152,7 +152,7 @@ extern void __init init_microdev_irq(void)
{
int i;
/* disable interupts on the FPGA INTC register */
/* disable interrupts on the FPGA INTC register */
ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG);
for (i = 0; i < NUM_EXTERNAL_IRQS; i++)

2
arch/sh/boards/superh/microdev/setup.c
View File

@ -349,7 +349,7 @@ static int __init smsc_superio_setup(void)
SMSC_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */
SMSC_WRITE_INDEXED(0x08, 0xe8); /* GP20 = nIDE2_OE */
/* Exit the configuraton state */
/* Exit the configuration state */
outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
return 0;

2
arch/sh/boards/unknown/setup.c
View File

@ -6,7 +6,7 @@
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* Setup code for an unknown machine (internal peripherials only)
* Setup code for an unknown machine (internal peripherals only)
*
* This is the simplest of all boards, and serves only as a quick and dirty
* method to start debugging a new board during bring-up until proper board

2
arch/sh/drivers/dma/dma-api.c
View File

@ -115,7 +115,7 @@ static int search_cap(const char **haystack, const char *needle)
/**
* request_dma_bycap - Allocate a DMA channel based on its capabilities
* @dmac: List of DMA controllers to search
* @caps: List of capabilites
* @caps: List of capabilities
*
* Search all channels of all DMA controllers to find a channel which
* matches the requested capabilities. The result is the channel

2
arch/sh/drivers/dma/dma-isa.c
View File

@ -28,7 +28,7 @@
* NOTE: ops->xfer() is the preferred way of doing things. However, there
* are some users of the ISA DMA API that exist in common code that we
* don't necessarily want to go out of our way to break, so we still
* allow for some compatability at that level. Any new code is strongly
* allow for some compatibility at that level. Any new code is strongly
* advised to run far away from the ISA DMA API and use the SH DMA API
* directly.
*/

2
arch/sh/drivers/dma/dmabrg.c
View File

@ -33,7 +33,7 @@
* 9 | HAC1/SSI1 | rec | half done | DMABRGI2
*
* all can be enabled/disabled in the DMABRGCR register,
* as well as checked if they occured.
* as well as checked if they occurred.
*
* DMABRGI0 services USB DMA Address errors, but it still must be
* enabled/acked in the DMABRGCR register. USB-DMA complete indicator

2
arch/sh/drivers/pci/ops-dreamcast.c
View File

@ -57,7 +57,7 @@ struct pci_channel board_pci_channels[] = {
*
* Also, we could very easily support both Type 0 and Type 1 configurations
* here, but since it doesn't seem that there is any such implementation in
* existance, we don't bother.
* existence, we don't bother.
*
* I suppose if someone actually gets around to ripping the chip out of
* the BBA and hanging some more devices off of it, then this might be

6
arch/sh/drivers/pci/pci-st40.c
View File

@ -292,7 +292,7 @@ int __init st40pci_init(unsigned memStart, unsigned memSize)
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
PCI_COMMAND_IO);
/* Accesse to the 0xb0000000 -> 0xb6000000 area will go through to 0x10000000 -> 0x16000000
/* Access to the 0xb0000000 -> 0xb6000000 area will go through to 0x10000000 -> 0x16000000
* on the PCI bus. This allows a nice 1-1 bus to phys mapping.
*/
@ -315,7 +315,7 @@ int __init st40pci_init(unsigned memStart, unsigned memSize)
ST40PCI_WRITE(CSR_MBAR0, 0);
ST40PCI_WRITE(LSR0, 0x0fff0001);
/* ... and set up the initial incomming window to expose all of RAM */
/* ... and set up the initial incoming window to expose all of RAM */
pci_set_rbar_region(7, memStart, memStart, memSize);
/* Maximise timeout values */
@ -473,7 +473,7 @@ static void pci_set_rbar_region(unsigned int region, unsigned long localAddr
mask = r2p2(regionSize) - 0x10000;
/* Diable the region (in case currently in use, should never happen) */
/* Disable the region (in case currently in use, should never happen) */
ST40PCI_WRITE_INDEXED(RSR, region, 0);
/* Start of local address space to publish */

2
arch/sh/drivers/pci/pci-st40.h
View File

@ -4,7 +4,7 @@
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* Defintions for the ST40 PCI hardware.
* Definitions for the ST40 PCI hardware.
*/
#ifndef __PCI_ST40_H__

2
arch/sh/drivers/superhyway/ops-sh4-202.c
View File

@ -130,7 +130,7 @@ static int sh4202_read_vcr(unsigned long base, struct superhyway_vcr_info *vcr)
* Some modules (PBR and ePBR for instance) also appear to have
* VCRL/VCRH flipped in the documentation, but on the SH4-202
* itself it appears that these are all consistently mapped with
* VCRH preceeding VCRL.
* VCRH preceding VCRL.
*
* Do not trust the documentation, for it is evil.
*/

2
arch/sh/kernel/cf-enabler.c
View File

@ -31,7 +31,7 @@
*/
#if defined(CONFIG_CPU_SH4)
/* SH4 can't access PCMCIA interface through P2 area.
* we must remap it with appropreate attribute bit of the page set.
* we must remap it with appropriate attribute bit of the page set.
* this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */
#if defined(CONFIG_CF_AREA6)

7
arch/sh/kernel/cpu/clock.c
View File

@ -278,6 +278,11 @@ arch_init_clk_ops(struct clk_ops **ops, int type)
{
}
void __init __attribute__ ((weak))
arch_clk_init(void)
{
}
static int show_clocks(char *buf, char **start, off_t off,
int len, int *eof, void *data)
{
@ -314,6 +319,8 @@ int __init clk_init(void)
ret |= clk_register(clk);
}
arch_clk_init();
/* Kick the child clocks.. */
propagate_rate(&master_clk);
propagate_rate(&bus_clk);

2
arch/sh/kernel/cpu/irq/maskreg.c
View File

@ -38,7 +38,7 @@ static struct hw_interrupt_type maskreg_irq_type = {
.end = end_maskreg_irq
};
/* actual implementatin */
/* actual implementation */
static unsigned int startup_maskreg_irq(unsigned int irq)
{
enable_maskreg_irq(irq);

2
arch/sh/kernel/cpu/sh4/fpu.c
View File

@ -138,7 +138,7 @@ restore_fpu(struct task_struct *tsk)
/*
* Load the FPU with signalling NANS. This bit pattern we're using
* has the property that no matter wether considered as single or as
* double precission represents signaling NANS.
* double precision represents signaling NANS.
*/
static void

2
arch/sh/kernel/cpu/sh4/setup-sh7750.c
View File

@ -106,6 +106,7 @@ static struct ipr_data sh7750_ipr_map[] = {
{ 38, 2, 8, 7 }, /* DMAC DMAE */
};
#ifdef CONFIG_CPU_SUBTYPE_SH7751
static struct ipr_data sh7751_ipr_map[] = {
{ 44, 2, 8, 7 }, /* DMAC DMTE4 */
{ 45, 2, 8, 7 }, /* DMAC DMTE5 */
@ -117,6 +118,7 @@ static struct ipr_data sh7751_ipr_map[] = {
/*{ 72, INTPRI00, 8, ? },*/ /* TMU3 TUNI */
/*{ 76, INTPRI00, 12, ? },*/ /* TMU4 TUNI */
};
#endif
static unsigned long ipr_offsets[] = {
0xffd00004UL, /* 0: IPRA */

36
arch/sh/kernel/cpu/sh4a/clock-sh7722.c
View File

@ -17,7 +17,6 @@
#include <asm/clock.h>
#include <asm/freq.h>
#define SH7722_PLL_FREQ (32000000/8)
#define N (-1)
#define NM (-2)
#define ROUND_NEAREST 0
@ -141,28 +140,36 @@ static void adjust_clocks(int originate, int *l, unsigned long v[],
*/
static int divisors2[] = { 2, 3, 4, 5, 6, 8, 10, 12, 16, 20, 24, 32, 40 };
static void master_clk_init(struct clk *clk)
static void master_clk_recalc(struct clk *clk)
{
clk_set_rate(clk, clk_get_rate(clk));
unsigned frqcr = ctrl_inl(FRQCR);
clk->rate = CONFIG_SH_PCLK_FREQ * (((frqcr >> 24) & 0x1f) + 1);
}
static void master_clk_recalc(struct clk *clk)
static void master_clk_init(struct clk *clk)
{
clk->parent = NULL;
clk->flags |= CLK_RATE_PROPAGATES;
clk->rate = CONFIG_SH_PCLK_FREQ;
master_clk_recalc(clk);
}
static void module_clk_recalc(struct clk *clk)
{
unsigned long frqcr = ctrl_inl(FRQCR);
clk->rate = CONFIG_SH_PCLK_FREQ * (1 + (frqcr >> 24 & 0xF));
clk->rate = clk->parent->rate / (((frqcr >> 24) & 0x1f) + 1);
}
static int master_clk_setrate(struct clk *clk, unsigned long rate, int id)
{
int div = rate / SH7722_PLL_FREQ;
int div = rate / clk->rate;
int master_divs[] = { 2, 3, 4, 6, 8, 16 };
int index;
unsigned long frqcr;
if (rate < SH7722_PLL_FREQ * 2)
return -EINVAL;
for (index = 1; index < ARRAY_SIZE(master_divs); index++)
if (div >= master_divs[index - 1] && div < master_divs[index])
break;
@ -185,6 +192,10 @@ static struct clk_ops sh7722_master_clk_ops = {
.set_rate = master_clk_setrate,
};
static struct clk_ops sh7722_module_clk_ops = {
.recalc = module_clk_recalc,
};
struct frqcr_context {
unsigned mask;
unsigned shift;
@ -489,7 +500,7 @@ static void sh7722_siu_recalc(struct clk *clk)
if (siu < 0)
return /* siu */ ;
BUG_ON(siu > 1);
BUG_ON(siu > 2);
r = ctrl_inl(sh7722_siu_regs[siu]);
clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF];
}
@ -571,7 +582,7 @@ static struct clk *sh7722_clocks[] = {
*/
struct clk_ops *onchip_ops[] = {
&sh7722_master_clk_ops,
&sh7722_frqcr_clk_ops,
&sh7722_module_clk_ops,
&sh7722_frqcr_clk_ops,
&sh7722_frqcr_clk_ops,
};
@ -583,7 +594,7 @@ arch_init_clk_ops(struct clk_ops **ops, int type)
*ops = onchip_ops[type];
}
int __init sh7722_clock_init(void)
int __init arch_clk_init(void)
{
struct clk *master;
int i;
@ -597,4 +608,3 @@ int __init sh7722_clock_init(void)
clk_put(master);
return 0;
}
arch_initcall(sh7722_clock_init);

4
arch/sh/kernel/kgdb_stub.c
View File

@ -2,7 +2,7 @@
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* Containes extracts from code by Glenn Engel, Jim Kingdon,
* Contains extracts from code by Glenn Engel, Jim Kingdon,
* David Grothe <dave@gcom.com>, Tigran Aivazian <tigran@sco.com>,
* Amit S. Kale <akale@veritas.com>, William Gatliff <bgat@open-widgets.com>,
* Ben Lee, Steve Chamberlain and Benoit Miller <fulg@iname.com>.
@ -85,7 +85,7 @@
*
* Responses can be run-length encoded to save space. A '*' means that
* the next character is an ASCII encoding giving a repeat count which
* stands for that many repititions of the character preceding the '*'.
* stands for that many repetitions of the character preceding the '*'.
* The encoding is n+29, yielding a printable character where n >=3
* (which is where RLE starts to win). Don't use an n > 126.
*

33
arch/sh/kernel/process.c
View File

@ -26,8 +26,6 @@
static int hlt_counter;
int ubc_usercnt = 0;
#define HARD_IDLE_TIMEOUT (HZ / 3)
void (*pm_idle)(void);
void (*pm_power_off)(void);
EXPORT_SYMBOL(pm_power_off);
@ -44,16 +42,39 @@ void enable_hlt(void)
}
EXPORT_SYMBOL(enable_hlt);
static int __init nohlt_setup(char *__unused)
{
hlt_counter = 1;
return 1;
}
__setup("nohlt", nohlt_setup);
static int __init hlt_setup(char *__unused)
{
hlt_counter = 0;
return 1;
}
__setup("hlt", hlt_setup);
void default_idle(void)
{
if (!hlt_counter)
cpu_sleep();
else
cpu_relax();
if (!hlt_counter) {
clear_thread_flag(TIF_POLLING_NRFLAG);
smp_mb__after_clear_bit();
set_bl_bit();
while (!need_resched())
cpu_sleep();
clear_bl_bit();
set_thread_flag(TIF_POLLING_NRFLAG);
} else
while (!need_resched())
cpu_relax();
}
void cpu_idle(void)
{
set_thread_flag(TIF_POLLING_NRFLAG);
/* endless idle loop with no priority at all */
while (1) {
void (*idle)(void) = pm_idle;

3
arch/sh/kernel/syscalls.S
View File

@ -355,3 +355,6 @@ ENTRY(sys_call_table)
.long sys_getcpu
.long sys_epoll_pwait
.long sys_utimensat /* 320 */
.long sys_signalfd
.long sys_timerfd
.long sys_eventfd

13
arch/sh/kernel/traps.c
View File

@ -21,6 +21,7 @@
#include <linux/bug.h>
#include <linux/debug_locks.h>
#include <linux/kdebug.h>
#include <linux/kexec.h>
#include <linux/limits.h>
#include <asm/system.h>
#include <asm/uaccess.h>
@ -101,6 +102,16 @@ void die(const char * str, struct pt_regs * regs, long err)
bust_spinlocks(0);
spin_unlock_irq(&die_lock);
if (kexec_should_crash(current))
crash_kexec(regs);
if (in_interrupt())
panic("Fatal exception in interrupt");
if (panic_on_oops)
panic("Fatal exception");
do_exit(SIGSEGV);
}
@ -513,7 +524,7 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
* misaligned data access
* access to >= 0x80000000 is user mode
* Unfortuntaly we can't distinguish between instruction address error
* and data address errors caused by read acceses.
* and data address errors caused by read accesses.
*/
asmlinkage void do_address_error(struct pt_regs *regs,
unsigned long writeaccess,

2
arch/sh/math-emu/math.c
View File

@ -148,7 +148,7 @@ fmac(struct sh_fpu_soft_struct *fregs, struct pt_regs *regs, int m, int n)
return 0;
}
// to process fmov's extention (odd n for DR access XD).
// to process fmov's extension (odd n for DR access XD).
#define FMOV_EXT(x) if(x&1) x+=16-1
static int

1
arch/sh/mm/copy_page.S
View File

@ -129,6 +129,7 @@ ENTRY(__copy_user_page)
rts
nop
#endif
.align 2
.Lpsz: .long PAGE_SIZE
/*
* __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n);

39
arch/sh/mm/fault.c
View File

@ -15,43 +15,11 @@
#include <linux/mm.h>
#include <linux/hardirq.h>
#include <linux/kprobes.h>
#include <linux/kdebug.h>
#include <asm/system.h>
#include <asm/mmu_context.h>
#include <asm/tlbflush.h>
#include <asm/kgdb.h>
#ifdef CONFIG_KPROBES
ATOMIC_NOTIFIER_HEAD(notify_page_fault_chain);
/* Hook to register for page fault notifications */
int register_page_fault_notifier(struct notifier_block *nb)
{
return atomic_notifier_chain_register(&notify_page_fault_chain, nb);
}
int unregister_page_fault_notifier(struct notifier_block *nb)
{
return atomic_notifier_chain_unregister(&notify_page_fault_chain, nb);
}
static inline int notify_page_fault(enum die_val val, struct pt_regs *regs,
int trap, int sig)
{
struct die_args args = {
.regs = regs,
.trapnr = trap,
};
return atomic_notifier_call_chain(&notify_page_fault_chain, val, &args);
}
#else
static inline int notify_page_fault(enum die_val val, struct pt_regs *regs,
int trap, int sig)
{
return NOTIFY_DONE;
}
#endif
/*
* This routine handles page faults. It determines the address,
* and the problem, and then passes it off to one of the appropriate
@ -69,11 +37,6 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
siginfo_t info;
trace_hardirqs_on();
if (notify_page_fault(DIE_PAGE_FAULT, regs,
writeaccess, SIGSEGV) == NOTIFY_STOP)
return;
local_irq_enable();
#ifdef CONFIG_SH_KGDB
@ -285,7 +248,7 @@ asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs,
pte_t *pte;
pte_t entry;
struct mm_struct *mm = current->mm;
spinlock_t *ptl;
spinlock_t *ptl = NULL;
int ret = 1;
#ifdef CONFIG_SH_KGDB

3
arch/sh/mm/init.c
View File

@ -12,6 +12,7 @@
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/proc_fs.h>
#include <linux/pagemap.h>
#include <linux/percpu.h>
#include <linux/io.h>
#include <asm/mmu_context.h>
@ -112,7 +113,7 @@ static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot)
* As a performance optimization, other platforms preserve the fixmap mapping
* across a context switch, we don't presently do this, but this could be done
* in a similar fashion as to the wired TLB interface that sh64 uses (by way
* of the memorry mapped UTLB configuration) -- this unfortunately forces us to
* of the memory mapped UTLB configuration) -- this unfortunately forces us to
* give up a TLB entry for each mapping we want to preserve. While this may be
* viable for a small number of fixmaps, it's not particularly useful for
* everything and needs to be carefully evaluated. (ie, we may want this for

79
arch/sh/mm/pmb.c
View File

@ -3,7 +3,7 @@
*
* Privileged Space Mapping Buffer (PMB) Support.
*
* Copyright (C) 2005, 2006 Paul Mundt
* Copyright (C) 2005, 2006, 2007 Paul Mundt
*
* P1/P2 Section mapping definitions from map32.h, which was:
*
@ -68,6 +68,32 @@ static inline unsigned long mk_pmb_data(unsigned int entry)
return mk_pmb_entry(entry) | PMB_DATA;
}
static DEFINE_SPINLOCK(pmb_list_lock);
static struct pmb_entry *pmb_list;
static inline void pmb_list_add(struct pmb_entry *pmbe)
{
struct pmb_entry **p, *tmp;
p = &pmb_list;
while ((tmp = *p) != NULL)
p = &tmp->next;
pmbe->next = tmp;
*p = pmbe;
}
static inline void pmb_list_del(struct pmb_entry *pmbe)
{
struct pmb_entry **p, *tmp;
for (p = &pmb_list; (tmp = *p); p = &tmp->next)
if (tmp == pmbe) {
*p = tmp->next;
return;
}
}
struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
unsigned long flags)
{
@ -81,11 +107,19 @@ struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
pmbe->ppn = ppn;
pmbe->flags = flags;
spin_lock_irq(&pmb_list_lock);
pmb_list_add(pmbe);
spin_unlock_irq(&pmb_list_lock);
return pmbe;
}
void pmb_free(struct pmb_entry *pmbe)
{
spin_lock_irq(&pmb_list_lock);
pmb_list_del(pmbe);
spin_unlock_irq(&pmb_list_lock);
kmem_cache_free(pmb_cache, pmbe);
}
@ -167,31 +201,6 @@ void clear_pmb_entry(struct pmb_entry *pmbe)
clear_bit(entry, &pmb_map);
}
static DEFINE_SPINLOCK(pmb_list_lock);
static struct pmb_entry *pmb_list;
static inline void pmb_list_add(struct pmb_entry *pmbe)
{
struct pmb_entry **p, *tmp;
p = &pmb_list;
while ((tmp = *p) != NULL)
p = &tmp->next;
pmbe->next = tmp;
*p = pmbe;
}
static inline void pmb_list_del(struct pmb_entry *pmbe)
{
struct pmb_entry **p, *tmp;
for (p = &pmb_list; (tmp = *p); p = &tmp->next)
if (tmp == pmbe) {
*p = tmp->next;
return;
}
}
static struct {
unsigned long size;
@ -283,25 +292,14 @@ void pmb_unmap(unsigned long addr)
} while (pmbe);
}
static void pmb_cache_ctor(void *pmb, struct kmem_cache *cachep, unsigned long flags)
static void pmb_cache_ctor(void *pmb, struct kmem_cache *cachep,
unsigned long flags)
{
struct pmb_entry *pmbe = pmb;
memset(pmb, 0, sizeof(struct pmb_entry));
spin_lock_irq(&pmb_list_lock);
pmbe->entry = PMB_NO_ENTRY;
pmb_list_add(pmbe);
spin_unlock_irq(&pmb_list_lock);
}
static void pmb_cache_dtor(void *pmb, struct kmem_cache *cachep, unsigned long flags)
{
spin_lock_irq(&pmb_list_lock);
pmb_list_del(pmb);
spin_unlock_irq(&pmb_list_lock);
}
static int __init pmb_init(void)
@ -312,8 +310,7 @@ static int __init pmb_init(void)
BUG_ON(unlikely(nr_entries >= NR_PMB_ENTRIES));
pmb_cache = kmem_cache_create("pmb", sizeof(struct pmb_entry), 0,
SLAB_PANIC, pmb_cache_ctor,
pmb_cache_dtor);
SLAB_PANIC, pmb_cache_ctor, NULL);
jump_to_P2();

5
arch/sh/tools/mach-types
View File

@ -7,8 +7,11 @@
#
SE SH_SOLUTION_ENGINE
7751SE SH_7751_SOLUTION_ENGINE
7722SE SH_7722_SOLUTION_ENGINE
7300SE SH_7300_SOLUTION_ENGINE
7343SE SH_7343_SOLUTION_ENGINE
7206SE SH_7206_SOLUTION_ENGINE
7619SE SH_7619_SOLUTION_ENGINE
7780SE SH_7780_SOLUTION_ENGINE
73180SE SH_73180_SOLUTION_ENGINE
7751SYSTEMH SH_7751_SYSTEMH
@ -31,5 +34,3 @@ R7785RP SH_R7785RP
TITAN SH_TITAN
SHMIN SH_SHMIN
7710VOIPGW SH_7710VOIPGW
7206SE SH_7206_SOLUTION_ENGINE
7619SE SH_7619_SOLUTION_ENGINE

2
drivers/char/Kconfig
View File

@ -815,7 +815,7 @@ config SGI_IP27_RTC
config GEN_RTC
tristate "Generic /dev/rtc emulation"
depends on RTC!=y && !IA64 && !ARM && !M32R && !SPARC && !FRV && !S390
depends on RTC!=y && !IA64 && !ARM && !M32R && !SPARC && !FRV && !S390 && !SUPERH
---help---
If you say Y here and create a character special file /dev/rtc with
major number 10 and minor number 135 using mknod ("man mknod"), you

7
drivers/input/touchscreen/hp680_ts_input.c
View File

@ -1,7 +1,6 @@
#include <linux/input.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <asm/io.h>
#include <asm/delay.h>
@ -18,12 +17,12 @@
#define PHDR 0xa400012e
#define SCPDR 0xa4000136
static void do_softint(void *data);
static void do_softint(struct work_struct *work);
static struct input_dev *hp680_ts_dev;
static DECLARE_WORK(work, do_softint);
static DECLARE_DELAYED_WORK(work, do_softint);
static void do_softint(void *data)
static void do_softint(struct work_struct *work)
{
int absx = 0, absy = 0;
u8 scpdr;

2
fs/Kconfig.binfmt
View File

@ -38,7 +38,7 @@ config BINFMT_ELF_FDPIC
config BINFMT_FLAT
tristate "Kernel support for flat binaries"
depends on !MMU || SUPERH
depends on !MMU
help
Support uClinux FLAT format binaries.

2
include/asm-sh/dreamcast/sysasic.h
View File

@ -23,7 +23,7 @@
takes.
*/
#define HW_EVENT_IRQ_BASE OFFCHIP_IRQ_BASE /* 48 */
#define HW_EVENT_IRQ_BASE 48
/* IRQ 13 */
#define HW_EVENT_VSYNC (HW_EVENT_IRQ_BASE + 5) /* VSync */

4
include/asm-sh/kdebug.h
View File

@ -6,10 +6,6 @@
/* Grossly misnamed. */
enum die_val {
DIE_TRAP,
DIE_PAGE_FAULT,
};
int register_page_fault_notifier(struct notifier_block *nb);
int unregister_page_fault_notifier(struct notifier_block *nb);
#endif /* __ASM_SH_KDEBUG_H */

10
include/asm-sh/landisk/gio.h
View File

@ -29,16 +29,8 @@
#define GIODRV_IOCGGIODATA4 _IOR(GIODRV_IOC_MAGIC, 6, unsigned long *)
#define GIODRV_IOCSGIOSETADDR _IOW(GIODRV_IOC_MAGIC, 7, unsigned long *)
#define GIODRV_IOCHARDRESET _IO(GIODRV_IOC_MAGIC, 8) /* debugging tool */
#define GIODRV_IOCSGIO_LED _IOW(GIODRV_IOC_MAGIC, 9, unsigned long *)
#define GIODRV_IOCGGIO_LED _IOR(GIODRV_IOC_MAGIC, 10, unsigned long *)
#define GIODRV_IOCSGIO_BUZZER _IOW(GIODRV_IOC_MAGIC, 11, unsigned long *)
#define GIODRV_IOCGGIO_LANDISK _IOR(GIODRV_IOC_MAGIC, 14, unsigned long *)
#define GIODRV_IOCGGIO_BTN _IOR(GIODRV_IOC_MAGIC, 22, unsigned long *)
#define GIODRV_IOCSGIO_BTNPID _IOW(GIODRV_IOC_MAGIC, 23, unsigned long *)
#define GIODRV_IOCGGIO_BTNPID _IOR(GIODRV_IOC_MAGIC, 24, unsigned long *)
#define GIODRV_IOC_MAXNR 8
#define GIO_READ 0x00000000
#define GIO_WRITE 0x00000001

37
include/asm-sh/landisk/iodata_landisk.h
View File

@ -22,16 +22,6 @@
/* 2003.10.31 I-O DATA NSD NWG add. for shutdown port clear */
#define PA_PWRINT_CLR 0xb0000006 /* Shutdown Interrupt clear Register */
#define PA_LCD_CLRDSP 0x00 /* LCD Clear Display Offset */
#define PA_LCD_RTNHOME 0x00 /* LCD Return Home Offset */
#define PA_LCD_ENTMODE 0x00 /* LCD Entry Mode Offset */
#define PA_LCD_DSPCTL 0x00 /* LCD Display ON/OFF Control Offset */
#define PA_LCD_FUNC 0x00 /* LCD Function Set Offset */
#define PA_LCD_CGRAM 0x00 /* LCD Set CGRAM Address Offset */
#define PA_LCD_DDRAM 0x00 /* LCD Set DDRAM Address Offset */
#define PA_LCD_RDFLAG 0x01 /* LCD Read Busy Flag Offset */
#define PA_LCD_WTDATA 0x02 /* LCD Write Datat to RAM Offset */
#define PA_LCD_RDDATA 0x03 /* LCD Read Data from RAM Offset */
#define PA_PIDE_OFFSET 0x40 /* CF IDE Offset */
#define PA_SIDE_OFFSET 0x40 /* HDD IDE Offset */
@ -45,33 +35,6 @@
#define IRQ_BUTTON 12 /* USL-5P Button IRQ */
#define IRQ_FAULT 13 /* USL-5P Fault IRQ */
#define SHUTDOWN_BTN_MAJOR 99 /* Shutdown button device major no. */
#define SHUTDOWN_LOOP_CNT 5 /* Shutdown button Detection loop */
#define SHUTDOWN_DELAY 200 /* Shutdown button delay value(ms) */
/* added by kogiidena */
/*
* landisk_ledparam
*
* led ------10 -6543210 -6543210 -6543210
* |000000..|0.......|0.......|U.......|
* | HARD |fastblik| blink | on |
*
* led0: power U:update flag
* led1: error
* led2: usb1
* led3: usb2
* led4: usb3
* led5: usb4
* led6: usb5
*
*/
extern int landisk_ledparam; /* from setup.c */
extern int landisk_buzzerparam; /* from setup.c */
extern int landisk_arch; /* from setup.c */
#define __IO_PREFIX landisk
#include <asm/io_generic.h>

5
include/asm-sh/unistd.h
View File

@ -329,8 +329,11 @@
#define __NR_getcpu 318
#define __NR_epoll_pwait 319
#define __NR_utimensat 320
#define __NR_signalfd 321
#define __NR_timerfd 322
#define __NR_eventfd 323
#define NR_syscalls 321
#define NR_syscalls 324
#ifdef __KERNEL__