staging: comedi: ni_6527: rename CamelCase defines for the control register
Rename the CamelCase defines used for the interrupt control register. To clarify the code a bit, add two new defines to enable/disable the interrupts. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -58,13 +58,16 @@ Updated: Sat, 25 Jan 2003 13:24:40 -0800
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#define NI6527_STATUS_IRQ (1 << 2)
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#define NI6527_STATUS_OVERFLOW (1 << 1)
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#define NI6527_STATUS_EDGE (1 << 0)
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#define Master_Interrupt_Control 0x15
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#define FallingEdgeIntEnable 0x10
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#define RisingEdgeIntEnable 0x08
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#define MasterInterruptEnable 0x04
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#define OverflowIntEnable 0x02
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#define EdgeIntEnable 0x01
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#define NI6527_CTRL_REG 0x15
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#define NI6527_CTRL_FALLING (1 << 4)
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#define NI6527_CTRL_RISING (1 << 3)
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#define NI6527_CTRL_IRQ (1 << 2)
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#define NI6527_CTRL_OVERFLOW (1 << 1)
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#define NI6527_CTRL_EDGE (1 << 0)
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#define NI6527_CTRL_DISABLE_IRQS 0
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#define NI6527_CTRL_ENABLE_IRQS (NI6527_CTRL_FALLING | \
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NI6527_CTRL_RISING | \
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NI6527_CTRL_IRQ | NI6527_CTRL_EDGE)
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#define Rising_Edge_Detection_Enable(x) (0x018+(x))
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#define Falling_Edge_Detection_Enable(x) (0x020+(x))
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@ -273,9 +276,8 @@ static int ni6527_intr_cmd(struct comedi_device *dev,
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writeb(NI6527_CLR_IRQS,
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devpriv->mite->daq_io_addr + NI6527_CLR_REG);
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writeb(FallingEdgeIntEnable | RisingEdgeIntEnable |
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MasterInterruptEnable | EdgeIntEnable,
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devpriv->mite->daq_io_addr + Master_Interrupt_Control);
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writeb(NI6527_CTRL_ENABLE_IRQS,
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devpriv->mite->daq_io_addr + NI6527_CTRL_REG);
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return 0;
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}
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@ -285,7 +287,8 @@ static int ni6527_intr_cancel(struct comedi_device *dev,
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{
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struct ni6527_private *devpriv = dev->private;
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writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);
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writeb(NI6527_CTRL_DISABLE_IRQS,
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devpriv->mite->daq_io_addr + NI6527_CTRL_REG);
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return 0;
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}
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@ -402,7 +405,8 @@ static int ni6527_auto_attach(struct comedi_device *dev,
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writeb(NI6527_CLR_IRQS | NI6527_CLR_RESET_FILT,
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devpriv->mite->daq_io_addr + NI6527_CLR_REG);
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writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);
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writeb(NI6527_CTRL_DISABLE_IRQS,
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devpriv->mite->daq_io_addr + NI6527_CTRL_REG);
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ret = request_irq(mite_irq(devpriv->mite), ni6527_interrupt,
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IRQF_SHARED, dev->board_name, dev);
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@ -419,8 +423,8 @@ static void ni6527_detach(struct comedi_device *dev)
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struct ni6527_private *devpriv = dev->private;
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if (devpriv && devpriv->mite && devpriv->mite->daq_io_addr)
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writeb(0x00,
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devpriv->mite->daq_io_addr + Master_Interrupt_Control);
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writeb(NI6527_CTRL_DISABLE_IRQS,
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devpriv->mite->daq_io_addr + NI6527_CTRL_REG);
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if (dev->irq)
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free_irq(dev->irq, dev);
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if (devpriv && devpriv->mite) {
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