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media: dt: bindings: tegra-vde: Convert to schema
Convert NVIDIA Tegra video decoder binding to schema. Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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Dmitry Osipenko
Thierry Reding
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0c41e287f7
commit
ccc3016261
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NVIDIA Tegra Video Decoder Engine
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Required properties:
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- compatible : Must contain one of the following values:
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- "nvidia,tegra20-vde"
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- "nvidia,tegra30-vde"
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- "nvidia,tegra114-vde"
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- "nvidia,tegra124-vde"
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- "nvidia,tegra132-vde"
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- reg : Must contain an entry for each entry in reg-names.
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- reg-names : Must include the following entries:
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- sxe
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- bsev
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- mbe
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- ppe
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- mce
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- tfe
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- ppb
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- vdma
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- frameid
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- iram : Must contain phandle to the mmio-sram device node that represents
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IRAM region used by VDE.
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- interrupts : Must contain an entry for each entry in interrupt-names.
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- interrupt-names : Must include the following entries:
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- sync-token
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- bsev
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- sxe
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- clocks : Must include the following entries:
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- vde
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- resets : Must contain an entry for each entry in reset-names.
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- reset-names : Should include the following entries:
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- vde
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Optional properties:
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- resets : Must contain an entry for each entry in reset-names.
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- reset-names : Must include the following entries:
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- mc
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- iommus: Must contain phandle to the IOMMU device node.
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Example:
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video-codec@6001a000 {
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compatible = "nvidia,tegra20-vde";
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reg = <0x6001a000 0x1000 /* Syntax Engine */
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0x6001b000 0x1000 /* Video Bitstream Engine */
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0x6001c000 0x100 /* Macroblock Engine */
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0x6001c200 0x100 /* Post-processing Engine */
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0x6001c400 0x100 /* Motion Compensation Engine */
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0x6001c600 0x100 /* Transform Engine */
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0x6001c800 0x100 /* Pixel prediction block */
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0x6001ca00 0x100 /* Video DMA */
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0x6001d800 0x300 /* Video frame controls */>;
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reg-names = "sxe", "bsev", "mbe", "ppe", "mce",
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"tfe", "ppb", "vdma", "frameid";
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iram = <&vde_pool>; /* IRAM region */
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, /* Sync token interrupt */
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<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, /* BSE-V interrupt */
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<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; /* SXE interrupt */
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interrupt-names = "sync-token", "bsev", "sxe";
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clocks = <&tegra_car TEGRA20_CLK_VDE>;
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reset-names = "vde", "mc";
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resets = <&tegra_car 61>, <&mc TEGRA20_MC_RESET_VDE>;
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iommus = <&mc TEGRA_SWGROUP_VDE>;
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};
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107
Documentation/devicetree/bindings/media/nvidia,tegra-vde.yaml
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107
Documentation/devicetree/bindings/media/nvidia,tegra-vde.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/nvidia,tegra-vde.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra Video Decoder Engine
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maintainers:
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- Dmitry Osipenko <digetx@gmail.com>
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- Jon Hunter <jonathanh@nvidia.com>
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- Thierry Reding <thierry.reding@gmail.com>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- nvidia,tegra132-vde
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- nvidia,tegra124-vde
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- nvidia,tegra114-vde
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- items:
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- const: nvidia,tegra30-vde
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- const: nvidia,tegra20-vde
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- items:
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- const: nvidia,tegra20-vde
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reg:
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maxItems: 9
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reg-names:
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items:
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- const: sxe
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- const: bsev
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- const: mbe
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- const: ppe
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- const: mce
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- const: tfe
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- const: ppb
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- const: vdma
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- const: frameid
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clocks:
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maxItems: 1
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resets:
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maxItems: 2
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reset-names:
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items:
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- const: vde
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- const: mc
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interrupts:
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maxItems: 3
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interrupt-names:
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items:
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- const: sync-token
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- const: bsev
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- const: sxe
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iommus:
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maxItems: 1
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iram:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle of the SRAM MMIO node.
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required:
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- compatible
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- reg
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- reg-names
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- clocks
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- resets
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- reset-names
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- interrupts
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- interrupt-names
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additionalProperties: false
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examples:
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- |
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video-codec@6001a000 {
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compatible = "nvidia,tegra20-vde";
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reg = <0x6001a000 0x1000>, /* Syntax Engine */
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<0x6001b000 0x1000>, /* Video Bitstream Engine */
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<0x6001c000 0x100>, /* Macroblock Engine */
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<0x6001c200 0x100>, /* Post-processing Engine */
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<0x6001c400 0x100>, /* Motion Compensation Engine */
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<0x6001c600 0x100>, /* Transform Engine */
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<0x6001c800 0x100>, /* Pixel prediction block */
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<0x6001ca00 0x100>, /* Video DMA */
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<0x6001d800 0x300>; /* Video frame controls */
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reg-names = "sxe", "bsev", "mbe", "ppe", "mce",
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"tfe", "ppb", "vdma", "frameid";
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iram = <&iram>; /* IRAM MMIO region */
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interrupts = <0 9 4>, /* Sync token */
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<0 10 4>, /* BSE-V */
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<0 12 4>; /* SXE */
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interrupt-names = "sync-token", "bsev", "sxe";
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clocks = <&clk 61>;
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reset-names = "vde", "mc";
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resets = <&rst 61>, <&mem 13>;
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iommus = <&mem 15>;
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};
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