forked from Minki/linux
drm/i915: use vfuncs for reg_read/write_fw_domains
Instead of going through the if-else chain every time, let's save the function in the uncore structure. Note that the new functions are purposely not used from the reg read/write functions to keep the inlining there. While at it, use the new macro to call the old ones to clean the code a bit. v2: Rename macros for no-forcewake function assignment (Tvrtko) Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190620010021.20637-2-daniele.ceraolospurio@intel.com
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09c5ab384f
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@ -901,6 +901,12 @@ static bool is_gen##x##_shadowed(u32 offset) \
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__is_genX_shadowed(8)
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__is_genX_shadowed(11)
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static enum forcewake_domains
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gen6_reg_write_fw_domains(struct intel_uncore *uncore, i915_reg_t reg)
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{
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return FORCEWAKE_RENDER;
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}
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#define __gen8_reg_write_fw_domains(uncore, offset) \
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({ \
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enum forcewake_domains __fwd; \
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@ -1145,26 +1151,23 @@ func##_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \
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val = __raw_uncore_read##x(uncore, reg); \
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GEN6_READ_FOOTER; \
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}
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#define __gen6_read(x) __gen_read(gen6, x)
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#define __fwtable_read(x) __gen_read(fwtable, x)
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#define __gen11_fwtable_read(x) __gen_read(gen11_fwtable, x)
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__gen11_fwtable_read(8)
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__gen11_fwtable_read(16)
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__gen11_fwtable_read(32)
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__gen11_fwtable_read(64)
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__fwtable_read(8)
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__fwtable_read(16)
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__fwtable_read(32)
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__fwtable_read(64)
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__gen6_read(8)
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__gen6_read(16)
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__gen6_read(32)
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__gen6_read(64)
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#define __gen_reg_read_funcs(func) \
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static enum forcewake_domains \
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func##_reg_read_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) { \
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return __##func##_reg_read_fw_domains(uncore, i915_mmio_reg_offset(reg)); \
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} \
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\
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__gen_read(func, 8) \
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__gen_read(func, 16) \
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__gen_read(func, 32) \
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__gen_read(func, 64)
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#undef __gen11_fwtable_read
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#undef __fwtable_read
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#undef __gen6_read
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__gen_reg_read_funcs(gen11_fwtable);
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__gen_reg_read_funcs(fwtable);
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__gen_reg_read_funcs(gen6);
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#undef __gen_reg_read_funcs
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#undef GEN6_READ_FOOTER
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#undef GEN6_READ_HEADER
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@ -1225,6 +1228,9 @@ gen6_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trace)
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__raw_uncore_write##x(uncore, reg, val); \
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GEN6_WRITE_FOOTER; \
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}
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__gen6_write(8)
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__gen6_write(16)
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__gen6_write(32)
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#define __gen_write(func, x) \
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static void \
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@ -1237,38 +1243,33 @@ func##_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trac
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__raw_uncore_write##x(uncore, reg, val); \
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GEN6_WRITE_FOOTER; \
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}
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#define __gen8_write(x) __gen_write(gen8, x)
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#define __fwtable_write(x) __gen_write(fwtable, x)
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#define __gen11_fwtable_write(x) __gen_write(gen11_fwtable, x)
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__gen11_fwtable_write(8)
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__gen11_fwtable_write(16)
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__gen11_fwtable_write(32)
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__fwtable_write(8)
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__fwtable_write(16)
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__fwtable_write(32)
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__gen8_write(8)
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__gen8_write(16)
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__gen8_write(32)
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__gen6_write(8)
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__gen6_write(16)
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__gen6_write(32)
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#define __gen_reg_write_funcs(func) \
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static enum forcewake_domains \
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func##_reg_write_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) { \
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return __##func##_reg_write_fw_domains(uncore, i915_mmio_reg_offset(reg)); \
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} \
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\
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__gen_write(func, 8) \
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__gen_write(func, 16) \
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__gen_write(func, 32)
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#undef __gen11_fwtable_write
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#undef __fwtable_write
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#undef __gen8_write
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#undef __gen6_write
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__gen_reg_write_funcs(gen11_fwtable);
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__gen_reg_write_funcs(fwtable);
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__gen_reg_write_funcs(gen8);
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#undef __gen_reg_write_funcs
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#undef GEN6_WRITE_FOOTER
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#undef GEN6_WRITE_HEADER
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#define ASSIGN_WRITE_MMIO_VFUNCS(uncore, x) \
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#define ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, x) \
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do { \
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(uncore)->funcs.mmio_writeb = x##_write8; \
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(uncore)->funcs.mmio_writew = x##_write16; \
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(uncore)->funcs.mmio_writel = x##_write32; \
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} while (0)
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#define ASSIGN_READ_MMIO_VFUNCS(uncore, x) \
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#define ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, x) \
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do { \
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(uncore)->funcs.mmio_readb = x##_read8; \
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(uncore)->funcs.mmio_readw = x##_read16; \
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@ -1276,6 +1277,17 @@ do { \
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(uncore)->funcs.mmio_readq = x##_read64; \
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} while (0)
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#define ASSIGN_WRITE_MMIO_VFUNCS(uncore, x) \
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do { \
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ASSIGN_RAW_WRITE_MMIO_VFUNCS((uncore), x); \
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(uncore)->funcs.write_fw_domains = x##_reg_write_fw_domains; \
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} while (0)
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#define ASSIGN_READ_MMIO_VFUNCS(uncore, x) \
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do { \
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ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, x); \
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(uncore)->funcs.read_fw_domains = x##_reg_read_fw_domains; \
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} while (0)
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static void fw_domain_init(struct intel_uncore *uncore,
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enum forcewake_domain_id domain_id,
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@ -1559,11 +1571,11 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
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if (!intel_uncore_has_forcewake(uncore)) {
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if (IS_GEN(i915, 5)) {
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ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen5);
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ASSIGN_READ_MMIO_VFUNCS(uncore, gen5);
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ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen5);
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ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, gen5);
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} else {
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ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen2);
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ASSIGN_READ_MMIO_VFUNCS(uncore, gen2);
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ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, gen2);
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ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, gen2);
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}
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} else if (IS_GEN_RANGE(i915, 6, 7)) {
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ASSIGN_WRITE_MMIO_VFUNCS(uncore, gen6);
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@ -1594,6 +1606,12 @@ int intel_uncore_init_mmio(struct intel_uncore *uncore)
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ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
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}
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/* make sure fw funcs are set if and only if we have fw*/
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GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.force_wake_get);
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GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.force_wake_put);
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GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.read_fw_domains);
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GEM_BUG_ON(intel_uncore_has_forcewake(uncore) != !!uncore->funcs.write_fw_domains);
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if (HAS_FPGA_DBG_UNCLAIMED(i915))
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uncore->flags |= UNCORE_HAS_FPGA_DBG_UNCLAIMED;
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@ -1871,62 +1889,6 @@ out:
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return ret;
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}
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static enum forcewake_domains
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intel_uncore_forcewake_for_read(struct intel_uncore *uncore,
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i915_reg_t reg)
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{
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struct drm_i915_private *i915 = uncore_to_i915(uncore);
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u32 offset = i915_mmio_reg_offset(reg);
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enum forcewake_domains fw_domains;
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if (INTEL_GEN(i915) >= 11) {
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fw_domains = __gen11_fwtable_reg_read_fw_domains(uncore, offset);
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} else if (HAS_FWTABLE(i915)) {
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fw_domains = __fwtable_reg_read_fw_domains(uncore, offset);
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} else if (INTEL_GEN(i915) >= 6) {
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fw_domains = __gen6_reg_read_fw_domains(uncore, offset);
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} else {
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/* on devices with FW we expect to hit one of the above cases */
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if (intel_uncore_has_forcewake(uncore))
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MISSING_CASE(INTEL_GEN(i915));
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fw_domains = 0;
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}
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WARN_ON(fw_domains & ~uncore->fw_domains);
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return fw_domains;
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}
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static enum forcewake_domains
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intel_uncore_forcewake_for_write(struct intel_uncore *uncore,
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i915_reg_t reg)
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{
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struct drm_i915_private *i915 = uncore_to_i915(uncore);
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u32 offset = i915_mmio_reg_offset(reg);
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enum forcewake_domains fw_domains;
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if (INTEL_GEN(i915) >= 11) {
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fw_domains = __gen11_fwtable_reg_write_fw_domains(uncore, offset);
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} else if (HAS_FWTABLE(i915) && !IS_VALLEYVIEW(i915)) {
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fw_domains = __fwtable_reg_write_fw_domains(uncore, offset);
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} else if (IS_GEN(i915, 8)) {
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fw_domains = __gen8_reg_write_fw_domains(uncore, offset);
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} else if (IS_GEN_RANGE(i915, 6, 7)) {
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fw_domains = FORCEWAKE_RENDER;
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} else {
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/* on devices with FW we expect to hit one of the above cases */
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if (intel_uncore_has_forcewake(uncore))
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MISSING_CASE(INTEL_GEN(i915));
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fw_domains = 0;
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}
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WARN_ON(fw_domains & ~uncore->fw_domains);
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return fw_domains;
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}
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/**
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* intel_uncore_forcewake_for_reg - which forcewake domains are needed to access
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* a register
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@ -1953,10 +1915,12 @@ intel_uncore_forcewake_for_reg(struct intel_uncore *uncore,
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return 0;
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if (op & FW_REG_READ)
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fw_domains = intel_uncore_forcewake_for_read(uncore, reg);
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fw_domains = uncore->funcs.read_fw_domains(uncore, reg);
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if (op & FW_REG_WRITE)
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fw_domains |= intel_uncore_forcewake_for_write(uncore, reg);
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fw_domains |= uncore->funcs.write_fw_domains(uncore, reg);
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WARN_ON(fw_domains & ~uncore->fw_domains);
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return fw_domains;
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}
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@ -70,6 +70,11 @@ struct intel_uncore_funcs {
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void (*force_wake_put)(struct intel_uncore *uncore,
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enum forcewake_domains domains);
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enum forcewake_domains (*read_fw_domains)(struct intel_uncore *uncore,
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i915_reg_t r);
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enum forcewake_domains (*write_fw_domains)(struct intel_uncore *uncore,
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i915_reg_t r);
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u8 (*mmio_readb)(struct intel_uncore *uncore,
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i915_reg_t r, bool trace);
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u16 (*mmio_readw)(struct intel_uncore *uncore,
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void mock_uncore_init(struct intel_uncore *uncore)
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{
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ASSIGN_WRITE_MMIO_VFUNCS(uncore, nop);
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ASSIGN_READ_MMIO_VFUNCS(uncore, nop);
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ASSIGN_RAW_WRITE_MMIO_VFUNCS(uncore, nop);
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ASSIGN_RAW_READ_MMIO_VFUNCS(uncore, nop);
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}
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