forked from Minki/linux
arm64: dts: hikey960: pinctrl: add more pinmux and pinconfig
This commit adds more pinmux and pinctrl information for devices on HiKey960, including i2c, spi, cam, uart, ufs, pcie, csi, pwr_key, isp, sd/sdio, i2s, and usb. Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com> Signed-off-by: Chen Jun <chenjun14@huawei.com> Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This commit is contained in:
Wang Xiaoyin
Wei Xu
parent
b6c93186f1
commit
cc59d2a0a6
@ -24,6 +24,27 @@
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&range 0 7 0
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&range 8 116 0>;
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pmu_pmx_func: pmu_pmx_func {
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pinctrl-single,pins = <
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0x008 MUX_M1 /* PMU1_SSI */
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0x00c MUX_M1 /* PMU2_SSI */
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0x010 MUX_M1 /* PMU_CLKOUT */
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0x100 MUX_M1 /* PMU_HKADC_SSI */
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>;
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};
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csi0_pwd_n_pmx_func: csi0_pwd_n_pmx_func {
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pinctrl-single,pins = <
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0x044 MUX_M0 /* CSI0_PWD_N */
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>;
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};
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csi1_pwd_n_pmx_func: csi1_pwd_n_pmx_func {
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pinctrl-single,pins = <
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0x04c MUX_M0 /* CSI1_PWD_N */
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>;
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};
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isp0_pmx_func: isp0_pmx_func {
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pinctrl-single,pins = <
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0x058 MUX_M1 /* ISP_CLK0 */
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@ -40,6 +61,12 @@
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>;
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};
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pwr_key_pmx_func: pwr_key_pmx_func {
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pinctrl-single,pins = <
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0x080 MUX_M0 /* GPIO_034 */
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>;
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};
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i2c3_pmx_func: i2c3_pmx_func {
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pinctrl-single,pins = <
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0x02c MUX_M1 /* I2C3_SCL */
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@ -67,21 +94,10 @@
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>;
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};
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spi1_pmx_func: spi1_pmx_func {
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pinctrl-single,pins = <
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0x034 MUX_M1 /* SPI1_CLK */
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0x038 MUX_M1 /* SPI1_DI */
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0x03c MUX_M1 /* SPI1_DO */
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0x040 MUX_M1 /* SPI1_CS_N */
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>;
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};
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uart0_pmx_func: uart0_pmx_func {
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pinctrl-single,pins = <
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0x0cc MUX_M2 /* UART0_RXD */
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0x0d0 MUX_M2 /* UART0_TXD */
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0x0d4 MUX_M2 /* UART0_RXD_M */
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0x0d8 MUX_M2 /* UART0_TXD_M */
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>;
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};
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@ -138,6 +154,18 @@
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0x0d8 MUX_M1 /* UART6_TXD */
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>;
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};
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cam0_rst_pmx_func: cam0_rst_pmx_func {
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pinctrl-single,pins = <
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0x0c8 MUX_M0 /* CAM0_RST */
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>;
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};
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cam1_rst_pmx_func: cam1_rst_pmx_func {
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pinctrl-single,pins = <
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0x124 MUX_M0 /* CAM1_RST */
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>;
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};
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};
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/* [IOMG_MMC0_000, IOMG_MMC0_005] */
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@ -174,6 +202,13 @@
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/* pin base, nr pins & gpio function */
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pinctrl-single,gpio-range = <&range 0 12 0>;
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ufs_pmx_func: ufs_pmx_func {
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pinctrl-single,pins = <
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0x000 MUX_M1 /* UFS_REF_CLK */
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0x004 MUX_M1 /* UFS_RST_N */
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>;
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};
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spi3_pmx_func: spi3_pmx_func {
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pinctrl-single,pins = <
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0x008 MUX_M1 /* SPI3_CLK */
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@ -248,13 +283,6 @@
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>;
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};
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i2c2_pmx_func: i2c2_pmx_func {
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pinctrl-single,pins = <
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0x024 MUX_M1 /* I2C2_SCL */
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0x028 MUX_M1 /* I2C2_SDA */
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>;
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};
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i2c7_pmx_func: i2c7_pmx_func {
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pinctrl-single,pins = <
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0x024 MUX_M3 /* I2C7_SCL */
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@ -262,6 +290,13 @@
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>;
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};
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pcie_pmx_func: pcie_pmx_func {
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pinctrl-single,pins = <
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0x084 MUX_M1 /* PCIE_CLKREQ_N */
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0x088 MUX_M1 /* PCIE_WAKE_N */
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>;
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};
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spi2_pmx_func: spi2_pmx_func {
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pinctrl-single,pins = <
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0x08c MUX_M1 /* SPI2_CLK */
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@ -271,15 +306,6 @@
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>;
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};
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spi4_pmx_func: spi4_pmx_func {
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pinctrl-single,pins = <
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0x08c MUX_M4 /* SPI4_CLK */
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0x090 MUX_M4 /* SPI4_DI */
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0x094 MUX_M4 /* SPI4_DO */
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0x098 MUX_M4 /* SPI4_CS0_N */
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>;
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};
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i2s0_pmx_func: i2s0_pmx_func {
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pinctrl-single,pins = <
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0x034 MUX_M1 /* I2S0_DI */
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@ -290,13 +316,433 @@
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};
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};
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pmx5: pinmux@ff3fd800 {
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pmx5: pinmux@e896c800 {
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compatible = "pinconf-single";
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reg = <0x0 0xe896c800 0x0 0x200>;
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#pinctrl-cells = <1>;
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pinctrl-single,register-width = <0x20>;
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pmu_cfg_func: pmu_cfg_func {
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pinctrl-single,pins = <
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0x010 0x0 /* PMU1_SSI */
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0x014 0x0 /* PMU2_SSI */
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0x018 0x0 /* PMU_CLKOUT */
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0x10c 0x0 /* PMU_HKADC_SSI */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
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DRIVE7_06MA DRIVE6_MASK
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>;
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};
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i2c3_cfg_func: i2c3_cfg_func {
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pinctrl-single,pins = <
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0x038 0x0 /* I2C3_SCL */
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0x03c 0x0 /* I2C3_SDA */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
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DRIVE7_02MA DRIVE6_MASK
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>;
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};
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csi0_pwd_n_cfg_func: csi0_pwd_n_cfg_func {
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pinctrl-single,pins = <
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0x050 0x0 /* CSI0_PWD_N */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
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DRIVE7_04MA DRIVE6_MASK
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>;
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};
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csi1_pwd_n_cfg_func: csi1_pwd_n_cfg_func {
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pinctrl-single,pins = <
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0x058 0x0 /* CSI1_PWD_N */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
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DRIVE7_04MA DRIVE6_MASK
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>;
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};
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isp0_cfg_func: isp0_cfg_func {
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pinctrl-single,pins = <
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0x064 0x0 /* ISP_CLK0 */
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0x070 0x0 /* ISP_SCL0 */
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0x074 0x0 /* ISP_SDA0 */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
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DRIVE7_04MA DRIVE6_MASK>;
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};
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isp1_cfg_func: isp1_cfg_func {
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pinctrl-single,pins = <
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0x068 0x0 /* ISP_CLK1 */
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0x078 0x0 /* ISP_SCL1 */
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0x07c 0x0 /* ISP_SDA1 */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
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DRIVE7_04MA DRIVE6_MASK
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>;
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};
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pwr_key_cfg_func: pwr_key_cfg_func {
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pinctrl-single,pins = <
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0x08c 0x0 /* GPIO_034 */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
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DRIVE7_02MA DRIVE6_MASK
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>;
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};
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uart1_cfg_func: uart1_cfg_func {
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pinctrl-single,pins = <
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0x0b4 0x0 /* UART1_RXD */
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0x0b8 0x0 /* UART1_TXD */
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0x0bc 0x0 /* UART1_CTS_N */
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0x0c0 0x0 /* UART1_RTS_N */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
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DRIVE7_02MA DRIVE6_MASK
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>;
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};
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uart2_cfg_func: uart2_cfg_func {
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pinctrl-single,pins = <
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0x0c8 0x0 /* UART2_CTS_N */
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0x0cc 0x0 /* UART2_RTS_N */
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0x0d0 0x0 /* UART2_TXD */
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0x0d4 0x0 /* UART2_RXD */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
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DRIVE7_02MA DRIVE6_MASK
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>;
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};
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uart5_cfg_func: uart5_cfg_func {
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pinctrl-single,pins = <
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0x0c8 0x0 /* UART5_RXD */
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0x0cc 0x0 /* UART5_TXD */
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0x0d0 0x0 /* UART5_CTS_N */
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0x0d4 0x0 /* UART5_RTS_N */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
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DRIVE7_02MA DRIVE6_MASK
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>;
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};
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cam0_rst_cfg_func: cam0_rst_cfg_func {
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pinctrl-single,pins = <
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0x0d4 0x0 /* CAM0_RST */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
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DRIVE7_04MA DRIVE6_MASK
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>;
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};
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uart0_cfg_func: uart0_cfg_func {
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pinctrl-single,pins = <
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0x0d8 0x0 /* UART0_RXD */
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0x0dc 0x0 /* UART0_TXD */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
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DRIVE7_02MA DRIVE6_MASK
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>;
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};
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uart6_cfg_func: uart6_cfg_func {
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pinctrl-single,pins = <
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0x0d8 0x0 /* UART6_CTS_N */
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0x0dc 0x0 /* UART6_RTS_N */
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0x0e0 0x0 /* UART6_RXD */
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0x0e4 0x0 /* UART6_TXD */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
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DRIVE7_02MA DRIVE6_MASK
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>;
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};
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uart3_cfg_func: uart3_cfg_func {
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pinctrl-single,pins = <
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0x0e8 0x0 /* UART3_CTS_N */
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0x0ec 0x0 /* UART3_RTS_N */
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0x0f0 0x0 /* UART3_RXD */
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0x0f4 0x0 /* UART3_TXD */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
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DRIVE7_02MA DRIVE6_MASK
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>;
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};
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uart4_cfg_func: uart4_cfg_func {
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pinctrl-single,pins = <
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0x0f8 0x0 /* UART4_CTS_N */
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0x0fc 0x0 /* UART4_RTS_N */
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0x100 0x0 /* UART4_RXD */
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0x104 0x0 /* UART4_TXD */
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>;
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pinctrl-single,bias-pulldown = <
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PULL_DIS
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PULL_DOWN
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PULL_DIS
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PULL_DOWN
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>;
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pinctrl-single,bias-pullup = <
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PULL_DIS
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PULL_UP
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PULL_DIS
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PULL_UP
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>;
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pinctrl-single,drive-strength = <
|
||||
DRIVE7_02MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
|
||||
cam1_rst_cfg_func: cam1_rst_cfg_func {
|
||||
pinctrl-single,pins = <
|
||||
0x130 0x0 /* CAM1_RST */
|
||||
>;
|
||||
pinctrl-single,bias-pulldown = <
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
>;
|
||||
pinctrl-single,bias-pullup = <
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
>;
|
||||
pinctrl-single,drive-strength = <
|
||||
DRIVE7_04MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
pmx6: pinmux@ff3b6800 {
|
||||
compatible = "pinconf-single";
|
||||
reg = <0x0 0xff3b6800 0x0 0x18>;
|
||||
#pinctrl-cells = <1>;
|
||||
pinctrl-single,register-width = <0x20>;
|
||||
|
||||
ufs_cfg_func: ufs_cfg_func {
|
||||
pinctrl-single,pins = <
|
||||
0x000 0x0 /* UFS_REF_CLK */
|
||||
0x004 0x0 /* UFS_RST_N */
|
||||
>;
|
||||
pinctrl-single,bias-pulldown = <
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
>;
|
||||
pinctrl-single,bias-pullup = <
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
>;
|
||||
pinctrl-single,drive-strength = <
|
||||
DRIVE7_08MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
|
||||
spi3_cfg_func: spi3_cfg_func {
|
||||
pinctrl-single,pins = <
|
||||
0x008 0x0 /* SPI3_CLK */
|
||||
0x0 /* SPI3_DI */
|
||||
0x010 0x0 /* SPI3_DO */
|
||||
0x014 0x0 /* SPI3_CS0_N */
|
||||
>;
|
||||
pinctrl-single,bias-pulldown = <
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
>;
|
||||
pinctrl-single,bias-pullup = <
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
>;
|
||||
pinctrl-single,drive-strength = <
|
||||
DRIVE7_02MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
pmx7: pinmux@ff3fd800 {
|
||||
compatible = "pinconf-single";
|
||||
reg = <0x0 0xff3fd800 0x0 0x18>;
|
||||
#pinctrl-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
pinctrl-single,register-width = <32>;
|
||||
pinctrl-single,register-width = <0x20>;
|
||||
|
||||
sdio_clk_cfg_func: sdio_clk_cfg_func {
|
||||
pinctrl-single,pins = <
|
||||
@ -315,8 +761,7 @@
|
||||
PULL_UP
|
||||
>;
|
||||
pinctrl-single,drive-strength = <
|
||||
DRIVE6_32MA
|
||||
DRIVE6_MASK
|
||||
DRIVE6_32MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
|
||||
@ -341,19 +786,16 @@
|
||||
PULL_UP
|
||||
>;
|
||||
pinctrl-single,drive-strength = <
|
||||
DRIVE6_19MA
|
||||
DRIVE6_MASK
|
||||
DRIVE6_19MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
pmx6: pinmux@ff37e800 {
|
||||
pmx8: pinmux@ff37e800 {
|
||||
compatible = "pinconf-single";
|
||||
reg = <0x0 0xff37e800 0x0 0x18>;
|
||||
#pinctrl-cells = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
pinctrl-single,register-width = <32>;
|
||||
pinctrl-single,register-width = <0x20>;
|
||||
|
||||
sd_clk_cfg_func: sd_clk_cfg_func {
|
||||
pinctrl-single,pins = <
|
||||
@ -403,5 +845,215 @@
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
pmx9: pinmux@fff11800 {
|
||||
compatible = "pinconf-single";
|
||||
reg = <0x0 0xfff11800 0x0 0xbc>;
|
||||
#pinctrl-cells = <1>;
|
||||
pinctrl-single,register-width = <0x20>;
|
||||
|
||||
i2c0_cfg_func: i2c0_cfg_func {
|
||||
pinctrl-single,pins = <
|
||||
0x01c 0x0 /* I2C0_SCL */
|
||||
0x020 0x0 /* I2C0_SDA */
|
||||
>;
|
||||
pinctrl-single,bias-pulldown = <
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
>;
|
||||
pinctrl-single,bias-pullup = <
|
||||
PULL_UP
|
||||
PULL_UP
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
>;
|
||||
pinctrl-single,drive-strength = <
|
||||
DRIVE7_02MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_cfg_func: i2c1_cfg_func {
|
||||
pinctrl-single,pins = <
|
||||
0x024 0x0 /* I2C1_SCL */
|
||||
0x028 0x0 /* I2C1_SDA */
|
||||
>;
|
||||
pinctrl-single,bias-pulldown = <
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
>;
|
||||
pinctrl-single,bias-pullup = <
|
||||
PULL_UP
|
||||
PULL_UP
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
>;
|
||||
pinctrl-single,drive-strength = <
|
||||
DRIVE7_02MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
|
||||
i2c7_cfg_func: i2c7_cfg_func {
|
||||
pinctrl-single,pins = <
|
||||
0x02c 0x0 /* I2C7_SCL */
|
||||
0x030 0x0 /* I2C7_SDA */
|
||||
>;
|
||||
pinctrl-single,bias-pulldown = <
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
>;
|
||||
pinctrl-single,bias-pullup = <
|
||||
PULL_UP
|
||||
PULL_UP
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
>;
|
||||
pinctrl-single,drive-strength = <
|
||||
DRIVE7_02MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
|
||||
slimbus_cfg_func: slimbus_cfg_func {
|
||||
pinctrl-single,pins = <
|
||||
0x034 0x0 /* SLIMBUS_CLK */
|
||||
0x038 0x0 /* SLIMBUS_DATA */
|
||||
>;
|
||||
pinctrl-single,bias-pulldown = <
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
>;
|
||||
pinctrl-single,bias-pullup = <
|
||||
PULL_UP
|
||||
PULL_UP
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
>;
|
||||
pinctrl-single,drive-strength = <
|
||||
DRIVE7_02MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
|
||||
i2s0_cfg_func: i2s0_cfg_func {
|
||||
pinctrl-single,pins = <
|
||||
0x040 0x0 /* I2S0_DI */
|
||||
0x044 0x0 /* I2S0_DO */
|
||||
0x048 0x0 /* I2S0_XCLK */
|
||||
0x04c 0x0 /* I2S0_XFS */
|
||||
>;
|
||||
pinctrl-single,bias-pulldown = <
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
>;
|
||||
pinctrl-single,bias-pullup = <
|
||||
PULL_UP
|
||||
PULL_UP
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
>;
|
||||
pinctrl-single,drive-strength = <
|
||||
DRIVE7_02MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
|
||||
i2s2_cfg_func: i2s2_cfg_func {
|
||||
pinctrl-single,pins = <
|
||||
0x050 0x0 /* I2S2_DI */
|
||||
0x054 0x0 /* I2S2_DO */
|
||||
0x058 0x0 /* I2S2_XCLK */
|
||||
0x05c 0x0 /* I2S2_XFS */
|
||||
>;
|
||||
pinctrl-single,bias-pulldown = <
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
>;
|
||||
pinctrl-single,bias-pullup = <
|
||||
PULL_UP
|
||||
PULL_UP
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
>;
|
||||
pinctrl-single,drive-strength = <
|
||||
DRIVE7_02MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
|
||||
pcie_cfg_func: pcie_cfg_func {
|
||||
pinctrl-single,pins = <
|
||||
0x094 0x0 /* PCIE_CLKREQ_N */
|
||||
0x098 0x0 /* PCIE_WAKE_N */
|
||||
>;
|
||||
pinctrl-single,bias-pulldown = <
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
>;
|
||||
pinctrl-single,bias-pullup = <
|
||||
PULL_UP
|
||||
PULL_UP
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
>;
|
||||
pinctrl-single,drive-strength = <
|
||||
DRIVE7_02MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
|
||||
spi2_cfg_func: spi2_cfg_func {
|
||||
pinctrl-single,pins = <
|
||||
0x09c 0x0 /* SPI2_CLK */
|
||||
0x0a0 0x0 /* SPI2_DI */
|
||||
0x0a4 0x0 /* SPI2_DO */
|
||||
0x0a8 0x0 /* SPI2_CS0_N */
|
||||
>;
|
||||
pinctrl-single,bias-pulldown = <
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
>;
|
||||
pinctrl-single,bias-pullup = <
|
||||
PULL_UP
|
||||
PULL_UP
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
>;
|
||||
pinctrl-single,drive-strength = <
|
||||
DRIVE7_02MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
|
||||
usb_cfg_func: usb_cfg_func {
|
||||
pinctrl-single,pins = <
|
||||
0x0ac 0x0 /* GPIO_219 */
|
||||
>;
|
||||
pinctrl-single,bias-pulldown = <
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
PULL_DIS
|
||||
PULL_DOWN
|
||||
>;
|
||||
pinctrl-single,bias-pullup = <
|
||||
PULL_UP
|
||||
PULL_UP
|
||||
PULL_DIS
|
||||
PULL_UP
|
||||
>;
|
||||
pinctrl-single,drive-strength = <
|
||||
DRIVE7_02MA DRIVE6_MASK
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user