forked from Minki/linux
MIPS: SEAD3: Nuke PIC32 I2C driver.
A platform driver for which nothing ever registers the corresponding
platform device.
Also it was driving the same hardware as sead3-i2c-drv.c so redundant
anyway and couldn't co-exist with that driver because each of them was
using a private spinlock to protect access to the same hardware
resources.
This also fixes a randconfig problem:
arch/mips/mti-sead3/sead3-pic32-i2c-drv.c: In function 'i2c_platform_probe':
arch/mips/mti-sead3/sead3-pic32-i2c-drv.c:345:2: error: implicit declaration of
function 'i2c_add_numbered_adapter' [-Werror=implicit-function-declaration]
ret = i2c_add_numbered_adapter(&priv->adap);
^
arch/mips/mti-sead3/sead3-pic32-i2c-drv.c: In function
'i2c_platform_remove':
arch/mips/mti-sead3/sead3-pic32-i2c-drv.c:361:2: error: implicit declaration
of function 'i2c_del_adapter' [-Werror=implicit-function-declaration]
i2c_del_adapter(&priv->adap);
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
parent
aedd153f5b
commit
cc08d25a88
@ -14,7 +14,6 @@ obj-y := sead3-lcd.o sead3-display.o sead3-init.o \
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sead3-setup.o sead3-time.o
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obj-y += sead3-i2c-dev.o sead3-i2c.o \
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sead3-pic32-i2c-drv.o sead3-pic32-bus.o \
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leds-sead3.o sead3-leds.o
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obj-$(CONFIG_EARLY_PRINTK) += sead3-console.o
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@ -1,102 +0,0 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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*/
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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#include <linux/io.h>
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#include <linux/errno.h>
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#define PIC32_NULL 0x00
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#define PIC32_RD 0x01
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#define PIC32_SYSRD 0x02
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#define PIC32_WR 0x10
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#define PIC32_SYSWR 0x20
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#define PIC32_IRQ_CLR 0x40
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#define PIC32_STATUS 0x80
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#define DELAY() udelay(100) /* FIXME: needed? */
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/* spinlock to ensure atomic access to PIC32 */
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static DEFINE_SPINLOCK(pic32_bus_lock);
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/* FIXME: io_remap these */
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static void __iomem *bus_xfer = (void __iomem *)0xbf000600;
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static void __iomem *bus_status = (void __iomem *)0xbf000060;
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static inline unsigned int ioready(void)
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{
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return readl(bus_status) & 1;
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}
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static inline void wait_ioready(void)
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{
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do { } while (!ioready());
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}
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static inline void wait_ioclear(void)
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{
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do { } while (ioready());
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}
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static inline void check_ioclear(void)
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{
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if (ioready()) {
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pr_debug("ioclear: initially busy\n");
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do {
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(void) readl(bus_xfer);
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DELAY();
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} while (ioready());
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pr_debug("ioclear: cleared busy\n");
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}
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}
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u32 pic32_bus_readl(u32 reg)
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{
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unsigned long flags;
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u32 status, val;
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spin_lock_irqsave(&pic32_bus_lock, flags);
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check_ioclear();
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writel((PIC32_RD << 24) | (reg & 0x00ffffff), bus_xfer);
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DELAY();
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wait_ioready();
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status = readl(bus_xfer);
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DELAY();
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val = readl(bus_xfer);
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wait_ioclear();
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pr_debug("pic32_bus_readl: *%x -> %x (status=%x)\n", reg, val, status);
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spin_unlock_irqrestore(&pic32_bus_lock, flags);
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return val;
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}
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void pic32_bus_writel(u32 val, u32 reg)
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{
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unsigned long flags;
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u32 status;
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spin_lock_irqsave(&pic32_bus_lock, flags);
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check_ioclear();
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writel((PIC32_WR << 24) | (reg & 0x00ffffff), bus_xfer);
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DELAY();
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writel(val, bus_xfer);
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DELAY();
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wait_ioready();
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status = readl(bus_xfer);
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wait_ioclear();
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pr_debug("pic32_bus_writel: *%x <- %x (status=%x)\n", reg, val, status);
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spin_unlock_irqrestore(&pic32_bus_lock, flags);
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}
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@ -1,423 +0,0 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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*/
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/spinlock.h>
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#include <linux/platform_device.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#define PIC32_I2CxCON 0x0000
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#define PIC32_I2CxCONCLR 0x0004
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#define PIC32_I2CxCONSET 0x0008
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#define PIC32_I2CxCONINV 0x000C
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#define I2CCON_ON (1<<15)
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#define I2CCON_FRZ (1<<14)
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#define I2CCON_SIDL (1<<13)
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#define I2CCON_SCLREL (1<<12)
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#define I2CCON_STRICT (1<<11)
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#define I2CCON_A10M (1<<10)
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#define I2CCON_DISSLW (1<<9)
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#define I2CCON_SMEN (1<<8)
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#define I2CCON_GCEN (1<<7)
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#define I2CCON_STREN (1<<6)
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#define I2CCON_ACKDT (1<<5)
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#define I2CCON_ACKEN (1<<4)
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#define I2CCON_RCEN (1<<3)
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#define I2CCON_PEN (1<<2)
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#define I2CCON_RSEN (1<<1)
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#define I2CCON_SEN (1<<0)
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#define PIC32_I2CxSTAT 0x0010
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#define PIC32_I2CxSTATCLR 0x0014
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#define PIC32_I2CxSTATSET 0x0018
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#define PIC32_I2CxSTATINV 0x001C
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#define I2CSTAT_ACKSTAT (1<<15)
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#define I2CSTAT_TRSTAT (1<<14)
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#define I2CSTAT_BCL (1<<10)
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#define I2CSTAT_GCSTAT (1<<9)
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#define I2CSTAT_ADD10 (1<<8)
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#define I2CSTAT_IWCOL (1<<7)
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#define I2CSTAT_I2COV (1<<6)
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#define I2CSTAT_DA (1<<5)
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#define I2CSTAT_P (1<<4)
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#define I2CSTAT_S (1<<3)
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#define I2CSTAT_RW (1<<2)
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#define I2CSTAT_RBF (1<<1)
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#define I2CSTAT_TBF (1<<0)
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#define PIC32_I2CxADD 0x0020
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#define PIC32_I2CxADDCLR 0x0024
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#define PIC32_I2CxADDSET 0x0028
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#define PIC32_I2CxADDINV 0x002C
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#define PIC32_I2CxMSK 0x0030
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#define PIC32_I2CxMSKCLR 0x0034
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#define PIC32_I2CxMSKSET 0x0038
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#define PIC32_I2CxMSKINV 0x003C
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#define PIC32_I2CxBRG 0x0040
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#define PIC32_I2CxBRGCLR 0x0044
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#define PIC32_I2CxBRGSET 0x0048
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#define PIC32_I2CxBRGINV 0x004C
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#define PIC32_I2CxTRN 0x0050
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#define PIC32_I2CxTRNCLR 0x0054
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#define PIC32_I2CxTRNSET 0x0058
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#define PIC32_I2CxTRNINV 0x005C
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#define PIC32_I2CxRCV 0x0060
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struct i2c_platform_data {
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u32 base;
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struct i2c_adapter adap;
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u32 xfer_timeout;
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u32 ack_timeout;
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u32 ctl_timeout;
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};
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extern u32 pic32_bus_readl(u32 reg);
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extern void pic32_bus_writel(u32 val, u32 reg);
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static inline void
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StartI2C(struct i2c_platform_data *adap)
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{
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pr_debug("StartI2C\n");
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pic32_bus_writel(I2CCON_SEN, adap->base + PIC32_I2CxCONSET);
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}
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static inline void
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StopI2C(struct i2c_platform_data *adap)
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{
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pr_debug("StopI2C\n");
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pic32_bus_writel(I2CCON_PEN, adap->base + PIC32_I2CxCONSET);
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}
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static inline void
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AckI2C(struct i2c_platform_data *adap)
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{
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pr_debug("AckI2C\n");
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pic32_bus_writel(I2CCON_ACKDT, adap->base + PIC32_I2CxCONCLR);
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pic32_bus_writel(I2CCON_ACKEN, adap->base + PIC32_I2CxCONSET);
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}
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static inline void
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NotAckI2C(struct i2c_platform_data *adap)
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{
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pr_debug("NakI2C\n");
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pic32_bus_writel(I2CCON_ACKDT, adap->base + PIC32_I2CxCONSET);
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pic32_bus_writel(I2CCON_ACKEN, adap->base + PIC32_I2CxCONSET);
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}
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static inline int
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IdleI2C(struct i2c_platform_data *adap)
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{
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int i;
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pr_debug("IdleI2C\n");
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for (i = 0; i < adap->ctl_timeout; i++) {
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if (((pic32_bus_readl(adap->base + PIC32_I2CxCON) &
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(I2CCON_ACKEN | I2CCON_RCEN | I2CCON_PEN | I2CCON_RSEN |
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I2CCON_SEN)) == 0) &&
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((pic32_bus_readl(adap->base + PIC32_I2CxSTAT) &
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(I2CSTAT_TRSTAT)) == 0))
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return 0;
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udelay(1);
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}
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return -ETIMEDOUT;
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}
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static inline u32
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MasterWriteI2C(struct i2c_platform_data *adap, u32 byte)
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{
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pr_debug("MasterWriteI2C\n");
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pic32_bus_writel(byte, adap->base + PIC32_I2CxTRN);
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return pic32_bus_readl(adap->base + PIC32_I2CxSTAT) & I2CSTAT_IWCOL;
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}
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static inline u32
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MasterReadI2C(struct i2c_platform_data *adap)
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{
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pr_debug("MasterReadI2C\n");
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pic32_bus_writel(I2CCON_RCEN, adap->base + PIC32_I2CxCONSET);
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while (pic32_bus_readl(adap->base + PIC32_I2CxCON) & I2CCON_RCEN)
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;
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pic32_bus_writel(I2CSTAT_I2COV, adap->base + PIC32_I2CxSTATCLR);
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return pic32_bus_readl(adap->base + PIC32_I2CxRCV);
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}
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static int
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do_address(struct i2c_platform_data *adap, unsigned int addr, int rd)
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{
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pr_debug("doaddress\n");
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IdleI2C(adap);
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StartI2C(adap);
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IdleI2C(adap);
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addr <<= 1;
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if (rd)
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addr |= 1;
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if (MasterWriteI2C(adap, addr))
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return -EIO;
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IdleI2C(adap);
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if (pic32_bus_readl(adap->base + PIC32_I2CxSTAT) & I2CSTAT_ACKSTAT)
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return -EIO;
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return 0;
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}
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static int
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i2c_read(struct i2c_platform_data *adap, unsigned char *buf,
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unsigned int len)
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{
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int i;
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u32 data;
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pr_debug("i2c_read\n");
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i = 0;
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while (i < len) {
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data = MasterReadI2C(adap);
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buf[i++] = data;
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if (i < len)
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AckI2C(adap);
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else
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NotAckI2C(adap);
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}
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StopI2C(adap);
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IdleI2C(adap);
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return 0;
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}
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static int
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i2c_write(struct i2c_platform_data *adap, unsigned char *buf,
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unsigned int len)
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{
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int i;
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u32 data;
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pr_debug("i2c_write\n");
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i = 0;
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while (i < len) {
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data = buf[i];
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if (MasterWriteI2C(adap, data))
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return -EIO;
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IdleI2C(adap);
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if (pic32_bus_readl(adap->base + PIC32_I2CxSTAT) &
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I2CSTAT_ACKSTAT)
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return -EIO;
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i++;
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}
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StopI2C(adap);
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IdleI2C(adap);
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return 0;
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}
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static int
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platform_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num)
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{
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struct i2c_platform_data *adap = i2c_adap->algo_data;
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struct i2c_msg *p;
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int i, err = 0;
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pr_debug("platform_xfer\n");
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for (i = 0; i < num; i++) {
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#define __BUFSIZE 80
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int ii;
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static char buf[__BUFSIZE];
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char *b = buf;
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p = &msgs[i];
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b += sprintf(buf, " [%d bytes]", p->len);
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if ((p->flags & I2C_M_RD) == 0) {
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for (ii = 0; ii < p->len; ii++) {
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if (b < &buf[__BUFSIZE-4]) {
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b += sprintf(b, " %02x", p->buf[ii]);
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} else {
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strcat(b, "...");
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break;
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}
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}
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}
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pr_debug("xfer%d: DevAddr: %04x Op:%s Data:%s\n", i, p->addr,
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(p->flags & I2C_M_RD) ? "Rd" : "Wr", buf);
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}
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for (i = 0; !err && i < num; i++) {
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p = &msgs[i];
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err = do_address(adap, p->addr, p->flags & I2C_M_RD);
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if (err || !p->len)
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continue;
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if (p->flags & I2C_M_RD)
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err = i2c_read(adap, p->buf, p->len);
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else
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err = i2c_write(adap, p->buf, p->len);
|
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}
|
||||
|
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/* Return the number of messages processed, or the error code. */
|
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if (err == 0)
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err = num;
|
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|
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return err;
|
||||
}
|
||||
|
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static u32
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platform_func(struct i2c_adapter *adap)
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{
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pr_debug("platform_algo\n");
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
|
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}
|
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|
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static const struct i2c_algorithm platform_algo = {
|
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.master_xfer = platform_xfer,
|
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.functionality = platform_func,
|
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};
|
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|
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static void i2c_platform_setup(struct i2c_platform_data *priv)
|
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{
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pr_debug("i2c_platform_setup\n");
|
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|
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pic32_bus_writel(500, priv->base + PIC32_I2CxBRG);
|
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pic32_bus_writel(I2CCON_ON, priv->base + PIC32_I2CxCONCLR);
|
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pic32_bus_writel(I2CCON_ON, priv->base + PIC32_I2CxCONSET);
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pic32_bus_writel((I2CSTAT_BCL | I2CSTAT_IWCOL),
|
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(priv->base + PIC32_I2CxSTATCLR));
|
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}
|
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static void i2c_platform_disable(struct i2c_platform_data *priv)
|
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{
|
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pr_debug("i2c_platform_disable\n");
|
||||
}
|
||||
|
||||
static int i2c_platform_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct i2c_platform_data *priv;
|
||||
struct resource *r;
|
||||
int ret;
|
||||
|
||||
pr_debug("i2c_platform_probe\n");
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
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if (!r)
|
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return -ENODEV;
|
||||
|
||||
priv = devm_kzalloc(&pdev->dev, sizeof(struct i2c_platform_data),
|
||||
GFP_KERNEL);
|
||||
if (!priv)
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||||
return -ENOMEM;
|
||||
|
||||
/* FIXME: need to allocate resource in PIC32 space */
|
||||
#if 0
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||||
priv->base = bus_request_region(r->start, resource_size(r),
|
||||
pdev->name);
|
||||
#else
|
||||
priv->base = r->start;
|
||||
#endif
|
||||
if (!priv->base)
|
||||
return -EBUSY;
|
||||
|
||||
priv->xfer_timeout = 200;
|
||||
priv->ack_timeout = 200;
|
||||
priv->ctl_timeout = 200;
|
||||
|
||||
priv->adap.nr = pdev->id;
|
||||
priv->adap.algo = &platform_algo;
|
||||
priv->adap.algo_data = priv;
|
||||
priv->adap.dev.parent = &pdev->dev;
|
||||
strlcpy(priv->adap.name, "PIC32 I2C", sizeof(priv->adap.name));
|
||||
|
||||
i2c_platform_setup(priv);
|
||||
|
||||
ret = i2c_add_numbered_adapter(&priv->adap);
|
||||
if (ret) {
|
||||
i2c_platform_disable(priv);
|
||||
return ret;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, priv);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int i2c_platform_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct i2c_platform_data *priv = platform_get_drvdata(pdev);
|
||||
|
||||
pr_debug("i2c_platform_remove\n");
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
i2c_del_adapter(&priv->adap);
|
||||
i2c_platform_disable(priv);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int
|
||||
i2c_platform_suspend(struct platform_device *pdev, pm_message_t state)
|
||||
{
|
||||
struct i2c_platform_data *priv = platform_get_drvdata(pdev);
|
||||
|
||||
dev_dbg(&pdev->dev, "i2c_platform_disable\n");
|
||||
i2c_platform_disable(priv);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
i2c_platform_resume(struct platform_device *pdev)
|
||||
{
|
||||
struct i2c_platform_data *priv = platform_get_drvdata(pdev);
|
||||
|
||||
dev_dbg(&pdev->dev, "i2c_platform_setup\n");
|
||||
i2c_platform_setup(priv);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
#define i2c_platform_suspend NULL
|
||||
#define i2c_platform_resume NULL
|
||||
#endif
|
||||
|
||||
static struct platform_driver i2c_platform_driver = {
|
||||
.driver = {
|
||||
.name = "i2c_pic32",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
.probe = i2c_platform_probe,
|
||||
.remove = i2c_platform_remove,
|
||||
.suspend = i2c_platform_suspend,
|
||||
.resume = i2c_platform_resume,
|
||||
};
|
||||
|
||||
static int __init
|
||||
i2c_platform_init(void)
|
||||
{
|
||||
pr_debug("i2c_platform_init\n");
|
||||
return platform_driver_register(&i2c_platform_driver);
|
||||
}
|
||||
|
||||
static void __exit
|
||||
i2c_platform_exit(void)
|
||||
{
|
||||
pr_debug("i2c_platform_exit\n");
|
||||
platform_driver_unregister(&i2c_platform_driver);
|
||||
}
|
||||
|
||||
MODULE_AUTHOR("Chris Dearman, MIPS Technologies INC.");
|
||||
MODULE_DESCRIPTION("PIC32 I2C driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
module_init(i2c_platform_init);
|
||||
module_exit(i2c_platform_exit);
|
||||
Loading…
Reference in New Issue
Block a user