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ARM: shmobile: lager: Fix QSPI mode of SPI-Flash into mode3

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In order to change into mode3, CPOL and CPHA bit of SPCMD register
of QSPI is changed. Mode3 can avoid intermediate voltage.

Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
[horms: Updated changelog and re-ordered properties]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Hisashi Nakamura 2014-12-10 11:30:27 +09:00 committed by Simon Horman
parent be16cd385c
commit cbf4116833
1 changed files with 2 additions and 0 deletions
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2
arch/arm/boot/dts/r8a7790-lager.dts
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@ -397,6 +397,8 @@
spi-max-frequency = <30000000>; spi-max-frequency = <30000000>;
spi-tx-bus-width = <4>; spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>; spi-rx-bus-width = <4>;
spi-cpha;
spi-cpol;
m25p,fast-read; m25p,fast-read;
partition@0 { partition@0 {