drm/i915: Disable Render power gating

When RC6 along with Render power gating is enabled, GPU hang
happens due to lack of synchronization between GTI and Render
power gating.

v2: Updated commit message and WA name (Damien)

Change-Id: If1614206341eb52a21eadae8c5ebb2655029b50c
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Sagar Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Sagar Kamble 2015-04-12 11:28:14 +05:30 committed by Daniel Vetter
parent 9bdbd0b911
commit cb07bae0c4

View File

@ -4346,9 +4346,12 @@ static void gen9_enable_rc6(struct drm_device *dev)
GEN6_RC_CTL_EI_MODE(1) |
rc6_mask);
/* 3b: Enable Coarse Power Gating only when RC6 is enabled */
/*
* 3b: Enable Coarse Power Gating only when RC6 is enabled.
* WaDisableRenderPowerGating:skl,bxt - Render PG need to be disabled with RC6.
*/
I915_WRITE(GEN9_PG_ENABLE, (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ?
(GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE) : 0);
GEN9_MEDIA_PG_ENABLE : 0);
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);