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ARC: [mm] serious bug in vaddr based icache flush

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vaddr used to index the cache was clipped from the wrong end, and thus
would potentially fail to flush the correct lines.

The problem was dorment for so long because up until the recent
optimizations it was only used for ptrace break-point only flushes.

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
This commit is contained in:
Vineet Gupta 2013-05-09 13:45:12 +05:30
parent eacd0e950d
commit c917a36f5f
1 changed files with 1 additions and 1 deletions
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arch/arc/mm/cache_arc700.c
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@ -421,7 +421,7 @@ static void __ic_line_inv_vaddr(unsigned long phy_start, unsigned long vaddr,
num_lines = DIV_ROUND_UP(sz, ARC_ICACHE_LINE_LEN);
#if (CONFIG_ARC_MMU_VER > 2)
vaddr &= ~ICACHE_LINE_MASK;
vaddr &= ICACHE_LINE_MASK;
addr = phy_start;
#else
/* bits 17:13 of vaddr go as bits 4:0 of paddr */