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powerpc/mm/book3s-64: Shuffle read, write, execute and user bits in PTE

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This moves the _PAGE_EXEC, _PAGE_RW and _PAGE_USER bits around in
the Linux PTE on 64-bit Book 3S systems to correspond with the bit
positions used in radix mode by PowerISA v3.0 CPUs.  This also adds
a _PAGE_READ bit corresponding to the read permission bit in the
radix PTE.  _PAGE_READ is currently unused but could possibly be used
in future to improve pte_protnone().

Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Paul Mackerras 2016-02-22 13:41:18 +11:00 committed by Michael Ellerman
parent a9d4996df1
commit c915df162d
1 changed files with 6 additions and 4 deletions
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10
arch/powerpc/include/asm/book3s/64/hash.h
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@ -13,9 +13,12 @@
* We could create separate kernel read-only if we used the 3 PP bits
* combinations that newer processors provide but we currently don't.
*/
#define _PAGE_BIT_SWAP_TYPE 2
#define _PAGE_USER 0x00004 /* page may be accessed by userspace */
#define _PAGE_EXEC 0x00008 /* execute permission */
#define _PAGE_BIT_SWAP_TYPE 0
#define _PAGE_EXEC 0x00001 /* execute permission */
#define _PAGE_RW 0x00002 /* read & write access allowed */
#define _PAGE_READ 0x00004 /* read access allowed */
#define _PAGE_USER 0x00008 /* page may be accessed by userspace */
#define _PAGE_GUARDED 0x00010 /* G: guarded (side-effect) page */
/* M (memory coherence) is always set in the HPTE, so we don't need it here */
#define _PAGE_COHERENT 0x0
@ -23,7 +26,6 @@
#define _PAGE_WRITETHRU 0x00040 /* W: cache write-through */
#define _PAGE_DIRTY 0x00080 /* C: page changed */
#define _PAGE_ACCESSED 0x00100 /* R: page referenced */
#define _PAGE_RW 0x00200 /* software: user write access allowed */
#define _PAGE_BUSY 0x00800 /* software: PTE & hash are busy */
#define _PAGE_SPECIAL 0x10000 /* software: special page */