forked from Minki/linux
staging: comedi: ni_at_ao: tidy up CFG1 register defines
Rename the defines for the CFG1 register so they have namespace associated with the driver. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -96,20 +96,20 @@ Configuration options:
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#define MODE1 (1 << 2)
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#define MODE0 (1 << 1)
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#define BCD (1 << 0)
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#define ATAO_CFG1 0x0a /* W 16 */
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#define EXTINT2EN (1 << 15)
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#define EXTINT1EN (1 << 14)
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#define CNTINT2EN (1 << 13)
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#define CNTINT1EN (1 << 12)
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#define TCINTEN (1 << 11)
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#define CNT1SRC (1 << 10)
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#define CNT2SRC (1 << 9)
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#define FIFOEN (1 << 8)
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#define GRP2WR (1 << 7)
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#define EXTUPDEN (1 << 6)
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#define DMARQ (1 << 5)
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#define DMAEN (1 << 4)
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#define CH_mask (0xf << 0)
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#define ATAO_CFG1_REG 0x0a
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#define ATAO_CFG1_EXTINT2EN (1 << 15)
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#define ATAO_CFG1_EXTINT1EN (1 << 14)
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#define ATAO_CFG1_CNTINT2EN (1 << 13)
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#define ATAO_CFG1_CNTINT1EN (1 << 12)
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#define ATAO_CFG1_TCINTEN (1 << 11)
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#define ATAO_CFG1_CNT1SRC (1 << 10)
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#define ATAO_CFG1_CNT2SRC (1 << 9)
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#define ATAO_CFG1_FIFOEN (1 << 8)
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#define ATAO_CFG1_GRP2WR (1 << 7)
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#define ATAO_CFG1_EXTUPDEN (1 << 6)
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#define ATAO_CFG1_DMARQ (1 << 5)
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#define ATAO_CFG1_DMAEN (1 << 4)
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#define ATAO_CFG1_CH(x) (((x) & 0xf) << 0)
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#define ATAO_STATUS 0x0a /* R 16 */
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#define FH (1 << 6)
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#define FE (1 << 5)
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@ -158,7 +158,7 @@ static void atao_reset(struct comedi_device *dev)
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/* This is the reset sequence described in the manual */
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devpriv->cfg1 = 0;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
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outb(RWSEL0 | MODESEL2, dev->iobase + ATAO_82C53_CNTRCMD);
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outb(0x03, dev->iobase + ATAO_82C53_CNTR1);
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@ -172,15 +172,15 @@ static void atao_reset(struct comedi_device *dev)
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inw(dev->iobase + ATAO_FIFO_CLEAR);
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devpriv->cfg1 |= GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
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devpriv->cfg1 |= ATAO_CFG1_GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
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outw(0, dev->iobase + ATAO_2_INT1CLR);
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outw(0, dev->iobase + ATAO_2_INT2CLR);
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outw(0, dev->iobase + ATAO_2_DMATCCLR);
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devpriv->cfg1 &= ~GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
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devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
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}
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static int atao_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
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@ -194,13 +194,13 @@ static int atao_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
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for (i = 0; i < insn->n; i++) {
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bits = data[i] - 0x800;
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if (chan == 0) {
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devpriv->cfg1 |= GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
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devpriv->cfg1 |= ATAO_CFG1_GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
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}
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outw(bits, dev->iobase + ATAO_DACn(chan));
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if (chan == 0) {
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devpriv->cfg1 &= ~GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1);
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devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR;
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outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
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}
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devpriv->ao_readback[chan] = data[i];
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}
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