drm/amdgpu: initialize IP offset for navy_flounder

since navy_flounder has the same ip offset with sienna_cichlid,
follow sienna_cichlid setting for the moment.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Tao Zhou <Tao.Zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Jiansong Chen 2020-02-11 14:00:39 +08:00 committed by Alex Deucher
parent 543aa2595c
commit c8c959f601

View File

@ -424,6 +424,7 @@ legacy_init:
navi12_reg_base_init(adev);
break;
case CHIP_SIENNA_CICHLID:
case CHIP_NAVY_FLOUNDER:
sienna_cichlid_reg_base_init(adev);
break;
default: