arm64: dts: qcom: msm8992: Fix SDHCI1

This commit ensures the correct IRQ type is set
and disables the device by default.
The mmc-hs400-1_8v property is also moved to
Bullhead as it might not be present on all boards.

The node has been renamed to sdhci@ instead of mmc@
and the phandle was changed to sdhc_1 to comply with
the newer DTS style.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200625182118.131476-3-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Konrad Dybcio 2020-06-25 20:21:06 +02:00 committed by Bjorn Andersson
parent d99c1c2a1a
commit c83e0951bc
2 changed files with 15 additions and 7 deletions

View File

@ -271,3 +271,9 @@
}; };
}; };
}; };
&sdhc_1 {
status = "okay";
mmc-hs400-1_8v;
};

View File

@ -158,18 +158,19 @@
}; };
}; };
sdhci1: mmc@f9824900 { sdhc_1: sdhci@f9824900 {
compatible = "qcom,sdhci-msm-v4"; compatible = "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>; reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>;
reg-names = "hc_mem", "core_mem"; reg-names = "hc_mem", "core_mem";
interrupts = <GIC_SPI 123 IRQ_TYPE_NONE>, interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_NONE>; <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq"; interrupt-names = "hc_irq", "pwr_irq";
clocks = <&gcc GCC_SDCC1_APPS_CLK>, clocks = <&gcc GCC_SDCC1_APPS_CLK>,
<&gcc GCC_SDCC1_AHB_CLK>; <&gcc GCC_SDCC1_AHB_CLK>,
clock-names = "core", "iface"; <&xo_board>;
clock-names = "core", "iface", "xo";
pinctrl-names = "default", "sleep"; pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on
@ -179,8 +180,9 @@
regulator-always-on; regulator-always-on;
bus-width = <8>; bus-width = <8>;
mmc-hs400-1_8v; non-removable;
status = "okay";
status = "disabled";
}; };
blsp1_uart2: serial@f991e000 { blsp1_uart2: serial@f991e000 {