drm/i915: Use ring->flush() instead of MI_FLUSH
Use the ring abstraction to hide the details of having choose the appropriate flushing method. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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@ -1001,6 +1001,10 @@ void i915_gem_retire_requests(struct drm_device *dev);
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void i915_gem_reset_flushing_list(struct drm_device *dev);
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void i915_gem_reset_inactive_gpu_domains(struct drm_device *dev);
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void i915_gem_clflush_object(struct drm_gem_object *obj);
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void i915_gem_flush_ring(struct drm_device *dev,
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struct intel_ring_buffer *ring,
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uint32_t invalidate_domains,
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uint32_t flush_domains);
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int i915_gem_object_set_domain(struct drm_gem_object *obj,
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uint32_t read_domains,
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uint32_t write_domain);
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@ -1908,7 +1908,7 @@ i915_wait_request(struct drm_device *dev, uint32_t seqno,
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return i915_do_wait_request(dev, seqno, 1, ring);
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}
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static void
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void
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i915_gem_flush_ring(struct drm_device *dev,
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struct intel_ring_buffer *ring,
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uint32_t invalidate_domains,
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@ -5056,24 +5056,23 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
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atomic_inc(&obj_priv->pending_flip);
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work->pending_flip_obj = obj;
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if (was_dirty || IS_GEN3(dev) || IS_GEN2(dev)) {
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/* Schedule the pipelined flush */
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if (was_dirty)
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i915_gem_flush_ring(dev, obj_priv->ring, 0, was_dirty);
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if (IS_GEN3(dev) || IS_GEN2(dev)) {
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u32 flip_mask;
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/* Can't queue multiple flips, so wait for the previous
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* one to finish before executing the next.
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*/
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BEGIN_LP_RING(2);
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if (IS_GEN3(dev) || IS_GEN2(dev)) {
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u32 flip_mask;
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/* Can't queue multiple flips, so wait for the previous
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* one to finish before executing the next.
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*/
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if (intel_crtc->plane)
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flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
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else
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flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
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OUT_RING(MI_WAIT_FOR_EVENT | flip_mask);
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} else
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OUT_RING(MI_NOOP);
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OUT_RING(MI_FLUSH);
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if (intel_crtc->plane)
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flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
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else
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flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
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OUT_RING(MI_WAIT_FOR_EVENT | flip_mask);
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OUT_RING(MI_NOOP);
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ADVANCE_LP_RING();
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}
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