forked from Minki/linux
drm/amdgpu/gmc9: no need use kiq in vega10 tlb flush
two reasons: 1. there is a spinlock around; 2. vm register is pf/vf copy, vf can access via mmio safely. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -197,11 +197,11 @@ static void gmc_v9_0_gart_flush_gpu_tlb(struct amdgpu_device *adev,
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struct amdgpu_vmhub *hub = &adev->vmhub[i];
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u32 tmp = hub->get_invalidate_req(vmid);
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WREG32(hub->vm_inv_eng0_req + eng, tmp);
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WREG32_NO_KIQ(hub->vm_inv_eng0_req + eng, tmp);
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/* Busy wait for ACK.*/
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for (j = 0; j < 100; j++) {
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tmp = RREG32(hub->vm_inv_eng0_ack + eng);
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tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_ack + eng);
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tmp &= 1 << vmid;
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if (tmp)
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break;
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@ -212,7 +212,7 @@ static void gmc_v9_0_gart_flush_gpu_tlb(struct amdgpu_device *adev,
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/* Wait for ACK with a delay.*/
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for (j = 0; j < adev->usec_timeout; j++) {
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tmp = RREG32(hub->vm_inv_eng0_ack + eng);
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tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_ack + eng);
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tmp &= 1 << vmid;
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if (tmp)
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break;
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