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drm/amd/display: Use VUPDATE_NO_LOCK instead of VUPDATE for dcn30

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[Why]
Soft hangs occur when FreeSync is engaged since we utilize VUPDATE
(which doesn't fire when holding the pipe lock) to send back vblank
events when FreeSync is active.

[How]
The alternative (working) interrupt source for this mechanism is
VUPDATE_NO_LOCK. We already use this all other DCN revisions so align
dcn30 with those as well.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Nicholas Kazlauskas 2020-07-08 13:29:58 -04:00 committed by Alex Deucher
parent 131a3c7474
commit c74f932248
1 changed files with 18 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
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@ -169,6 +169,11 @@ static const struct irq_source_info_funcs pflip_irq_info_funcs = {
.ack = NULL .ack = NULL
}; };
static const struct irq_source_info_funcs vupdate_no_lock_irq_info_funcs = {
.set = NULL,
.ack = NULL
};
static const struct irq_source_info_funcs vblank_irq_info_funcs = { static const struct irq_source_info_funcs vblank_irq_info_funcs = {
.set = NULL, .set = NULL,
.ack = NULL .ack = NULL
@ -228,12 +233,15 @@ static const struct irq_source_info_funcs vblank_irq_info_funcs = {
.funcs = &pflip_irq_info_funcs\ .funcs = &pflip_irq_info_funcs\
} }
#define vupdate_int_entry(reg_num)\ /* vupdate_no_lock_int_entry maps to DC_IRQ_SOURCE_VUPDATEx, to match semantic
* of DCE's DC_IRQ_SOURCE_VUPDATEx.
*/
#define vupdate_no_lock_int_entry(reg_num)\
[DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\ [DC_IRQ_SOURCE_VUPDATE1 + reg_num] = {\
IRQ_REG_ENTRY(OTG, reg_num,\ IRQ_REG_ENTRY(OTG, reg_num,\
OTG_GLOBAL_SYNC_STATUS, VUPDATE_INT_EN,\ OTG_GLOBAL_SYNC_STATUS, VUPDATE_NO_LOCK_INT_EN,\
OTG_GLOBAL_SYNC_STATUS, VUPDATE_EVENT_CLEAR),\ OTG_GLOBAL_SYNC_STATUS, VUPDATE_NO_LOCK_EVENT_CLEAR),\
.funcs = &vblank_irq_info_funcs\ .funcs = &vupdate_no_lock_irq_info_funcs\
} }
#define vblank_int_entry(reg_num)\ #define vblank_int_entry(reg_num)\
@ -340,12 +348,12 @@ irq_source_info_dcn30[DAL_IRQ_SOURCES_NUMBER] = {
dc_underflow_int_entry(6), dc_underflow_int_entry(6),
[DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(), [DC_IRQ_SOURCE_DMCU_SCP] = dummy_irq_entry(),
[DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(), [DC_IRQ_SOURCE_VBIOS_SW] = dummy_irq_entry(),
vupdate_int_entry(0), vupdate_no_lock_int_entry(0),
vupdate_int_entry(1), vupdate_no_lock_int_entry(1),
vupdate_int_entry(2), vupdate_no_lock_int_entry(2),
vupdate_int_entry(3), vupdate_no_lock_int_entry(3),
vupdate_int_entry(4), vupdate_no_lock_int_entry(4),
vupdate_int_entry(5), vupdate_no_lock_int_entry(5),
vblank_int_entry(0), vblank_int_entry(0),
vblank_int_entry(1), vblank_int_entry(1),
vblank_int_entry(2), vblank_int_entry(2),