forked from Minki/linux
mvebu arm64 for 4.6 (part 1)
Non dt part of the Armada 3700 support: - Kconfig update - defconfig update - documentation update (including MAINTAINERS:) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEUEABECAAYFAlbElN0ACgkQCwYYjhRyO9XkzgCfaYJggCHzsLpMvnTK1bMNgPCY jYkAmOIRjMJskq40RBXSXpyoJboqyZs= =tAva -----END PGP SIGNATURE----- Merge tag 'mvebu-arm64-4.6-1' of git://git.infradead.org/linux-mvebu into next/arm64 mvebu arm64 for 4.6 (part 1) Non dt part of the Armada 3700 support: - Kconfig update - defconfig update - documentation update (including MAINTAINERS:) * tag 'mvebu-arm64-4.6-1' of git://git.infradead.org/linux-mvebu: arm64: defconfig: enable Armada 3700 related config Documentation: arm: update supported Marvell EBU processors MAINTAINERS: Extend dts entry for ARM64 mvebu files arm64: add mvebu architecture entry irqchip/armada-370-xp: Do not enable it by default when ARCH_MVEBU is selected ARM: mvebu: Use the ARMADA_370_XP_IRQ option irqchip/armada-370-xp: Allow allocation of multiple MSIs irqchip/armada-370-xp: Use shorter names for irq_chip irqchip/armada-370-xp: Use PCI_MSI_DOORBELL_START where appropriate irqchip/armada-370-xp: Use the generic MSI infrastructure irqchip/armada-370-xp: Add Kconfig option for the driver Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
c74f162e84
@ -118,6 +118,19 @@ EBU Armada family
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Linux kernel mach directory: arch/arm/mach-mvebu
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Linux kernel plat directory: none
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EBU Armada family ARMv8
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-----------------------
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Armada 3710/3720 Flavors:
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88F3710
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88F3720
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Core: ARM Cortex A53 (ARMv8)
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Homepage : http://www.marvell.com/embedded-processors/armada-3700/
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Device tree descritpion located in arch/arm64/boot/dts/marvell/armada-37*
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Avanta family
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-------------
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@ -1278,6 +1278,7 @@ F: arch/arm/mach-mvebu/
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F: drivers/rtc/rtc-armada38x.c
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F: arch/arm/boot/dts/armada*
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F: arch/arm/boot/dts/kirkwood*
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F: arch/arm64/boot/dts/marvell/armada*
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ARM/Marvell Berlin SoC support
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@ -3,7 +3,6 @@ menuconfig ARCH_MVEBU
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depends on ARCH_MULTI_V7 || ARCH_MULTI_V5
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select ARCH_SUPPORTS_BIG_ENDIAN
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select CLKSRC_MMIO
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select GENERIC_IRQ_CHIP
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select PINCTRL
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select PLAT_ORION
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select SOC_BUS
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@ -29,6 +28,7 @@ config MACH_ARMADA_370
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bool "Marvell Armada 370 boards"
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depends on ARCH_MULTI_V7
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select ARMADA_370_CLK
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select ARMADA_370_XP_IRQ
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select CPU_PJ4B
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select MACH_MVEBU_V7
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select PINCTRL_ARMADA_370
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@ -39,6 +39,7 @@ config MACH_ARMADA_370
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config MACH_ARMADA_375
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bool "Marvell Armada 375 boards"
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depends on ARCH_MULTI_V7
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select ARMADA_370_XP_IRQ
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select ARM_ERRATA_720789
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select ARM_ERRATA_753970
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select ARM_GIC
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@ -58,6 +59,7 @@ config MACH_ARMADA_38X
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select ARM_ERRATA_720789
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select ARM_ERRATA_753970
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select ARM_GIC
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select ARMADA_370_XP_IRQ
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select ARMADA_38X_CLK
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select HAVE_ARM_SCU
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select HAVE_ARM_TWD if SMP
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@ -72,6 +74,7 @@ config MACH_ARMADA_39X
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bool "Marvell Armada 39x boards"
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depends on ARCH_MULTI_V7
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select ARM_GIC
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select ARMADA_370_XP_IRQ
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select ARMADA_39X_CLK
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select CACHE_L2X0
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select HAVE_ARM_SCU
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@ -86,6 +89,7 @@ config MACH_ARMADA_39X
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config MACH_ARMADA_XP
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bool "Marvell Armada XP boards"
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depends on ARCH_MULTI_V7
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select ARMADA_370_XP_IRQ
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select ARMADA_XP_CLK
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select CPU_PJ4B
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select MACH_MVEBU_V7
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@ -48,6 +48,12 @@ config ARCH_MEDIATEK
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help
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Support for Mediatek MT65xx & MT81xx ARMv8 SoCs
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config ARCH_MVEBU
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bool "Marvell EBU SoC Family"
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help
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This enables support for Marvell EBU family such as the
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Armada 3700 SoC family.
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config ARCH_QCOM
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bool "Qualcomm Platforms"
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select PINCTRL
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@ -36,6 +36,7 @@ CONFIG_ARCH_EXYNOS7=y
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CONFIG_ARCH_LAYERSCAPE=y
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CONFIG_ARCH_HISI=y
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CONFIG_ARCH_MEDIATEK=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_ARCH_QCOM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_ARCH_SEATTLE=y
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@ -95,6 +96,7 @@ CONFIG_ATA=y
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CONFIG_SATA_AHCI=y
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CONFIG_SATA_AHCI_PLATFORM=y
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CONFIG_AHCI_CEVA=y
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CONFIG_AHCI_MVEBU=y
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CONFIG_AHCI_XGENE=y
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CONFIG_SATA_RCAR=y
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CONFIG_PATA_PLATFORM=y
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@ -136,6 +138,7 @@ CONFIG_SERIAL_MSM=y
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CONFIG_SERIAL_MSM_CONSOLE=y
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CONFIG_SERIAL_XILINX_PS_UART=y
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CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
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CONFIG_SERIAL_MVEBU_UART=y
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CONFIG_VIRTIO_CONSOLE=y
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# CONFIG_HW_RANDOM is not set
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CONFIG_I2C_QUP=y
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@ -171,6 +174,8 @@ CONFIG_SND_SOC_RCAR=y
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CONFIG_SND_SOC_AK4613=y
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CONFIG_USB=y
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CONFIG_USB_OTG=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_PLATFORM=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_MSM=y
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CONFIG_USB_EHCI_HCD_PLATFORM=y
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@ -60,6 +60,11 @@ config ARM_VIC_NR
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The maximum number of VICs available in the system, for
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power management.
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config ARMADA_370_XP_IRQ
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bool
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select GENERIC_IRQ_CHIP
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select PCI_MSI_IRQ_DOMAIN if PCI_MSI
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config ATMEL_AIC_IRQ
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bool
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select GENERIC_IRQ_CHIP
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@ -5,7 +5,6 @@ obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
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obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o
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obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o
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obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
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obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o
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obj-$(CONFIG_IRQ_MXS) += irq-mxs.o
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obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
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obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
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@ -28,6 +27,7 @@ obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-pci-msi.o irq-g
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obj-$(CONFIG_HISILICON_IRQ_MBIGEN) += irq-mbigen.o
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obj-$(CONFIG_ARM_NVIC) += irq-nvic.o
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obj-$(CONFIG_ARM_VIC) += irq-vic.o
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obj-$(CONFIG_ARMADA_370_XP_IRQ) += irq-armada-370-xp.o
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obj-$(CONFIG_ATMEL_AIC_IRQ) += irq-atmel-aic-common.o irq-atmel-aic.o
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obj-$(CONFIG_ATMEL_AIC5_IRQ) += irq-atmel-aic-common.o irq-atmel-aic5.o
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obj-$(CONFIG_I8259) += irq-i8259.o
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@ -71,6 +71,7 @@ static u32 doorbell_mask_reg;
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static int parent_irq;
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#ifdef CONFIG_PCI_MSI
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static struct irq_domain *armada_370_xp_msi_domain;
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static struct irq_domain *armada_370_xp_msi_inner_domain;
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static DECLARE_BITMAP(msi_used, PCI_MSI_DOORBELL_NR);
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static DEFINE_MUTEX(msi_used_lock);
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static phys_addr_t msi_doorbell_addr;
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@ -115,127 +116,102 @@ static void armada_370_xp_irq_unmask(struct irq_data *d)
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#ifdef CONFIG_PCI_MSI
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static int armada_370_xp_alloc_msi(void)
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{
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int hwirq;
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mutex_lock(&msi_used_lock);
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hwirq = find_first_zero_bit(&msi_used, PCI_MSI_DOORBELL_NR);
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if (hwirq >= PCI_MSI_DOORBELL_NR)
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hwirq = -ENOSPC;
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else
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set_bit(hwirq, msi_used);
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mutex_unlock(&msi_used_lock);
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return hwirq;
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}
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static void armada_370_xp_free_msi(int hwirq)
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{
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mutex_lock(&msi_used_lock);
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if (!test_bit(hwirq, msi_used))
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pr_err("trying to free unused MSI#%d\n", hwirq);
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else
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clear_bit(hwirq, msi_used);
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mutex_unlock(&msi_used_lock);
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}
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static int armada_370_xp_setup_msi_irq(struct msi_controller *chip,
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struct pci_dev *pdev,
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struct msi_desc *desc)
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{
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struct msi_msg msg;
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int virq, hwirq;
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/* We support MSI, but not MSI-X */
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if (desc->msi_attrib.is_msix)
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return -EINVAL;
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hwirq = armada_370_xp_alloc_msi();
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if (hwirq < 0)
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return hwirq;
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virq = irq_create_mapping(armada_370_xp_msi_domain, hwirq);
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if (!virq) {
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armada_370_xp_free_msi(hwirq);
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return -EINVAL;
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}
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irq_set_msi_desc(virq, desc);
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msg.address_lo = msi_doorbell_addr;
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msg.address_hi = 0;
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msg.data = 0xf00 | (hwirq + 16);
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pci_write_msi_msg(virq, &msg);
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return 0;
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}
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static void armada_370_xp_teardown_msi_irq(struct msi_controller *chip,
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unsigned int irq)
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{
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struct irq_data *d = irq_get_irq_data(irq);
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unsigned long hwirq = d->hwirq;
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irq_dispose_mapping(irq);
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armada_370_xp_free_msi(hwirq);
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}
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static struct irq_chip armada_370_xp_msi_irq_chip = {
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.name = "armada_370_xp_msi_irq",
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.irq_enable = pci_msi_unmask_irq,
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.irq_disable = pci_msi_mask_irq,
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.name = "MPIC MSI",
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.irq_mask = pci_msi_mask_irq,
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.irq_unmask = pci_msi_unmask_irq,
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};
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static int armada_370_xp_msi_map(struct irq_domain *domain, unsigned int virq,
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irq_hw_number_t hw)
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{
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irq_set_chip_and_handler(virq, &armada_370_xp_msi_irq_chip,
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handle_simple_irq);
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static struct msi_domain_info armada_370_xp_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_MULTI_PCI_MSI),
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.chip = &armada_370_xp_msi_irq_chip,
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};
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return 0;
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static void armada_370_xp_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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{
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msg->address_lo = lower_32_bits(msi_doorbell_addr);
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msg->address_hi = upper_32_bits(msi_doorbell_addr);
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msg->data = 0xf00 | (data->hwirq + PCI_MSI_DOORBELL_START);
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}
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static const struct irq_domain_ops armada_370_xp_msi_irq_ops = {
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.map = armada_370_xp_msi_map,
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static int armada_370_xp_msi_set_affinity(struct irq_data *irq_data,
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const struct cpumask *mask, bool force)
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{
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return -EINVAL;
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}
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static struct irq_chip armada_370_xp_msi_bottom_irq_chip = {
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.name = "MPIC MSI",
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.irq_compose_msi_msg = armada_370_xp_compose_msi_msg,
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.irq_set_affinity = armada_370_xp_msi_set_affinity,
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};
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static int armada_370_xp_msi_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *args)
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{
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int hwirq, i;
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mutex_lock(&msi_used_lock);
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hwirq = bitmap_find_next_zero_area(msi_used, PCI_MSI_DOORBELL_NR,
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0, nr_irqs, 0);
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if (hwirq >= PCI_MSI_DOORBELL_NR) {
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mutex_unlock(&msi_used_lock);
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return -ENOSPC;
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}
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bitmap_set(msi_used, hwirq, nr_irqs);
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mutex_unlock(&msi_used_lock);
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for (i = 0; i < nr_irqs; i++) {
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irq_domain_set_info(domain, virq + i, hwirq + i,
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&armada_370_xp_msi_bottom_irq_chip,
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domain->host_data, handle_simple_irq,
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NULL, NULL);
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}
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return hwirq;
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}
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static void armada_370_xp_msi_free(struct irq_domain *domain,
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unsigned int virq, unsigned int nr_irqs)
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{
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struct irq_data *d = irq_domain_get_irq_data(domain, virq);
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mutex_lock(&msi_used_lock);
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bitmap_clear(msi_used, d->hwirq, nr_irqs);
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mutex_unlock(&msi_used_lock);
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}
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static const struct irq_domain_ops armada_370_xp_msi_domain_ops = {
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.alloc = armada_370_xp_msi_alloc,
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.free = armada_370_xp_msi_free,
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};
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static int armada_370_xp_msi_init(struct device_node *node,
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phys_addr_t main_int_phys_base)
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{
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struct msi_controller *msi_chip;
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u32 reg;
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int ret;
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msi_doorbell_addr = main_int_phys_base +
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ARMADA_370_XP_SW_TRIG_INT_OFFS;
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msi_chip = kzalloc(sizeof(*msi_chip), GFP_KERNEL);
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if (!msi_chip)
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armada_370_xp_msi_inner_domain =
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irq_domain_add_linear(NULL, PCI_MSI_DOORBELL_NR,
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&armada_370_xp_msi_domain_ops, NULL);
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if (!armada_370_xp_msi_inner_domain)
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return -ENOMEM;
|
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|
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msi_chip->setup_irq = armada_370_xp_setup_msi_irq;
|
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msi_chip->teardown_irq = armada_370_xp_teardown_msi_irq;
|
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msi_chip->of_node = node;
|
||||
|
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armada_370_xp_msi_domain =
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irq_domain_add_linear(NULL, PCI_MSI_DOORBELL_NR,
|
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&armada_370_xp_msi_irq_ops,
|
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NULL);
|
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pci_msi_create_irq_domain(of_node_to_fwnode(node),
|
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&armada_370_xp_msi_domain_info,
|
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armada_370_xp_msi_inner_domain);
|
||||
if (!armada_370_xp_msi_domain) {
|
||||
kfree(msi_chip);
|
||||
irq_domain_remove(armada_370_xp_msi_inner_domain);
|
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return -ENOMEM;
|
||||
}
|
||||
|
||||
ret = of_pci_msi_chip_add(msi_chip);
|
||||
if (ret < 0) {
|
||||
irq_domain_remove(armada_370_xp_msi_domain);
|
||||
kfree(msi_chip);
|
||||
return ret;
|
||||
}
|
||||
|
||||
reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS)
|
||||
| PCI_MSI_DOORBELL_MASK;
|
||||
|
||||
@ -280,7 +256,7 @@ static int armada_xp_set_affinity(struct irq_data *d,
|
||||
#endif
|
||||
|
||||
static struct irq_chip armada_370_xp_irq_chip = {
|
||||
.name = "armada_370_xp_irq",
|
||||
.name = "MPIC",
|
||||
.irq_mask = armada_370_xp_irq_mask,
|
||||
.irq_mask_ack = armada_370_xp_irq_mask,
|
||||
.irq_unmask = armada_370_xp_irq_unmask,
|
||||
@ -427,12 +403,12 @@ static void armada_370_xp_handle_msi_irq(struct pt_regs *regs, bool is_chained)
|
||||
continue;
|
||||
|
||||
if (is_chained) {
|
||||
irq = irq_find_mapping(armada_370_xp_msi_domain,
|
||||
msinr - 16);
|
||||
irq = irq_find_mapping(armada_370_xp_msi_inner_domain,
|
||||
msinr - PCI_MSI_DOORBELL_START);
|
||||
generic_handle_irq(irq);
|
||||
} else {
|
||||
irq = msinr - 16;
|
||||
handle_domain_irq(armada_370_xp_msi_domain,
|
||||
irq = msinr - PCI_MSI_DOORBELL_START;
|
||||
handle_domain_irq(armada_370_xp_msi_inner_domain,
|
||||
irq, regs);
|
||||
}
|
||||
}
|
||||
@ -604,8 +580,8 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
|
||||
armada_370_xp_mpic_domain =
|
||||
irq_domain_add_linear(node, nr_irqs,
|
||||
&armada_370_xp_mpic_irq_ops, NULL);
|
||||
|
||||
BUG_ON(!armada_370_xp_mpic_domain);
|
||||
armada_370_xp_mpic_domain->bus_token = DOMAIN_BUS_WIRED;
|
||||
|
||||
/* Setup for the boot CPU */
|
||||
armada_xp_mpic_perf_init();
|
||||
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